Physics 6A Fall 2000: Final Exam 2//2000 (rev. 2/0) Closed book and notes except for three 8.5 in 2 sheets of paper. Show reasoning for full credit. There are 6 problems and 200 points. Note: complex quantities are shown in boldface type. All transistors are silicon at room temperature unless otherwise noted. V in L R V out 0.0 H 5 Ω f 60 Hz C 30 µf. (43 pts.) Consider the LRC network above. (a) Let V in 0 V cos 2πft, where f 60 Hz, L 0.0 H, R 5 Ω and C 30 µf. Use complex impedance analysis to find the amplitude and phase of the output voltage, V out. (b) Now consider general, unspecified values for L, R and C. i. Find H(jω) V out /V in in terms of L, R and C. ii. Find H(jω). Express your result in terms of ω/ω 0, where ω 0 / LC. iii. Find approximate expressions for H(jω) when ω << ω 0 and for ω >> ω 0. How would you characterize this network as a filter (e.g., high pass, bandpass, low pass etc.)? iv. Evaluate the quality factor, Q, for the series LRC circuit with the specific values of L, R and C given above. Would you expect to find a sharp peak in the frequency response of this network? Explain briefly. 2. (8 pts.) The diagrams at the top of the next page represent an n-channel enhancement MOSFET and its circuit symbol. The substrate material used to fabricate the MOSFET is p-type silicon. (a) What material separates the metal gate layer from the channel? (b) Make a sketch of I D vs. V GS in the active region, indicating the location of V t. (c) Use the diagram to explain what happens in the channel to allow current to flow between S and D when V GS > V t. (V t threshold voltage.) (d) What undesirable thing would happen if the voltage of the body contact (B) exceeded the voltage of the MOSFET source contact (S)?
Above: Diagrams for Problem 2. 3. (42 pts.) The figure above represents a common emitter amplifier driving a capacitively coupled load resistance, R L. Assume the BJT is in the active region. For the BJT, h F E h fe 00. (a) The emitter current at the Q point is I EQ 2.0 ma. Find V BQ, I BQ and I 2, the current through R 2. Use this information to calculate the proper value for R. (b) Draw a simple small-signal low frequency AC model for the circuit, representing the BJT as a controlled current source and a resistor, r e. Assume C, C 2 and C E are infinite for now. (c) Use the small signal model just obtained to derive an expression for the voltage gain, A v v out /v in. Note that v out is defined with the load resistor in place. (d) Evaluate r e and A v for this circuit. (e) Find the value of C 2 such that the low frequency corner frequency for the amplifier, f L 30 Hz (assuming infinite C and C E ). 2
4. (57 pts.) Consider the JFET common source amplifier above. For the JFET, V p 3 V and I DSS 8 ma. Assume active region operation. (a) We want V GSQ.5 V. Find I DQ for this value of V GSQ and the proper value of R 2 to achieve this. (b) Find V DSQ and verify that the JFET is indeed in the active region. (c) Draw a simple small-signal low frequency AC model for the circuit, representing the JFET as a controlled current source. Assume C, C 2 and C E are infinite for now. (d) Use the small signal model just obtained to derive an expression for the voltage gain, A v v out /v in. Note that v in is defined as the voltage at the input capacitor, C. (e) Find g m and estimate A v, assuming C, C 2 and C S are infinite. You are not required to derive the expression for g m. (f) Now find the high frequency corner frequency, f H, arising from the shunt capacitance to ground in the gate circuit. (We will assume the corner frequency due to the drain circuit is much higher here). i. Find the effective capacitance between the gate and ground by applying Miller s theorem to C gd 2 pf and combining the result with C gs 4 pf. ii. Find the Thévenin equivalent resistance of the AC voltage source driving the gate (due to r s, R and R 2 ). iii. Find the corner frequency of the resulting low-pass filter. 3
5. (25 pts.) The figures above show a common emitter amplifier with I EQ ma, its DC load line and and the Q point location. (R and R 2 have been chosen to achieve this Q point.) (a) Find V CEQ and the values of intercepts of the load line with the V CE and I C axes. (b) Estimate the quiescent power dissipation, P DQ, for the BJT in this circuit. (c) Find the slope of the AC load line through the Q point. Is the AC load line more steep or less steep than the DC load line? (d) Is this choice of Q point optimum for maximizing the undistorted AC power output from the amplifier? Explain why or why not. 6. (5 pts.) The figure below shows a current-to-voltage converter made with an op-amp and resistor. Use the op-amp equivalent circuit given to derive an expression for R in V in /I in for the converter. Assume the input current, i 0 for the op amp, but take the op amp R out ( 0) into account and assume the open loop gain, A, is finite. 4
Physics 6A Fall 2000: Final Exam Solutions 2/200. The LRC Problem (specific values): (a) V out V in Z C Z C + Z L + R 88j Ω 88j Ω + 38j Ω + 5 Ω 88j Ω (5 Ω 50j Ω 88 90 25 23 0.70 67. ω 2πf 377 rad/s Z C jωc j 377 rad/s 30 0 6 F 88j Ω. Z L jωl j 377 rad/s 0.0 H 38j Ω. V in 0 V 0. V out (0.70 67 )V in 7.0 V 67. (b) Now for general, unspecified values for L, R and C (ω 0 / LC): i. H(jω) /jωc (/jωc) + jωl + R ω 2 LC + jωrc ( ω ω 0 ) 2 + j ω ω 0 R C/L. ii. H(jω) ( ( ω ω 0 ) 2 ) 2 + ( ω ω 0 ) 2 R 2 C/L. iii. iv. ω ω 0 H(jω), ω ω 0 H(jω) ( ω ω 0 ) 2. This is a low pass filter. Q R L C 0.0 H 5 Ω 30 µf 0.50. Since Q is small, there is no sharp peak in the frequency response at ω 0.
2. MOSFET questions: (a) SiO 2, an insulator, separates the metal gate layer from the channel. (b) A sketch of I D vs. V GS in the active region, indicating the location of V t. V t > 0, I D has an approximate quadratic increase above V t. (c) As V GS increases, electrons are attracted from the n + regions into the p region under the gate. When sufficient charge has accumulated to create a continuous channel from S to D, current can flow. (d) The p body and the n + S and D regions form pn junctions which must not become forward biased for proper functioning of the MOSFET. If the voltage of the body contact (B) sufficiently exceeds the voltage of the MOSFET source contact (S), current would flow to S along this path (not good!). 3. CE amplifier problem: (a) V BQ V BEQ + V EQ 0.7 V + 2 ma 500 Ω.7 V. I BQ I EQ /(h fe + ) 2 ma/0 20 µa I 2 V BQ /R 2.7 V/4 kω.43 ma I current through R I 2 + I BQ 0.43 ma +.02 ma 0.45 ma R V CC V BQ 20 V.7 V 4 kω. 0.45 ma 0.45 ma (b) Sketch of small sig. AC model: (c) v out h fe i b R C R L R T R C R L h fe i b R T. v in (h fe + )i b r e. A v v out v in h fei b R T (h fe + )i b r e R T /r e. (d) r e 26 ΩmA 26 Ω/2 3 Ω. I E Q A v 2.5 kω/3 Ω 92. (e) f L C 2 30 Hz. 2π(R L + R C )C 2 0.53 µf. 2π(0 kω)30 Hz 2
4. Re: Prob. 4 solution on previous page well, they can t all look nice! 5. This question has been modified slightly. The material was not emphasized in 200, nor will it be emphasized on this year s final, but you should be aware of load lines and power considerations from reading the material in Ch. 9 and the solution to Prob. 9.69, handed out in class. (a) V CEQ 20 V ma 0 kω ma kω 9 V. The values of intercepts of the load line: V MAX DC V CC 20 V. I MAX DC V CC /(R E + R C ) 20 V/ kω.8 ma. (b) Find the quiescent power dissipation, P DQ, of the BJT: (c) AC slope R AC R C R L 5 kω 2 0 4. DC slope R DC R E + R C kω 0.9 0 4. P DQ V CEQ I CQ 9 V ma 9 mw. The AC slope is dv CE for the midband AC circuit model (C C, C E ). For this circuit, the effective resistance, R AC, in the path determining V CE is R T R C R L (we assume I C I E ). The DC slope is determined similarly for the DC circuit, where the effective resistance, R DC, is R C + R E. [see Fig. 9.5 in Bobrow] AC load line falls more steeply. (d) One gets maximum undistorted output voltage swing and undistorted AC power output when the Q point is centered on the AC load line. Otherwise you hit a limit(saturation or cutoff) sooner (see Fig. 9.5 in Bobrow). The intercept of the AC load line with the I C axis, I C MAX AC, is given by ( ) dic I C MAX AC I CQ V CQ.0 ma + 2 0 4 9 V 2.8 ma. dv CE AC Thus, the center of the AC load line is at I C.4 ma > I CQ ( ma). The Q point is below the center of the AC load line and the amplifier is not optimized for maximum undistorted power output. 6. The op-amp problem: di C V in v V in I in (R + R out ) + Av V in ( + A) I in (R + R out ) R in V in I in R + R out + A. 4