TLP705 TLP705. Plasma Display Panel. Industrial Inverter IGBT/Power MOS FET Gate Drive. Pin Configuration (Top View) Schematic. Truth Table

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TOSHIB Photocoupler TLP705 Gals IRED + Photo IC Plasma Display Panel. Industrial Inverter IGBT/Power MOS FET Gate Drive 4.58±0.25 5 4 Unit in mm TLP705 consists of a Gals light emitting diode and a integrated photodetector. This unit is -lead SDIP package. TLP705 is 50% smaller than 8pin DIP and has suited the safety standard reinforced insulation class. So mounting area in safety standard required equipment can be reduced. TLP705 is suitable for gate driving circuit of IGBT or power MOS FET. Especially TLP705 is capable of direct gate drive of lowr Power IGBTs. 2 3.8±0.25 3.5 +0.5 0.25 +0.0 0.05 0.25± 7.2±0.25 4.0 +0.25 0.20 Peak output current : ±0.45 (max) Operating frequency : 250kHz (max) Guaranteed performance over temperature : 40 to 00 C Supply current : 3m (max) Power supply voltage : 0 to 20 V Threshold input current : LH = 8 m (max) Switching time (t plh / t phl ) : 200 ns (max) Common mode transient immunity : 0 kv/µs(min) Isolation voltage : 5000 Vrms(min) UL Recognized :UL577, File No.E7349 Construction Mechanical Rating Creepage Distance Clearance Insulation Thickness Option (D4) TÜV approved 7.2-mm pitch standard type 7.0 mm (min) 7.0 mm (min) 0.4 mm (min) Maximum operating insulation voltage Highest permissible over voltage 0.-mm pitch TLPXXXF type 8.0 mm (min) 8.0 mm (min) 0.4 mm (min) 3 : EN0747-5-2 Certificate No. R50033433 : 890 Vpk : 8000 Vpk ( Note ) When a EN0747-5-2 approved type is needed, please designate the Option(D4) 0.4±0..27±0.2.25±0.25 TOSHIB -5J Weight 0.2 g (typ.) 9.7±0.3 Pin Configuration (Top View) 2 SHIELD 5-5J Truth Table Input LED Tr Tr2 Output Schematic (Tr) I CC H ON ON OFF H + L OFF OFF ON L V F 3 (Tr2) I O 5 4 GND SHIELD 0. µf bypass capacitor must be connected between pins and 4. (See Note.) 200-0-7

Maximum Ratings (Ta = 25 C) LED Detector Characteristics Symbol Rating Unit Forward current 20 m Forward current derating (Ta 85 C) / Ta 0.54 m/ C Peak transient forward current (Note ) P Reverse voltage V R 5 V Junction temperature T j 25 C H peak output current (Note 2) I OPH 0.45 L peak output current (Note 2) I OPL 0.45 Output voltage 25 V Supply voltage 25 V Junction temperature T j 25 C Operating frequency (Note 3) f 250 khz Storage temperature range T stg 55 to 25 C Operating temperature range T opr 40 to 00 C Lead soldering temperature (0 s) (Note 4) T sol 20 C Isolation voltage (C, minute, R.H. 0%) (Note 5) BV S 5000 Vrms Note : Pulse width P W µs, 300 pps Note 2: Exponential waveform pulse width P W 0 µs, f 5 khz Note 3: Exponential waveform IOPH -0.25 ( 80 ns), IOPL +0.25 ( 80 ns),ta =00 C Note 4: It is effective soldering area of Lead. Note 5: Device considerd a two terminal device: pins, 2 and 3 shorted together, and pins 4, 5 and shorted together. Note : ceramic capacitor(0. µf) should be connected from pin to pin 4 to stabilize the operation of the high gain linear amplifier. Failure to provide the bypassing may impair the switching property. The total lead length between capacitor and coupler should not exceed cm. Recommended Operating Conditions Characteristics Symbol Min Typ. Max Unit Input current, ON (Note 7) (ON) 0 5 m Input voltage, OFF V F (OFF) 0 0.8 V Supply voltage 0 20 V Peak output current I OPH / I OPL ± 0.5 Operating temperature T opr - 40 00 C Note 7: Input signal rise time (fall time) < 0.5 µs. Note 8: If the rising slope of the supply voltage (VCC) for the detector is steep,stable operation of the internal circuits cannot be guaranteed. Be sure to set 3.0V/µs or less for a rising slope of the VCC. 2 200-0-7

Electrical Characteristics (Ta = 40 to 00 C, unless otherwise specified) Characteristics Symbol Test Circuit Test Condition Min Typ.* Max Unit Forward voltage V F = 0 m, Ta = 25 C..8 V Temperature coefficient of forward voltage V F / Ta = 0 m 2.0 mv/ C Input reverse current I R V R = 5 V, Ta = 25 C 0 µ Input capacitance C T V = 0 V, f = MHz,Ta = 25 C 45 pf Output current (Note 9) H Level L Level I OPH V V -5 = 4 V 0.5 0.35 CC = 5 V I = 0 m OPH2 V -5 = 0 V 0.3 0. I OPL V V 5-4 = 2 V 0.5 0.3 2 CC = 5 V I = 0 m OPL2 V 5-4 = 0 V 0.3 0.2 Output voltage H Level H 3 L Level L 4 = 0 V I O = 00 m, = 0 m I O = 00 m, V F = 0.8 V.0 8.5 0.4.0 V Supply current H Level I CCH 5 = 0 to 20 V = 0 m 2.0 3.0 L Level I CCL open = 0 m 2.0 3.0 m Threshold input current L H LH = 5 V, > V 2.5 8 m Threshold input voltage H L V FHL = 5 V, < V 0.8 V Supply voltage 0 20 V *: ll typical values are at Ta = 25 C Note 9: Duration of I O time 50 µs Note0: This product is more sensitive than the conventional product to static electricity (ESD) because of a lowest power consumption design. General precaution to static electricity (ESD) is necessary for handling this component. Isolation Characteristics (Ta = 25 C) Characteristic Symbol Test Condition Min. Typ. Max. Unit Capacitance input to output C S V = 0 V, f = MHz (Note 5).0 pf R.H. 0%,V Isolation resistance R S = 500V S (Note 5) 0 2 0 4 Ω C, minute 5000 Vrms Isolation voltage BV S C, second, in oil 0000 DC, minute,in oil 0000 Vdc 3 200-0-7

Switching Characteristics (Ta = 40 to 00 C, unless otherwise specified) Characteristics Symbol L H t plh Propagation delay time H L t phl L H t plh Propagation delay time H L t phl Propagation delay skew (Note) tpsk Switching time dispersion between ON and OFF t phl -t plh Test Circuit 7 = 20 V R g = 30 Ω C g = nf f=250khz Duty Cycle =50% Test Condition Min Typ.* Max Unit Ta= 25 = 0 0 m Ta= 25 = 0 0 m Ta= -40 to00 = 0 0 m Ta= -40 to00 = 0 0 m Ta= -40 to00 = 0 m Ta= -40 to00 = 0 m 70 95 70 70 05 70 50 200 50 200-90 90-5 5 ns Output rise time (0-90%) t r = 0 0 m Output fall time (90-0%) t f = 0 0 m Common mode transient immunity at hight level output Common mode transient immunity at low level output CM H CM L 8 V CM = 000Vp-p = 20 V Ta = 25 C = 0 m (min) = V = 0 m (max) = V 0000 0000 V/µs *: ll typical values are at Ta = 25 C Note : Propagation delay difference between any two parts. Test Circuit : I OPH Test Circuit 2: I OPL V-5 I OPH I OPL V5-4 Test Circuit 3: H H Test Circuit 4: L V V F L V Test Circuit 5: I CCH Test Circuit : I CCL I CCH I CCL 4 200-0-7

Test Circuit 7 : tplh, tphl, tr, tf, PWD ( f=250 khz, Duty=50 %) 0. µf Rg = 30 Ω Cg = nf t plh t r t phl t f H 90% 50 0% Test Circuit 8: CMH, CML 90% 000 V SW B V CM 0. µf V CM 0% t r SW : = 0 m V t f V CM H + SW B: = 0 m CM L CM L = 800 V t r (µs) CM H =- 800 V t f (µs) CM L (CM H ) is the maximum rate of rise (fall) of the common mode voltage that can be sustained with the output voltage in the low (high) state. 5 200-0-7

200-0-7