NC7WZ86 TinyLogic UHS Dual 2-Input Exclusive-OR Gate

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Transcription:

TinyLogic UHS Dual 2-Input Exclusive-OR Gate General Description The NC7WZ86 is a dual 2-Input Exclusive-OR Gate from Fairchild s Ultra High Speed Series of TinyLogic. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad V CC operating range. The device is specified to operate over the 1.65V to 5.5V V CC range. The inputs and output are high impedance when V CC is 0V. Inputs tolerate voltages up to 7V independent of V CC operating voltage. Ordering Code: Pb-Free package per JEDEC J-STD-020B. Logic Symbol Product Features April 2000 Revised January 2005 Space saving US8 surface mount package MicroPak Pb-Free leadless package Ultra High Speed; t PD 2.9 ns typ into 50 pf at 5V V CC High Output Drive; ± 24 ma at 3V V CC Broad V CC Operating Range; 1.65V to 5.5V Matches the performance of LCX when operated at 3.3V Power down high impedance inputs/output Overvoltage tolerant inputs facilitate 5V to 3V translation Patented noise/emi reduction circuitry implemented Order Package Code Package Description Supplied As Number Number Top Mark NC7WZ86K8X MAB08A WZ86 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel NC7WZ86L8X MAC08A N7 Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel Connection Diagrams NC7WZ86 TinyLogic UHS Dual 2-Input Exclusive-OR Gate IEEE/IEC Pin Descriptions Pin Names A n, B n Y n Description Input Output (Top View) Pin One Orientation Diagram Function Table Y = A B Inputs Output A B Y L L L L H H H L H H H L H = HIGH Logic Level L = LOW Logic Level TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. AAA represents Product Code Top Mark - see ordering code Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram). Pad Assignments for MicroPak (Top Thru View) MicroPak is a trademark of Fairchild Semiconductor Corporation. 2005 Fairchild Semiconductor Corporation DS500272 www.fairchildsemi.com

Absolute Maximum Ratings(Note 1) Supply Voltage (V CC ) 0.5V to +7V DC Input Voltage (V IN ) 0.5V to +7V DC Output Voltage (V OUT ) 0.5V to +7V DC Input Diode Current (I IK ) @V IN < 0.5V 50 ma DC Output Diode Current (I OK ) @V OUT < 0.5V 50 ma DC Output Current (I OUT ) ± 50 ma DC V CC /GND Current (I CC /I GND ) ± 100 ma Storage Temperature (T STG ) 65 C to +150 C Junction Temperature under Bias (T J ) 150 C Junction Lead Temperature (T L ); (Soldering, 10 seconds) 260 C Power Dissipation (P D ) @ +85 C 250 mw DC Electrical Characteristics Recommended Operating Conditions (Note 2) Supply Voltage Operating (V CC ) 1.65V to 5.5V Supply Voltage Data Retention (V CC ) 1.5V to 5.5V Input Voltage (V IN ) 0V to 5.5V Output Voltage (V OUT ) 0V to V CC Operating Temperature (T A ) 40 C to +85 C Input Rise and Fall Time (t r, t f ) V CC = 1.8V ± 0.15V, 2.5V ±0.2V 0 ns/v to 20 ns/v V CC = 3.3V ± 0.3V 0 ns/v to 10 ns/v V CC = 5.0V ± 0.5V 0 ns/v to 5 ns/v Thermal Resistance (θ JA ) 250 C/W Note 1: Absolute maximum ratings are DC values beyond which the device may be damaged or have its useful life impaired. The datasheet specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside datasheet specifications. Note 2: Unused input must be held HIGH or LOW. They may not float. Symbol Parameter V CC T A = +25 C T A = 40 C to +85 C Units Conditions (V) Min Typ Max Min Max V IH HIGH Level Input Voltage 1.65 to 1.95 0.75 V CC 0.75 V CC V 2.3 to 5.5 0.7 V CC 0.7 V CC V IL LOW Level Input Voltage 1.65 to 1.95 0.25 V CC 0.25 V CC V 2.3 to 5.5 0.3 V CC 0.3 V CC V OH HIGH Level Output Voltage 1.65 1.55 1.65 1.55 2.3 2.2 2.3 2.2 3.0 2.9 3.0 2.9 V V IN = V IH, V IL I OH = 100 µa 4.5 4.4 4.5 4.4 1.65 1.29 1.52 1.29 I OH = 4 ma 2.3 1.9 2.15 1.9 I OH = 8 ma 3.0 2.4 2.80 2.4 V I OH = 16 ma 3.0 2.3 2.68 2.3 I OH = 24 ma 4.5 3.8 4.20 3.8 I OH = 32 ma V OL LOW Level Output Voltage 1.65 0.0 0.1 0.1 2.3 0.0 0.1 0.1 3.0 0.0 0.1 0.1 V V IN = V IH or V IL I OL = 100 µa 4.5 0.0 0.1 0.1 1.65 0.08 0.24 0.24 I OL = 4 ma 2.3 0.10 0.3 0.3 I OL = 8 ma 3.0 0.15 0.4 0.4 V I OL = 16 ma 3.0 0.22 0.55 0.55 I OL = 24 ma 4.5 0.22 0.55 0.55 I OL = 32 ma I IN Input Leakage Current 0 to 5.5 ±0.1 ±1 µa V IN = 5.5V, GND I OFF Power Off Leakage Current 0.0 1 10 µa V IN or V OUT = 5.5V I CC Quiescent Supply Current 1.65 to 5.5 1 10 µa V IN = 5.5V, GND www.fairchildsemi.com 2

AC Electrical Characteristics V CC T A = +25 C T A = 40 C to +85 C Figure Symbol Parameter Units Conditions (V) Min Typ Max Min Max Number t PLH, Propagation Delay 1.8 ± 0.15 2.0 6.7 12.5 2.0 13.0 t PHL 2.5 ± 0.2 1.2 4.1 7.0 1.2 7.5 C L = 15 pf, Figures ns 3.3 ± 0.3 0.8 3.0 4.8 0.8 5.2 R 1, 3 L = 1 MΩ 5.0 ± 0.5 0.5 2.2 3.5 0.5 3.8 t PLH, Propagation Delay 3.3 ± 0.3 1.2 3.8 5.4 1.2 5.9 C L = 50 pf, Figures ns t 1, 3 PHL 5.0 ± 0.5 0.8 2.9 4.2 1.0 4.6 R L = 500Ω C IN Input Capacitance 0 2.5 pf C PD Power Dissipation Capacitance 3.3 15 pf (Note 3) Figure 2 5.0 19 Note 3: C PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I CCD ) at no output loading and operating at 50% duty cycle. (See Figure 2.) C PD is related to I CCD dynamic operating current by the expression: I CCD = (C PD )(V CC )(f IN ) + (I CC static). NC7WZ86 AC Loading and Waveforms C L includes load and stray capacitance Input PRR = 1.0 MHz; t w = 500 ns FIGURE 1. AC Test Circuit Input = AC Waveform; t r = t f = 1.8 ns; PRR = 10 MHz; Duty Cycle = 50% FIGURE 2. I CCD Test Circuit FIGURE 3. AC Waveforms 3 www.fairchildsemi.com

Tape and Reel Specification TAPE FORMAT for US8 Package Tape Number Cavity Cover Tape Designator Section Cavities Status Status Leader (Start End) 125 (typ) Empty Sealed K8X Carrier 3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed TAPE DIMENSIONS inches (millimeters) TAPE FORMAT for MicroPak Package Tape Number Cavity Cover Tape Designator Section Cavities Status Status Leader (Start End) 125 (typ) Empty Sealed L8X Carrier 3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed TAPE DIMENSIONS inches (millimeters) www.fairchildsemi.com 4

Tape and Reel Specification (Continued) REEL DIMENSIONS inches (millimeters) NC7WZ86 Tape Size 8 mm A B C D N W1 W2 W3 7.0 0.059 0.512 0.795 2.165 0.331 + 0.059/ 0.000 0.567 W1 + 0.078/ 0.039 (177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/ 0.00) (14.40) (W1 + 2.00/ 1.00) 5 www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package Number MAB08A www.fairchildsemi.com 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NC7WZ86 TinyLogic UHS Dual 2-Input Exclusive-OR Gate Pb-Free 8-Lead MicroPak, 1.6 mm Wide Package Number MAC08A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 7 www.fairchildsemi.com