Applications l Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching l This device is only for through hole application. SMPS MOSFET PD 984A IRFSL9N60A HEXFET Power MOSFET V DSS Rds(on) max I D 600V 0.75Ω 9.2A Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current Absolute Maximum Ratings G D S TO262 Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ 0V 9.2 I D @ T C = 00 C Continuous Drain Current, V GS @ 0V 5.8 A I DM Pulsed Drain Current 37 P D @T C = 25 C Power Dissipation 70 W Linear Derating Factor.3 W/ C V GS GatetoSource Voltage ± 30 V dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns T J Operating Junction and 55 to 50 T STG Storage Temperature Range Soldering Temperature, for 0 seconds 300 (.6mm from case ) C Applicable Off Line SMPS Topologies: l Active Clamped Forward l Main Switch Notes through are on page 8 www.irf.com 2/23/98
Static @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 600 V V GS = 0V, I D = 250µA R DS(on) Static DraintoSource OnResistance 0.75 Ω V GS = 0V, I D = 5.5A V GS(th) Gate Threshold Voltage 2.0 4.0 V V DS = V GS, I D = 250µA I DSS DraintoSource Leakage Current 25 V µa DS = 600V, V GS = 0V 250 V DS = 480V, V GS = 0V, T J = 50 C I GSS GatetoSource Forward Leakage 00 V GS = 30V na GatetoSource Reverse Leakage 00 V GS = 30V Dynamic @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions g fs Forward Transconductance 5.5 S V DS = 25V, I D = 3.A Q g Total Gate Charge 49 I D = 9.2A Q gs GatetoSource Charge 3 nc V DS = 400V Q gd GatetoDrain ("Miller") Charge 20 V GS = 0V, See Fig. 6 and 3 t d(on) TurnOn Delay Time 3 V DD = 300V t r Rise Time 25 ns I D = 9.2A t d(off) TurnOff Delay Time 30 R G = 9.Ω t f Fall Time 22 R D = 35.5Ω,See Fig. 0 C iss Input Capacitance 400 V GS = 0V C oss Output Capacitance 80 V DS = 25V C rss Reverse Transfer Capacitance 7. pf ƒ =.0MHz, See Fig. 5 C oss Output Capacitance 957 V GS = 0V, V DS =.0V, ƒ =.0MHz C oss Output Capacitance 49 V GS = 0V, V DS = 480V, ƒ =.0MHz C oss eff. Effective Output Capacitance 96 V GS = 0V, V DS = 0V to 480V Avalanche Characteristics Parameter Typ. Max. Units E AS Single Pulse Avalanche Energy 290 mj I AR Avalanche Current 9.2 A E AR Repetitive Avalanche Energy 7 mj Thermal Resistance Parameter Typ. Max. Units R θjc JunctiontoCase 0.75 R θja JunctiontoAmbient (PCB Mounted,steadystate) 40 C/W Diode Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 9.2 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 37 (Body Diode) pn junction diode. S V SD Diode Forward Voltage.5 V T J = 25 C, I S = 9.2A, V GS = 0V t rr Reverse Recovery Time 530 800 ns T J = 25 C, I F = 9.2A Q rr Reverse RecoveryCharge 3.0 4.4 µc di/dt = 00A/µs t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by L S L D ) 2 www.irf.com
I D, DraintoSource Current (A) 00 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.7V 4.7V I D, DraintoSource Current (A) 00 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.7V 4.7V 20µs PULSE WIDTH T J = 25 C 0. 0. 0 00 V DS, DraintoSource Voltage (V) 20µs PULSE WIDTH T J = 50 C 0 00 V DS, DraintoSource Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, DraintoSource Current (A) 00 0 T J = 50 C T J = 25 C V DS= 50V 20µs PULSE WIDTH 0. 4.0 5.0 6.0 7.0 8.0 9.0 0.0 V GS, GatetoSource Voltage (V) R DS(on), DraintoSource On Resistance (Normalized) 3.0 I D = 9.2A 2.5 2.0.5.0 0.5 V GS = 0V 0.0 60 40 20 0 20 40 60 80 00 20 40 60 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized OnResistance Vs. Temperature www.irf.com 3
C, Capacitance (pf) 2400 2000 600 200 800 400 C iss C oss C rss V GS = 0V, f = MHz C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd 0 A 0 00 000 V DS, DraintoSource Voltage (V) V GS, GatetoSource Voltage (V) 20 6 2 8 4 I = D 9.2A V DS = 480V 400V V DS = 300V V DS = 20V FOR TEST CIRCUIT SEE FIGURE 3 0 0 0 20 30 40 50 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. DraintoSource Voltage Fig 6. Typical Gate Charge Vs. GatetoSource Voltage 00 000 OPERATION IN THIS AREA LIMITED BY R DS(on) I SD, Reverse Drain Current (A) 0 T J = 50 C T J = 25 C V GS = 0 V 0. 0.2 0.5 0.7.0.2 V SD,SourcetoDrain Voltage (V) I D, Drain Current (A) 00 0 0us 00us ms 0ms TC = 25 C TJ = 50 C Single Pulse 0. 0 00 000 0000 V DS, DraintoSource Voltage (V) Fig 7. Typical SourceDrain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com
0.0 V DS R D I D, Drain Current (A) 8.0 6.0 4.0 2.0 Fig 0a. Switching Time Test Circuit V DS 90% R G V GS 0V Pulse Width µs Duty Factor 0. % D.U.T. V DD 0.0 25 50 75 00 25 50 T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature 0% V GS t d(on) t r t d(off) t f Fig 0b. Switching Time Waveforms Thermal Response (Z thjc ) 0. D = 0.50 0.20 0.0 PDM 0.05 t 0.02 SINGLE PULSE t2 0.0 (THERMAL RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J = P DM x Z thjc TC 0.0 0.0000 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) Fig. Maximum Effective Transient Thermal Impedance, JunctiontoCase www.irf.com 5
R G V DS 20V tp Fig 2a. Unclamped Inductive Test Circuit tp L D.U.T I AS 0.0Ω 5V DRIVER V (BR)DSS V DD A E AS, Single Pulse Avalanche Energy (mj) 600 500 400 300 200 00 TOP BOTTOM I D 4.A 5.8A 9.2A 0 25 50 75 00 25 50 Starting T, Junction Temperature ( J C) Fig 2c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 2b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ Q G 2V.2µF.3µF 0 V Q GS Q GD D.U.T. V DS V G V GS 3mA Charge I G I D Current Sampling Resistors Fig 3a. Basic Gate Charge Waveform Fig 3b. Gate Charge Test Circuit 6 www.irf.com
Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =0V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD ReApplied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 4. For NChannel HEXFETS www.irf.com 7
Package Outline TO262 Outline Part Marking Information TO262 Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. ) Starting T J = 25 C, L = 6.8mH R G = 25Ω, I AS = 9.2A. (See Figure 2) ƒ I SD 9.2A, di/dt 50A/µs, V DD V (BR)DSS, T J 50 C Pulse width 300µs; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (30) 322 333 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: 44 883 732020 IR CANADA: 5 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 57, 6350 Bad Homburg Tel: 49 672 96590 IR ITALY: Via Liguria 49, 007 Borgaro, Torino Tel: 39 45 0 IR FAR EAST: K&H Bldg., 2F, 304 NishiIkebukuro 3Chome, ToshimaKu, Tokyo Japan 7 Tel: 8 3 3983 0086 IR SOUTHEAST ASIA: Kim Seng Promenade, Great World City West Tower, 3, Singapore 237994 Tel: 65 838 4630 IR TAIWAN:6 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 0673, Taiwan Tel: 886223779936 http://www.irf.com/ Data and specifications subject to change without notice. 2/98 8 www.irf.com