SNALS2C, SNAS2A, SNALS2C, SNAS2A SDAS2C JUL 9 REISED AUGUST 99 -State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading Package Optio Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description These octal buffers and line drivers are designed specifically to improve the performance and deity of -state memory address drivers, clock drivers, and bus-oriented receivers and tramitters. With the ALS20A, ALS2C, AS20A, and AS2A, these devices provide the choice of selected combinatio of inverting outputs, symmetrical active-low output-enable () inputs, and complementary and inputs. The - version of SNALS2C is identical to the standard version, except that the recommended maximum I OL for the - version is ma. There is no - version of the SNALS2C. The SNALS2C and SNAS2A are characterized for operation over the full military temperature range of C to 2 C. The SNALS2C and SNAS2A are characterized for operation from 0 C to 0 C. SNALS2C, SNAS2A...J PACKAGE SNALS2C, SNAS2A... DW OR N PACKAGE (TOP IEW) A 2 A2 2 22 2 GND 2 9 0 20 9 2 2 20 9 9 0 2 CC 2 2A 2 2A 2A2 2A SNALS2C, SNAS2A... FK PACKAGE (TOP IEW) A2 2 22 2 A 2 GND 2A CC 2A2 2 2A 2 2A FUNCTION TABLE (each buffer) INPUTS OUTPUT A L H H L L L H X Z PRODUCTION DATA information is current as of publication date. Products conform to specificatio per the terms of Texas Itruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 99, Texas Itruments Incorporated POST OFFICE BOX 0 DALLAS, TEXAS 2
SNALS2C, SNAS2A, SNALS2C, SNAS2A SDAS2C JUL 9 REISED AUGUST 99 logic symbol logic diagram (positive logic) EN A A2 2 2 2 A A2 2 2 2 2A 2A2 2A 2A 9 EN This symbol is in accordance with ANSI/IEEE Std 9-9 and IEC Publication -2. 9 2 22 2 2 2 2A 2A2 9 2 9 2 22 2A 2 2A 2 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, CC........................................................................ Input voltage, I............................................................................ oltage applied to a disabled -state output................................................... Operating free-air temperature range, T A : SNALS2C........................... C to 2 C SNALS2C............................... 0 C to 0 C Storage temperature range....................................................... C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. Exposure to absolute-maximum-rated conditio for extended periods may affect device reliability. 2 POST OFFICE BOX 0 DALLAS, TEXAS 2
recommended operating conditio SNALS2C, SNAS2A, SNALS2C, SNAS2A SDAS2C JUL 9 REISED AUGUST 99 SNALS2C SNALS2C MIN NOM MAX MIN NOM MAX CC Supply voltage.... IH High-level input voltage 2 2 IL Low-level input voltage 0. 0. 0. IOH High-level output current 2 ma IOL Low-level output current 2 2 TA Operating free-air temperature 2 0 0 C Applies over temperature range C to 0 C Applies over temperature range 0 C to 2 C Applies only to the - version and only if CC is between. and.2 ma electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS SNALS2C SNALS2C MIN TP MAX MIN TP MAX IK CC =., II = ma.. CC =to.. CC =. IOH = 0. ma CC 2 CC 2 IOH = ma 2..2 2..2 IOH = 2 ma 2 IOH = ma 2 IOL = 2 ma 0.2 0. 0.2 0. OL CC =. IOL = 2 ma 0. 0. IOL = ma (- version) 0. 0. IOZH CC =., O = 2. 20 20 µa IOZL CC =., O = 0. 20 20 µa II CC =., I = 0. 0. ma IIH CC =., I = 2. 20 20 µa IIL CC =., I = 0. 0. 0. ma IO # CC =., O = 2.2 20 2 0 2 ma Outputs high 9 9 ICC CC =. Outputs low 2 2 ma Outputs disabled 29 2 All typical values are at CC =, TA = 2 C. # The output conditio have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. POST OFFICE BOX 0 DALLAS, TEXAS 2
SNALS2C, SNAS2A, SNALS2C, SNAS2A SDAS2C JUL 9 REISED AUGUST 99 switching characteristics (see Figure ) FROM (INPUT) TO (OUTPUT) CC =. to., CL = 0 pf, R = 00 Ω, R2 = 00 Ω, TA = MIN to MAX SNALS2C SNALS2C MIN MAX MIN MAX 2 0 A 2 0 tpzh 2 20 tpzl 2 20 tphz 2 0 2 0 tplz 2 For conditio shown as MIN or MAX, use the appropriate value specified under recommended operating conditio. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, CC........................................................................ Input voltage, I............................................................................ oltage applied to a disabled -state output................................................... Operating free-air temperature range, T A : SNAS2A............................. C to 2 C SNAS2A................................. 0 C to 0 C Storage temperature range....................................................... C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. Exposure to absolute-maximum-rated conditio for extended periods may affect device reliability. recommended operating conditio SNAS2A SNAS2A MIN NOM MAX MIN NOM MAX CC Supply voltage.... IH High-level input voltage 2 2 IL Low-level input voltage 0. 0. IOH High-level output current 2 ma IOL Low-level output current ma TA Operating free-air temperature 2 0 0 C POST OFFICE BOX 0 DALLAS, TEXAS 2
SNALS2C, SNAS2A, SNALS2C, SNAS2A SDAS2C JUL 9 REISED AUGUST 99 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS SNAS2A SNAS2A MIN TP MAX MIN TP MAX IK CC =., II = ma.2.2 OL CC =. CC =. to., IOH = 2 ma CC 2 CC 2 IOH = ma 2.. 2.. CC =. IOH = 2 ma 2. IOH = ma 2. IOL = ma 0. IOL = ma 0. IOZH CC =., O = 2. 0 0 µa IOZL CC =., O = 0. 0 0 µa II CC =., I = 0. 0. ma IIH CC =., I = 2. 20 20 µa IIL A CC =., I =0 0. 0. 0. IO CC =., O = 2.2 0 0 0 0 ma Outputs high 22 22 ICC CC =. Outputs low 0 90 0 90 ma Outputs disabled All typical values are at CC =, TA = 2 C. The output conditio have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure ) ma FROM (INPUT) TO (OUTPUT) CC =. to., CL = 0 pf, R = 00 Ω, R2 = 00 Ω, TA = MIN to MAX SNAS2A SNAS2A MIN MAX MIN MAX 2 9 2.2 A.2 tpzh 0 9 tpzl 2 2. tphz. tplz 0. 9 For conditio shown as MIN or MAX, use the appropriate value specified under recommended operating conditio. POST OFFICE BOX 0 DALLAS, TEXAS 2
SNALS2C, SNAS2A, SNALS2C, SNAS2A SDAS2C JUL 9 REISED AUGUST 99 MEASUREMENT INFORMATION SERIES ALS/ALS AND AS/AS DEICES CC RL = R = R2 S RL From Output Under Test CL (see Note A) RL Test Point From Output Under Test CL (see Note A) Test Point From Output Under Test CL (see Note A) R R2 Test Point LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR -STATE OUTPUTS Timing Input High-Level Pulse Data Input tsu th Low-Level Pulse tw OLTAGE WAEFORMS SETUP AND HOLD TIMES OLTAGE WAEFORMS PULSE DURATIONS Output Control (low-level enabling) Waveform S Closed (see Note B) tpzl tphz tplz OL tpzh Waveform 2 S Open (see Note B) 0 OLTAGE WAEFORMS ENABLE AND DISABLE TIMES, -STATE OUTPUTS Input In-Phase Output Out-of-Phase Output (see Note C) OL OL OLTAGE WAEFORMS PROPAGATION DELA TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform is for an output with internal conditio such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditio such that the output is high except when disabled by the output control. C. When measuring propagation delay items of -state outputs, switch S is open. D. All input pulses have the following characteristics: PRR MHz, tr = tf = 2, duty cycle = 0%. E. The outputs are measured one at a time with one traition per measurement. Figure. Load Circuits and oltage Waveforms POST OFFICE BOX 0 DALLAS, TEXAS 2
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