IRF3808 AUTOMOTIVE MOSFET Typical Applications HEXFET Power MOSFET Integrated Starter Alternator D 42 Volts Automotive Electrical Systems V DSS = 75V Benefits Advanced Process Technology R DS(on) = 0.007Ω Ultra Low On-Resistance G Dynamic dv/dt Rating 175 C Operating Temperature I D = 140A Fast Switching S Repetitive Avalanche Allowed up to Tjmax Description Designed specifically for Automotive applications, this Advanced Planar Stripe HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175 C junction operating temperature, low RθJC, fast switching speed and improved repetitive avalanche rating. This combination makes the design an extremely efficient and reliable choice for use in higher power Automotive electronic systems and a wide variety of other TO-220AB applications. Absolute Maximum Ratings Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ 10V 140 I D @ T C = C Continuous Drain Current, V GS @ 10V 97 A I DM Pulsed Drain Current 550 P D @T C = 25 C Power Dissipation 330 W Linear Derating Factor 2.2 W/ C V GS Gate-to-Source Voltage ± 20 V E AS Single Pulse Avalanche Energy 430 mj I AR Avalanche Current 82 A E AR Repetitive Avalanche Energy See Fig.12a, 12b, 15, 16 mj dv/dt Peak Diode Recovery dv/dt ƒ 5.5 V/ns T J Operating Junction and -55 to 175 T STG Storage Temperature Range C Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting Torque, 6-32 or M3 screw 10 lbf in (1.1N m) Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case 0.45 R θcs Case-to-Sink, Flat, Greased Surface 0.50 C/W R θja Junction-to-Ambient 62 HEXFET(R) is a registered trademark of International Rectifier. PD - 94291B www.irf.com 1 02/06/02
IRF3808 Electrical Characteristics @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 75 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Voltage Temp. Coefficient 0.086 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance 5.9 7.0 mω V GS = 10V, I D = 82A V GS(th) Gate Threshold Voltage 2.0 4.0 V V DS = 10V, I D = 250µA g fs Forward Transconductance S V DS = 25V, I D = 82A I DSS Drain-to-Source Leakage Current 20 V µa DS = 75V, V GS = 0V 250 V DS = 60V, V GS = 0V, T J = 150 C I GSS Gate-to-Source Forward Leakage 200 V GS = 20V na Gate-to-Source Reverse Leakage -200 V GS = -20V Q g Total Gate Charge 150 220 I D = 82A Q gs Gate-to-Source Charge 31 47 nc V DS = 60V Q gd Gate-to-Drain ("Miller") Charge 50 76 V GS = 10V t d(on) Turn-On Delay Time 16 V DD = 38V t r Rise Time 140 I D = 82A ns t d(off) Turn-Off Delay Time 68 R G = 2.5Ω t f Fall Time 120 V GS = 10V Between lead, D L D Internal Drain Inductance 4.5 6mm (0.25in.) nh G from package L S Internal Source Inductance 7.5 and center of die contact S C iss Input Capacitance 5310 V GS = 0V C oss Output Capacitance 890 pf V DS = 25V C rss Reverse Transfer Capacitance 130 ƒ = 1.0MHz, See Fig. 5 C oss Output Capacitance 6010 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 570 V GS = 0V, V DS = 60V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 1140 V GS = 0V, V DS = 0V to 60V Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 140 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 550 (Body Diode) p-n junction diode. S V SD Diode Forward Voltage 1.3 V T J = 25 C, I S = 82A, V GS = 0V t rr Reverse Recovery Time 93 140 ns T J = 25 C, I F = 82A Q rr Reverse RecoveryCharge 340 510 nc di/dt = A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Starting T J = 25 C, L = 0.130mH R G = 25Ω, I AS = 82A. (See Figure 12). ƒ I SD 82A, di/dt 310A/µs, V DD V (BR)DSS, T J 175 C Pulse width 400µs; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. Limited by T Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. 2 www.irf.com
I D, Drain-to-Source Current (Α) IRF3808 I D, Drain-to-Source Current (A) 0 10 TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 4.5V I D, Drain-to-Source Current (A) 0 10 TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 4.5V 20µs PULSE WIDTH T J = 25 C 1 0.1 1 10 V DS, Drain-to-Source Voltage (V) 20µs PULSE WIDTH T J = 175 C 1 0.1 1 10 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 0.00 3.0 I D = 137A T J = 175 C 2.5.00 T J = 25 C 10.00 V DS = 15V 20µs PULSE WIDTH 1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0 V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 2.0 1.5 1.0 0.5 V GS = 10V 0.0-60 -40-20 0 20 40 60 80 120 140 160 180 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3
C, Capacitance(pF) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) IRF3808 000 V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds C rss = C gd C oss = C ds C gd SHORTED 12 10 I D = 82A V DS = 60V V DS = 37V V DS = 15V 00 0 Ciss Coss V GS, Gate-to-Source Voltage (V) 8 6 4 2 Crss 1 10 V DS, Drain-to-Source Voltage (V) 0 0 40 80 120 160 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 0.00 00.00 T J = 175 C 0 OPERATION IN THIS AREA LIMITED BY R DS (on) 10.00 T J = 25 C µsec 1.00 V GS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 V SD, Source-toDrain Voltage (V) 10 1 Tc = 25 C Tj = 175 C Single Pulse 1msec 10msec 1 10 0 V DS, Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com
IRF3808 140 LIMITED BY PACKAGE V DS R D 120 R G V GS D.U.T. - V DD I D, Drain Current (A) 80 60 40 10V Pulse Width 1 µs Duty Factor 0.1 % Fig 10a. Switching Time Test Circuit 20 0 25 50 75 125 150 175 T, Case Temperature ( C C) Fig 9. Maximum Drain Current Vs. Case Temperature V DS 90% 10% V GS t d(on) t r t d(off) t f Fig 10b. Switching Time Waveforms 1 Thermal Response (Z thjc ) 0.1 0.01 D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t 1 t 2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thjc T C 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5
V GS(th) Gate threshold Voltage (V) IRF3808 15V 800 I D V DS L DRIVER 640 TOP BOTTOM 34A 58A 82A R G 20V tp Fig 12a. Unclamped Inductive Test Circuit tp D.U.T I AS 0.01Ω V (BR)DSS - V DD A E AS, Single Pulse Avalanche Energy (mj) 480 320 160 0 25 50 75 125 150 Starting Tj, Junction Temperature ( C) I AS Fig 12b. Unclamped Inductive Waveforms Q G Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V Q GS Q GD 3.5 V G 3.0 Current Regulator Same Type as D.U.T. Charge Fig 13a. Basic Gate Charge Waveform 2.5 2.0 I D = 250µA 12V.2µF 50KΩ.3µF 1.5 V GS D.U.T. V - DS 1.0-75 -50-25 0 25 50 75 125 150 175 200 3mA T J, Temperature ( C ) I G I D Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature 6 www.irf.com
E AR, Avalanche Energy (mj) IRF3808 0 Duty Cycle = Single Pulse Avalanche Current (A) 0.01 Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses 0.05 10 0.10 1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth 500 400 300 200 0 TOP Single Pulse BOTTOM 10% Duty Cycle I D = 140A 25 50 75 125 150 175 Starting T J, Junction Temperature ( C) Notes on Repetitive Avalanche Curves, Figures 15, 16: (For further info, see AN-5 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see figure 11) P D (ave) = 1/2 ( 1.3 BV I av ) = T/ Z thjc I av = 2 T/ [1.3 BV Z th ] E AS (AR) = P D (ave) t av Fig 16. Maximum Avalanche Energy Vs. Temperature www.irf.com 7
IRF3808 Peak Diode Recovery dv/dt Test Circuit D.U.T* ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - - V GS R G dv/dt controlled by R G I SD controlled by Duty Factor "D" D.U.T. - Device Under Test - V DD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive Period P.W. D = P.W. Period [ V GS =10V ] *** D.U.T. I SD Waveform Reverse Recovery Current Re-Applied Voltage Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Ripple 5% Forward Drop [ V DD ] [ ] I SD *** V GS = 5.0V for Logic Level and 3V Drive Devices Fig 17. For N-channel HEXFET power MOSFETs 8 www.irf.com
IRF3808 TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.14 9 ) 3.54 (.13 9 ) - A - 4.69 (.1 85 ) 4.20 (.1 65 ) - B - 1.32 (.052) 1.22 (.048) 15.24 (.600) 14.84 (.584) 4 6.47 (.2 55 ) 6.10 (.2 40 ) 1 2 3 1.15 (.045) MIN LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOU RC E 4 - DRAIN 14.09 (.555) 13.47 (.530) 4.06 (.160) 3.55 (.140) 3X 1.40 (.0 55 ) 1.15 (.0 45 ) 2.54 (.) 3X 0.93 (.0 37 ) 0.69 (.0 27 ) 0.36 (.0 14 ) M B A M 3X 2.92 (.115) 2.64 (.104) 0.55 (.022) 0.46 (.018) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 C O N TR O L LIN G D IM E N S IO N : INC H 4 H E A T S IN K & LE A D M E A S U R E M E N T S D O N OT INCLUDE BURRS. TO-220AB Part Marking Information EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive (Q101) market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/02 www.irf.com 9
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/