IRT Eurocard. Type AG-738. Stereo Audio Phase / Failure Detector

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I R T Electronics Pty Ltd A.B.N. 000 7 6 Hotham Parade, ARTARMON N.S.W. 06 AUSTRALIA National: Phone: (0) 7 Fax: (0) 7 International: +6 7 +6 7 Email: sales@irtelectronics.com Web: www.irtelectronics.com IRT Eurocard Type AG7 Stereo Audio Phase / Failure Detector Designed and manufactured in Australia IRT can be found on the Internet at: http://www.irtelectronics.com 07ag.ib.rev.doc Page of 6/0/007

IRT Eurocard Type AG7 Stereo Audio Phase / Failure Detector Instruction Book Section Table of Contents Page Operational safety General Description Technical Specifications Technical Description Preinstallation 7 Internal Adjustments Configuration Installation 0 Front & rear panel connector diagrams Maintenance & storage Warranty & service Equipment return Drawing Index This instruction book applies to units later than S/N 0000. Operational Safety: WARNING Operation of electronic equipment involves the use of voltages and currents that may be dangerous to human life. Note that under certain conditions dangerous potentials may exist in some circuits when power controls are in the OFF position. Maintenance personnel should observe all safety regulations. Do not make any adjustments inside equipment with power ON unless proper precautions are observed. All internal adjustments should only be made by suitably qualified personnel. All operational adjustments are available externally without the need for removing covers or use of extender cards. 07ag.ib.rev.doc Page of 6/0/007

IRT Eurocard Type AG7 Stereo Audio Phase / Failure Detector General Description The AG7 audio detector is designed to detect the presence of a stereo program signal and provide alarm outputs on failure of the left, right or both channels and of stereo phase reversal. Alternately the AG7 can be used to monitor two mono audio circuits and provide individual alarm outputs on failure of an audio circuit. The AG7 will accept audio signals in the range 0 dbm to +0 dbm from a balanced or unbalanced source, presenting an input impedance of 0kΩ. The detector circuitry consists of precision rectifier circuits driving comparators, which enable oscillators that trigger dual mono stable circuits that allow the response time of the alarm circuits to be set. The detection threshold of each channel is adjustable within the range 0 dbm to +0 dbm. The response time is set by means of DIP switches in the RC timing circuit and is adjustable from to 60 seconds for the AUDIO FAIL time out and to 0 seconds for the AUDIO PRESENT response time, the adjustment being made in second steps. The alarm circuitry consists of latching circuits triggered by the detector circuits. These drive two relays whose contacts are available at the rear panel of the AG7. The alarm circuits can be reset automatically upon return of the audio signals or by a contact closure from the front panel or a remote circuit. Visual indication of the state of the AG7 detector and alarm circuits is provided by LED indicators on the front panel. The AG7 is built to the Eurocard format and will mount in all IRT standard frames. Standard features: Individual left and right failure outputs. Stereo out of phase output. Adjustable threshold on each output. Adjustable fail and restore times Relay isolated outputs. Front panel indications. Remote, local or auto reset. 07ag.ib.rev.doc Page of 6/0/007

Technical Specifications IRT Eurocard module Type AG7 Audio: Inputs: Type Impedance Max. Input Level Connectors Control: Detection threshold Response time Visual indicators Outputs: Inputs: Connector Power Requirements: Power consumption Tranformerless, balanced bridging. > 0 kω 0 dbm to +0 dbm. Plugable screw block connectors, and Krone IDC connectors. Internal preset adjustments in the range 0 dbm to +0 dbm. 60 seconds for AUDIO FAIL condition. 0 seconds for AUDIO PRESENT condition. Timing adjustable in second steps using PCB mounted DIP switch assemblies. AUDIO FAIL ALARM PHASE AUDIO PRESENT AUDIO PRESENT POWER Relay circuits operated from alarm logic. Latching or autoreset mode available. Make or break relay contacts available. When operated in the LATCHING ALARM MODE internal logic alarm circuits can be reset by a front panel RESET pushbutton or by external V to V to a optoisolator circuit used to isolate the internal logic circuit. Krone IDC connectors. Vac CT (0) or ± 6V DC.0 VA. Other: Temperature range 0 0 C ambient Mechanical Suitable for mounting in IRT " rack chassis with input, output and power connections on the rear panel Finish: Front panel Grey background, black lettering & red IRT logo Rear assembly Detachable silkscreened PCB with direct mount connectors to Eurocard and external signals Dimensions 6 HP x U x 0 mm IRT Eurocard Supplied accessories Optional accessories RB7 rear connector assembly with matching connectors for inputs & outputs. Instruction manual TME6 module extender card 07ag.ib.rev.doc Page of 6/0/007

Technical Description The AG7 circuitry consists of two input amplifiers, signal detectors, a phase detector, logic circuits, timing circuits and relay drivers for the control outputs of the detector. Audio Detector Circuits. Input circuit consists of transformer coupled input T a 0 kω to kω audio transformer with the input circuit built out by resistors R and R and C providing DC isolation between the two input wires. RV provides the secondary load for the transformer and is used to set the sensitivity of the detector circuit. The input signal is amplified by UA and UB wired as voltage amplifiers and rectified by the precision rectifier circuit UC and UD, The resultant DC voltage is applied to one input of UB wired as a comparator circuit, the output signal from UB being used to enable a astable oscillator circuit U7A, to enable NAND gate U7B which is used together with the output from the channel oscillator U7C to indicate the presence of both channels and to turn on the AUDIO PRESENT LED indicator circuit U0F and LD. Similarly input circuit consists of T, amplifiers UD and UC, precision rectifier circuit UB and UA with the resultant DC voltage being applied to comparator UC whose output controls astable oscillator U7C and turns on the AUDIO PRESENT LED indicator circuit U0E and LD. Phase Detector Circuit. The phase detector circuit is designed to take advantage of the fact that most stereo signals do not have much channel separation below khz, however the program content of a stereo signal is similar only for short periods and thus the response delay of the AG7 delay circuits should be shortened for phase detection. When the phase detector is used to check the phase between a monophonic signal transmitted on a stereo circuit this limitation does not exist. The stereo phase indicator circuit consists of UA and UD two 00 Hz low pass filters connected to the outputs of the first audio amplifiers in the detector circuits of each channel. The outputs of the low pass filter circuits are connected to UA a difference amplifier and UD a summing amplifier to provide LR and L+R signals, which are rectified by the D and D0 circuits. The DC voltages from the rectifiers are applied to the two inputs of UC a operational amplifier acting as a comparator. The output of comparator UC controls astable oscillator U7D and turns on the PHASE led indicator circuit U0G and LD. The sensitivity of the phase detector circuit is set at some 6 db less than the audio presence detector circuits and will indicate a IN PHASE condition when the signal is below the threshold of the D, D0 detector circuits. Delay Circuits. The detector outputs all enable astable circuits which provide the clock inputs to monostable timing circuits U and U which are used to provide the delay timing for the alarm latch circuits U6 and U. This enables the timing to be done in preset intervals and be adjusted by means of DIP switches simplifying the setting of the delay times. For the channel one circuit links and are used to select the trigger signals to the delay circuit. UA and UB are retriggerable monostable circuits triggered in sequence by the pulses from the astable oscillator selected by the link setting. The logic levels from pins 6 and of U are gated by AND gate UA to determine if a signal is present and enabling the astable oscillator thus providing trigger pulses to UA pin. UA will time out when trigger signals cease the time being set by the RC network at pin. The time is set by adjusting the resistance using DIP switches SW to SW to short resistor sections. Switch provides a second step, switch 0 a 0 second step, switch a 0 second step, switch a 0 second step and switch a 0 second step. In this way the timing of the delay before a failure is detected can be adjusted from a minimum of second to a maximum of 60 seconds. The first trigger pulse will change the state at U pin 6 and trigger UB for one timing period, this will delay the sensing of the signal present at U pin and thus set the time before the alarm status signal changes. The time is set by adjusting the resistance in the timing network using DIP switches SW, SW and SW6 to give, 0 and 0 second steps, thus the ON delay can be adjusted from to 0 seconds in second steps. UA gates the two logic signals from U, with UB inverting the logic signal, its output being at ground potential with signal present. 07ag.ib.rev.doc Page of 6/0/007

Alarm Latch Circuits. UC and UD are wired to form a BISTABLE latch triggered by negative signals at pins and. If the outputs from U change state then a Volt signal from U/ will cause U/0 to change to ground level and U/ to Volts and thus lock the latch in that state. The ground signal from U/0 will turn on the relay driver circuit U0A and energise relay RL. When the signal level is sufficient to trigger U then the change of state at U/ with LINK 6 inserted will reset the latch circuit and the relay will turn off. Similarly the trigger signals from U7C the astable oscillator enabled by the second audio detector circuit or the gated oscillator signal from the stereo signal gate U7B as set by links and will trigger delay circuits UA and UB. The timing of UA and UB circuits are set by RC circuits whose time is adjusted by changing the value of the resistance in predetermined steps as explained for U using DIP switches SW to SW. U6A gates the logic outputs of U, U6B inverts this signal to trigger the alarm latch U6C and U6D. The relay drive is provided by U0C and the AUTO RESET of the latch circuit with signal present and LINK inserted is provided by U0B. A visual indication of a ALARM condition on either channel is provided by LD which will turn on via D or D6 if either RL or RL is energised. Alarm Latch Reset. The latch circuits can be used to give an indication of a past signal failure when LINKS 6 and are NOT inserted. With link 6 and removed the latch circuits will stay in the ALARM state until a reset is applied to the reset line, this reset can come from the front panel reset pushbutton switch or from the remote reset circuit U. U a opto isolator circuit is used to isolate the remote circuit from the AG7, its input circuit will respond to a voltage in the range to Volts between the input side of R and U pin. Links, and can change the input circuit to provide a ground, direct connection or a feed of the internal Volts to the negative side of the opto isolator input. This will allow the reset to be performed by applying an external to Volt voltage either negative ground or fully floating, or by applying a isolated ground to R input and using the internal Volts supply. Q is a power on reset circuit which applies a reset to U6D and UD when the circuit power is switched on. Power Supply. The power supply circuit consists of a full wave rectifier circuit D to D and a three terminal rectifier circuit U to regulate the resultant voltage down to volts. 07ag.ib.rev.doc Page 6 of 6/0/007

Preinstallation: Handling: This equipment may contain or be connected to static sensitive devices and proper static free handling precautions should be observed. Where individual circuit cards are stored, they should be placed in antistatic bags. Proper antistatic procedures should be followed when inserting or removing cards from these bags. Power: AC mains supply: DC supply: Ensure that operating voltage of unit and local supply voltage match and that correct rating fuse is installed for local supply. Ensure that the correct polarity is observed and that DC supply voltage is maintained within the operating range specified. Earthing: The earth path is dependent on the type of frame selected. In every case particular care should be taken to ensure that the frame is connected to earth for safety reasons. See frame manual for details. Signal earth: For safety reasons a connection is made between signal earth and chassis earth. No attempt should be made to break this connection. Audio input: Reset input: Control outputs: transformer balanced signal connection with Gnd shield pin marked on rear assembly. opto isolated with option for connecting one side to Vdc rail (current limited). relay isolated selectable make or break pair with no connection to ground. 07ag.ib.rev.doc Page 7 of 6/0/007

Internal Adjustments The AG7 detector is factory aligned for correct operation in the stereo mode with the detector thresholds set for a 0 dbm input signal and the response times set for second delay before a change in state occurs. See Configuration for user adjustments. Configuration Relay output mode: The relay contacts used can be the normally open or closed set this is set by selection of links 7,, and 0. Note that the relay is unenergised when operation is normal and energised during an alarm condition. Links 7 and IN the normally closed set Links and 0 IN the normally open set Stereo or channel mono mode: The AG7 can be operated as a stereo detector to check for the presence of both the left and right audio channels and correct phasing of the two channels, or as a dual independent mono audio detector. Links to are used to set the AG7 in the required mode. LK and IN stereo operation LK and IN mono operation Alarm latch reset mode: Links and 6 are used to set the alarm latch reset mode. To enable the alarm latch circuits leave LK and 6 out, this will ensure that if a failure occurs the relay contacts will register the fact until a manual or remote reset is applied. Remote reset mode: The remote reset can be initiated in different ways as set by links, and. Positive voltage: To reset using a positive voltage in the range to Volts with the negative grounded insert links in positions LK and LK. The reset voltage is applied to the control connector J pins and, with being the ground and being the positive control input. Negative voltage: To reset using an isolated or positive grounded voltage in the range to Volts insert a link in position LK. The reset voltage is applied to the control connector J pins and with, being the negative and being the positive input. Relay contact: To reset using a grounding isolated relay contact the internal Volts negative supply can be used, insert links in positions LK and LK. The relay contact is applied between pins and of the control connector, with connected to ground in the AG7. 07ag.ib.rev.doc Page of 6/0/007

Detector threshold: The detector thresholds are set by RV and RV and are factory adjusted for 0 dbm sensitivity. These can be set by applying a KHz audio signal at the required level to the input of the channel to be set and adjusting RV for channel and RV for channel sensitivity. Adjust the potentiometer to just turn off the AUDIO ON LED indicator LD or LD. Note that LD and LD monitor the detector outputs and are thus an instantaneous indication of audio signal exceeding the threshold level, and during operation they will turn on and off indicating program activity. Alarm timing: Signal fail Channel / Phase: As explained in the circuit description DIP switches SW to SW are used to set the time out response of the delay circuit at signal failure of channel when used as a mono audio detector, or out of phase detection when used as a stereo audio detector as set by links and. SW open = seconds, SW 0 open = 0 seconds, SW open = 0 seconds, SW open = 0 seconds & SW open = 0 seconds. Set the response time by opening switches whose time will add up to give the response time required seconds (the minimum time). It is recommended that the time be set to 60 seconds or more when used as an audio detector on channel in the mono mode and at 0 seconds for a phase detector in the stereo mode and the alarm latch be used in the auto reset mode with link 6 IN for out of phase detection. Signal restore Channel / Phase: DIP switches SW to SW 6 are used to set the channel or phase detector response delay to the return of signal or correct phase. SW open = seconds, SW open = 0 seconds & SW 6 open = 0 seconds. Set the response time by opening switches whose time will add up to the response time required seconds (the minimum time). Signal fail Channel / Stereo: DIP switches SW to SW are used to set the time out response of the delay circuit at signal failure of channel when used as a mono audio detector, or either channel when used as a stereo detector as set by links and. SW open = seconds, SW open = 0 seconds, SW open = 0 seconds, SW open = 0 seconds & SW open = 0 seconds. Set the response time by opening switches whose time will add up to give the response time required seconds (the minimum time). It is recommended that the time be set to 60 seconds or more. Signal restore Channel / Stereo: DIP switches SW 6 to SW are used to set the channel or stereo signal detector response delay to the return of signal. SW 6 open = seconds, SW 7 open = 0 seconds & SW open = 0 seconds. Set the response time by opening switches whose time will add up to the response time required seconds (the minimum time). 07ag.ib.rev.doc Page of 6/0/007

Installation Installation in frame or chassis: See details in separate manual for selected frame type. Audio connections: Audio input connections are made using either the three pin screw terminals or the Krone IDC connectors provided with the AG7 rear assembly. For mono operation it is usual to connect the input audio cable to the Left input pins. For stereo connect the Left input cable to the IN input and the Right input audio cable to the IN input. Audio inputs are of high impedance so that the detector may be used in bridging situations. Where this is not the case, and a 600 Ω input termination is required, 60 Ω termination resistors should be fitted to the input sockets. (The 60 Ω in parallel with the 0 kω input impedance results in a 600 Ω input.) Control connections: Control and Alarm output connections are via two pin Krone IDC connectors on the rear assembly. SK SK. RL relay contact (Stereo or CH Fail)*. RL relay common. RL relay contact (Phase or CH Fail)*. RL relay common. Ground. Cct Ground. Reset. Reset + * (Depends on LK setting. See Configuration section for details.) 07ag.ib.rev.doc Page 0 of 6/0/007

Front & rear panel connector diagrams The following front panel and rear assembly drawings are not to scale and are intended to show relative positions of connectors, indicators and controls only. AG7 RB7 AUDIO DETECTOR P INPUT AUDIO ALARM PHASE AUDIO ON RESET INPUT + Gnd INPUT + Gnd SK REL COM. REL CON. REL COM. REL CON. SK INPUT + G + G SK GROUND CCT GND RESET RESET + SK DC N0 P 07ag.ib.rev.doc Page of 6/0/007

Maintenance & Storage Maintenance: No regular maintenance is required. Care however should be taken to ensure that all connectors are kept clean and free from contamination of any kind. This is especially important in fibre optic equipment where cleanliness of optical connections is critical to performance. Storage: If the equipment is not to be used for an extended period, it is recommended the whole unit be placed in a sealed plastic bag to prevent dust contamination. In areas of high humidity a suitably sized bag of silica gel should be included to deter corrosion. Where individual circuit cards are stored, they should be placed in antistatic bags. Proper antistatic procedures should be followed when inserting or removing cards from these bags. Warranty & Service Equipment is covered by a limited warranty period of three years from date of first delivery unless contrary conditions apply under a particular contract of supply. For situations when No Fault Found for repairs, a minimum charge of hour s labour, at IRT s current labour charge rate, will apply, whether the equipment is within the warranty period or not. Equipment warranty is limited to faults attributable to defects in original design or manufacture. Warranty on components shall be extended by IRT only to the extent obtainable from the component supplier. Equipment return: Before arranging service, ensure that the fault is in the unit to be serviced and not in associated equipment. If possible, confirm this by substitution. Before returning equipment contact should be made with IRT or your local agent to determine whether the equipment can be serviced in the field or should be returned for repair. The equipment should be properly packed for return observing antistatic procedures. The following information should accompany the unit to be returned:. A fault report should be included indicating the nature of the fault. The operating conditions under which the fault initially occurred.. Any additional information, which may be of assistance in fault location and remedy.. A contact name and telephone and fax numbers.. Details of payment method for items not covered by warranty. 6. Full return address. 7. For situations when No Fault Found for repairs, a minimum charge of hour s labour will apply, whether the equipment is within the warranty period or not. Contact IRT for current hourly rate. Please note that all freight charges are the responsibility of the customer. The equipment should be returned to the agent who originally supplied the equipment or, where this is not possible, to IRT direct as follows. Equipment Service IRT Electronics Pty Ltd 6 Hotham Parade ARTARMON N.S.W. 06 AUSTRALIA Phone: 6 7 Fax: 6 7 Email: service@irtelectronics.com 07ag.ib.rev.doc Page of 6/0/007

Drawing Index Unless otherwise specified all references on diagrams to AG6 refer equally to the AG7. Drawing # Sheet # Description 0 AG7 audio circuit schematic 0 AG7 logic circuit schematic 0 RB7 rear assembly circuit schematic 07ag.ib.rev.doc Page of 6/0/007

a,b a,b a,b R K 7a,b a,b a,b U0E a,b a,b 6a,b MC6 U7C 0 0 a,b C6 00nF R 00K U7B 6 0 a,b a,b U0G 7 0 R K J U7D 0 R 00K V U0F 6 MC6 UA 0 U7A 0 v UA 0 7 AUDIO PRESENT LK CH COPYRIGHT U/ LK DO NOT COPY NOR DISCLOSE TO ANY THIRD PARTY WITHOUT WRITTEN CONSENT STEREO PHASE LK PHASE U/ AUDIO PRESENT LK CH SIZE TITLE AG6/7 AUDIO DETECTOR SCALE DRAWING No. 0 IRT Electronics Pty. Ltd. ARTARMON NSW AUSTRALIA 06 SHEET OF 7/0/ ECN 66 /0/6 C uf C uf K C 0nF K C 0nF RV C R7 K 0K uf R K C0 0nF C 00nF R6 K C 0pF K.N. C7 00nF R R0 K K C6 C 0nF 0pF RV C R K 0K uf C p C p UD 0 UA 0 UA 0 C6 p C7 p O C C C C0 u uf uf uf C uf C uf C uf C uf C uf C uf 0 0 UC 0 UC DRAWN CHECKED ENG. APP. CONTRACT No. 0 MC6 LD GRN LD GRN LD GRN UD 0 0 UC 0 6K UB 7 6 0 UB 7 6 0 0 UC 0 C 00n UD 0 6 UB 0 7 D N00 D N00 D N00 D N00 C 000u UD 0 C uf N C uf D N C 00nF C7 00nF I G R K R K R K R K F R7 F R7 F R7 F R7 R 7 U C0 u R R0 0K 6K R 0K R0 0K R R 0K R 0K R 0K R 0K R K R7 0K R 0K R 0K R 00K R 0K R K R M D N D6 R K R 0K R6 0K R6 00K R6 0K R K R7 M R K R 00K T MO R T MO R7 0K R 0K R0 0K R 0K D7 N D R 0K R 0K R 0K R0 0K R 0K D N D0 R K R 0K R7 K R6 K R 0K

R K AUDIO ALARM LD RED 0a RL a (LINK FOR MAKE OR BREAK CONTACT USE) a RL 0b (LINK FOR MAKE OR BREAK CONTACT USE) b + 6 R M R0 b 00 LK LK LK C7 nf (LINK FOR INTERFACE TO REMOTE RESET) AG6/7 AUDIO DETECTOR (FAIL DELAY 60 SEC) D (ON DELAY 0 SEC) 6 v v v v 6 LK, COMMON LK, COMMON RESET POWER (RL ALARM LATCH) 7 (LINK FOR AUTO RESET) (LINK FOR AUTO RESET) 0 0 7 (RL ALARM LATCH) (POWER ON RESET) SHEET OF D6 N D N LK7 LK U0C MC6 LK LK0 U0A 6 MC6 R K R K U N D N7 C nf COPYRIGHT TITLE SIZE DO NOT COPY NOR DISCLOSE TO ANY THIRD PARTY WITHOUT WRITTEN CONSENT 7/0/ U6A 0 6 U6B 0 U6C LK 0 U6D 0 UD UA 0 K.N. 0 DRAWING No. SCALE IRT Electronics Pty. Ltd. ARTARMON NSW AUSTRALIA 06 DRAWN CHECKED ENG. APP. CONTRACT No. 0 UC D N 0 0 MC6 U0B SW SW SW SW SW N SW6 SW7 SW R6 00K R R6 R7 UB UA 0 Q RC 6 Q 6 UB MC6 U0D LK6 D7 N RC CX CX +T +T Q N0 T 7 T Q R Q R (FAIL DELAY 60 SEC) D (ON DELAY 0 SEC) SW SW0 SW SW SW N SW SW SW6 UB UA 0 Q RC 6 Q RC CX CX +T T +T T v v v v Q 7 R C CA Q R C 7u u R6 0K 7u CA CA u SW7 LD GRN C0 C0A 7u u R u R R66 00 C 7u R7 0K R60 R6 R0 00 C 00nF R6 R67 0K R6 0K 0K 70K 0K M 00K 0K 0K 70K D N C 00nF R 00 R7 00K R6 R70 R6 K R 0K C6 uf R7 R7 R7 R7 R7 R76 R77 0K 0K 70K 0K M 00K 0K 0K 70K R7 K R K R6 00

RL RELAY CONTACT RL RELAY CONTACT SK RL RELAY CONTACT RL RELAY CONTACT GROUND CCT GND SK RESET RESET + COPYRIGHT DO NOT COPY NOR DISCLOSE TO ANY THIRD PARTY WITHOUT WRITTEN CONSENT DRAWN K.N. CHECKED ENG. APP. Revision: Date: Dec006 SIZE Title RB7 A AG7 REAR ESSEMBLY SCALE Sheet Drawing No. 0 N.T.S. of IRT Electronics Pty. Ltd. ARTARMON NSW AUSTRALIA 06 /0/6 J DIN6 A B A B A B A B A B 6A 6B 7A 7B A B A B 0A 0B A B A B A B A B A B 6A 6B 7A 7B A B A B 0A 0B A B A B A B A B A B 6A 6B 7A 7B A B A B 0A 0B A B A B TX P RX 6 SKA + INPUT G SKB + INPUT G SKA + INPUT G SKB + INPUT G P 7 J STEREO OR CH FAIL PHASE OR CH FAIL 000 ECR7