Chapter 11 Differential Amplifier Circuits 11.0 ntroduction Differential amplifier or diff-amp is a multi-transistor amplifier. t is the fundamental building block of analog circuit. t is virtually formed the differential amplifier of the input part of an operational amplifier. t is used to provide high voltage gain and high common mode rejection ratio. t has other characteristics such as very high input impedance, very low offset voltage and very low input bias current. Differential amplifier can operate in two modes namely common mode and differential mode. Each type will have its output response illustrated in Fig. 11.1. Common mode type would result zero output and differential mode type would result high output. This shall mean the amplifier has high common mode rejection ratio. Figure 11.1: Differential amplifier shows differential inputs and common-mode inputs - 93 -
f two input voltage are equal, the differential amplifier gives output voltage of almost zero volt. f two input voltages are not equal, the differential amplifier gives a high output voltage. Let s define differential input voltage in(d as in(d = in1 in and common-mode input voltage in(c = in 1 + in voltage one and two are respectively equal to. From these equations, input in1 = in(d in (c + (11.1 and in = in (d in (c (11. The input voltage represented by common-mode voltage and differential voltage is shown in Fig. 11.. Figure 11.: mall differential and common-mode inputs of a differential amplifier Let out1 be the output voltage due to input voltage in1 and out be the output voltage due to in. The differential-mode output voltage out(d be defined as out(d = out1 out and common-mode output is defined out(c = Combining these equations yield out1 as out respectively as equal to 1 out out +. out1 = out (d out (c + (11.3-94 -
and out = out (d out (c (11.4 Let A 1 = out1 / in1 be the gain of differential amplifier due to input in1 only and A out / in due to input in only. Then from superposition theorem, the output voltage out is equal to out = A 1 in1 + A in. After substituting in1 and in from equation (11.1 and (11., the output voltage out is equal to out = A + + A in(d in(d 1 in(c in (c (11.5 Equation (11.5 is also equal to out = A (dm in(d +A (cm in(c, where the differential voltage gain is A (dm = (A 1 A / and common-mode voltage gain is A (cm = (A 1 + A. The ability of a differential amplifier to reject common-mode signal depends on its common-mode rejection ratio CMRR, which is defined as CMRR = A A (dm (cm (11.6 From out = A (dm in(d +A (cm in(c, output voltage out is equal to out = (dm 1 CMRR A (11.7 in(d + in (c Equation (11.7 clearly indicates that for large CMRR value, the effect of common-mode input is not significant to the output voltage. Example 11.1 A differential amplifier shown in figure below has differential gain of,500 and a CMRR of 30,000. n part A of the figure, a single-ended input of signal 500µ rms is applied. At the same time a 1, 50Hz interference signal appears on both inputs as a result of radiated pick-up from ac power system. n part B of the figure, differential input signal of 500µ rms each is applied to the inputs. The common-mode interference is the same as in part A. - 95 -
1. Determine the common-mode gain.. Express CMRR in db. 3. Determine the rms output signal for part A and B. 4. Determine the rms interface voltage on the output. olution 1. The common-mode gain cm = A (dm /CMRR=,500/30,000 = 0.083.. CMRR = 30,000. Also 0log(30,000 = 89.5dB. 3. The difference input for part A is 500µ - 0 = 500µ. Thus, the rms output is A (d x 500µ =,500 x 500µ = 1.5rms The difference input for part B is 500µ - (-500µ = 1m Thus, the rms output is A (d x 1m =,500 x 1m =.5rms. 4. ince the common-mode gain A cm is 0.083 (from answer 1, then output voltage of interface from 1 50Hz ac pick-up is A cm x 1 = 0.083. 11.1 Bipolar Junction Transistor Differential Amplifier Consider an emitter coupled bipolar junction transistor differential amplifier shown in Fig. 11.3. Assuming that the physical parameters of transistor Q 1 and Q are closed to identical. With the modern fabrication technique and fabricating the transistor Q 1 and Q in close approximity in the same wafer slide, close to identical physical parameters for both transistors are achievable. - 96 -
Figure 11.3: A bipolar junction transistor differential amplifier 11.1.1 dc Characteristics Using Kirchhoff s voltage law, the voltage at emitter E1 and E, of the amplifier is in1 - BE1 = in - BE. From the theory of semiconductor physics, the collector current C of a bipolar transistor is equal to C = [ BE T ] - 97 - exp( / 1, where is the reverse saturation current, which is design dependent. T is the thermal voltage, which has value approximately equal to 5.0m at temperature 300K. Under normal operating conditions the term exp( BE / T >> 1, thus, the base-to-emitter voltage BE is equal to BE1 = voltage in(d = ( in1 - in shall then be equal to in(d = T ln C1 1 C T ln C. The differential input (11.8 For identical transistor pair reverse saturation current is 1 = and in(d = T ln C1 C equal to. The ratio of collector current of transistor Q 1 and transistor Q is
C1 C = exp in( d T (11.9 The emitter current is E = E1 + E, which is also equal to E = C1 + C α. Using this equation and equation (11.9, the collector current C1 and C of the transistor are separately derived shown in equation (11.10 and (11.11. C1 C α E = 1+ exp α E = 1+ exp in( d T in( d T (11.10 (11.11 The current transfer characteristic curve showing the plot of collector current of transitor Q 1 and Q versus the differential input voltage in(d is shown in Fig. 11.4. Figure 11.4: The current transfer characteristic curve of a bipolar junction transistor differential amplifier From the characteristic curve, once can notice that for several T values such as in(d > 4 T, either C1 >> C or C1 << C shall be obtained. For in(d < T, the collector current is almost linear. - 98 -
At the output side, the output voltage are out1 = CC - C1 R C and out = CC - C R C respectively. The differential output voltage out(d shall be out(d = R C ( C - C1. The differential output voltage out(d also equal to = α R out( d E C 1 1+ exp 1 1+ exp in( d in( d T T (11.1 This equation is also equal to = α R out( d E C tanh 1 / ( 1+ exp( ( / = exp ( ( / / ( exp( ( / + exp( ( / = 1 / ( 1+ exp( ( / = exp ( ( / / ( exp( ( / + exp( ( / in( d T since C = in d T in d T in d T in d T and C1 in d T in d T in d T in d T. The transfer characteristic of the output shall be as shown in Fig. 11.5. Figure 11.5: Output transfer characteristic curve of a BJT differential amplifier From the analysis, one can see that to increase the range of input voltage so that it has more linear operating region, a seperate emitter resistor which is termed as emitter-degeneration resistor, can be added to each transistor instead of sharing emitter resistor. This is becasue emitter current of each transistor will be double instead of half. This configuration will also improve the bandwidth of the amplifier. 11.1. Differential Mode The differential input circuit of the amplifier is shown in Fig. 11.6. - 99 -
Figure 11.6: Differential input circuit of an emitter couple BJT differential amplifier Asssuming identical transistor, the increase of emitter voltage by in1 i.e in(d / is compensated by the decrease of same value of emitter voltage by in i.e. in(d /. Thus, the voltage at emitter E 1 and E remain unchange. Thus, the emitter current e is approximately zero. As the result the potential at emitter is regards as same potential as ground level and R E is treated as short. Based on the analysis, the ac differential input circuit of the amplifier can be splitted into two half circuits as one is shown in Fig. 11.7. Figure 11.7: ac differential mode half circuit of an emitter coupled BJT differential amplifier - 300 -
The corresponding ac circuit of the half circuit amplifier is shown in Fig. 11.8. The output voltage is equal to Figure 11.8: ac circuit of circuit shown in Fig. 11.7 out (d m C o in(d = g ( R r (11.13 Thus, the differential-mode gain A (dm is equal to A (dm out(d = = g ( R r (11.14 in(d m C o The differential input impedance R in(d can be obtained from equation in (d/ = i b1 r. Thus, the differential input impedance is equal to R in(d = r (11.15 The differential output impedance R out(dm can be obtained from equation out(dm / = i C (r o R C. Thus, the differential output impedance R out(dm is equal to R out(d = (r o R C (11.16 11.1. Common Mode The common input circuit of the amplifier is shown in Fig. 11.9 and its corresponding half circuit is shown in Fig. 11.10. ince emitter voltage at emitter E 1 and E is changing, therefore, the emitter resistance of the half circuit should be R E instead of R E after splitting into two half circuits. - 301 -
Figure 11.9: Common input circuit of an emitter couple BJT differential amplifier Figure 11.10: ac common mode half circuit of an emitter coupled BJT differential amplifier The corresponding ac circuit of the half circuit amplifier is shown in Fig. 11.11. - 30 -
Figure 11.11: ac circuit of circuit shown in Fig. 11.10 At input side, in(c = i b1 r +i b1 (β+1r E. Thus, the common-mode input impedance R in(c is equal to R in(c = [r + (β +1R E ] (11.17 The common-mode output impedance R out(c is equal to (R C r o. The output common-mode voltage out(c = -βi b1 (R C r o. The commonmode gain A (cm is equal to A (cm = out (c in (c = i b1 βi b1 (R C r [ r + R ( β + 1 ] E o = g 1+ g m R R E r m C o (11.18 (1 + 1/ β 11.1.3 Common Mode Rejection Ratio The common-mode rejection ratio of the emitter coupled BJT differential amplifier is equal to CMRR = A (dm /A (cm. Thus from equation (11.14 and (11.18, common-mode rejection ration is g (R m C o CMRR = [ 1+ g R (1 + 1/ β ] =[ + g R (1 + 1/ β ] (R C r r o m E 1 m E (11.19 For large beta value, the common rejection ratio is approximately equal to CMRR = 1+. Thus, one can see for high common rejection ratio CMRR, [ ] g m R E - 303 -
the differential amplfier should be designed with high emitter resistance and high transconductance values. 11. JFET Differential Amplifier A JFET differential amplifier is shown in Fig. 11.1 and its ac equivalent circuit is shown in Fig. 11.4. ince JFET has very high impedance, it satisfies the high impedance and low input bias current requirements for the differential amplifier. Theoretically, the JFETs M 1 and M should have same physical parameters. This can be achieved via modern fabrication technique. This shall also mean that close to zero offset voltage is also achievable. Figure 11.1: A JFET differential amplifier 11..1 dc Characteristics Using Kirchhoff s voltage law, the voltage at source of the amplifier is - in1 + G G1 + in G = 0. Drain current of JFET is D = D 1. Therefore, G1 G(off D1 = 1 and D G G(off D G(off D = 1. ince in1 + in = G - 304 -
G1, in1 in = equation becomes G(off D D G(off D1 D. ince in1 in = in(d, this in (d G(off = D D D1 (11.0 D current is equal to the sum of D1 and D. Thus, is = D1 + D. ubstituting this equation into equation (11.0 and solve the resultant quadratic, it yields drain current one and two, which are D1 = 1/ in (d D in (d D + (11.1 G(off G(off and D = 1/ in(d D in(d D (11. G(off G(off The equation for drain current is only true for sum of the drain currents less than D current. The plot of drain current versu input differential voltage in(d is shown in Fig. 11.13. Figure 11.13: The current transfer characteristic curve of a JFET differential amplifier - 305 -
The output voltage out1 and out are respectively equal to DD D1 R D and DD D R D. The differential output voltage out(d = out1 v out = R D ( D D1. ubstuting equation (11.1 and (11. yields the differential output voltage out(d as out(d = 1/ R D D in (d D in(d G(off G(off (11.3 11..1 Differential Mode The differential input of the JFET differential amplifier can be analyzed like the way how the anlysis is done for BJT counterpart. The half circuit of the amplifier is shown in Fig. 11.14. Figure 11.14: ac differential mode half circuit of a JFET differential amplifier The corresponding ac circuit of the half circuit amplifier is shown in Fig. 11.15. Figure 11.15: ac circuit of circuit shown in Fig. 11.14-306 -
The output voltage out(d / is equal to out (d m D o in(d = g ( R r (11.4 Thus, the differential-mode gain A (dm is equal to A (dm out(d = = g ( R r (11.5 in(d m D 0 Normal R D << r o then the differential-mode gain A (dm is A out(d (dm = = g mr D. in(d 11.. Common Mode The common input circuit of the amplifier is shown in Fig. 11.16 and its corresponding half circuit is shown in Fig. 11.17. ince source voltage at emitter 1 and is changing, therefore, the emitter resistance of the half circuit should be R D instead of R D after splitting into two half circuits. Figure 11.16: Common input circuit of a JFET differential amplifier - 307 -
Figure 11.17: ac common mode half circuit of a JFET differential amplifier The corresponding ac circuit of the half circuit amplifier is shown in Fig. 11.18. Figure 11.18: ac circuit of circuit shown in Fig. 11.17 At input side, common-mode input voltage is in(c = gs1 + g m gs1 R. Thus, the common-mode input impedance R in(c = in (c gate is equal to R in(c = + g gs m gate gs R = R in(gate (1 + g m R (11.17-308 -
where gs / gate = R in(gate. Depending on the value of R in(gate that can be a infinite value for very small gate current. The output common-mode voltage out(c = -g m gs1 (R D r o. The commonmode gain A (cm = out (d in (d is equal to A (cm = g gs1 (R + g m r gs1 R m gs1 D o m D o = (116 g (R 1+ g m r R 11..3 Common Mode Rejection Ratio The common-mode rejection ratio of the JFET differential amplifier is equal to CMRR = A (dm / A(cm. Thus from equation (11.5 and (11.6, common-mode rejection ration is g m D o CMRR = [ 1+ g R ] g m (R (R D r r o m = [ ] g m R 1+ (11.7 11.3 MOFET Differential Amplifier A JFET differential amplifier is shown in Fig. 11.19. Using Kirchhoff s voltage law, the voltage at source of the amplifier is - in1 + G1 + in G = 0. µ C n ox Drain current of MOFET is D = ( = K (, where K n = µ n C ox W L W L D K G. This implies that G = + tn. From equation - in1 + G1 + in G = 0. The differential input voltage in(d is tn n G tn in(d = in1 in = K D K D1 + tn - tn = D 1 K D K (11.8 From Kirchhoff s current law, = D1 + D and substituting in(d. The drain currents are dound to be - 309 -
D1 = 1/ in(d (in (d / + K n 1 (11.9 ( / K n and D1 = 1/ in (d (in(d / K n 1 (11.30 ( / K n Figure 11.19: A MOFET differential amplifier The output voltage out1 = DD D1 R D and out = DD D R D. The differential output voltage is out(d = out1 out = R D ( D D1. ubstituting equation (11.9 and (11.30 into this equation yields the differential output voltage out(d equal to K 1/ n out(d = R D in(d (11.31 Employing the method used in JFET differential amplifier analysis, the common-mode gain A (cm and differential-mode gain A (dm are found to be - 310 -
A (cm = g (R r m D o and A (dm = (dm g mr D 1+ g mr 11 Differential Amplifier Circuits A respectively. ubsequently, the common-mode rejection ratio CMRR is found to be CMRR = [ ] 11.3.1 Active Load MOFET Differential Amplifier 1+ g R. m Let s consider an active load MOFET differential amplifier shown in Fig. 11.0. MOFET M 1 and M formed the differential pair. They have same design parameters. MOFET M 5 is current sink, which provides the bias current to the amplifier. MOFET M 3 and M 4 form a current mirror, which is assumed to have same design parameters. From Kirchhoff s current law, current D5 is equal to the sum of current D1 and D. f the input voltage in1 and in are equal then current D1 = D = D3 = D4. This shall mean the output current out is equal to zero. Thus, output voltage out is equal to zero. f the input voltage in1 is greater than in, which in1 > in, then current D1, D3, and D4 are equal. This shall mean current D1 is greater than D. Therefore, at output node current is D4 = D + out. This result implies that the output voltage is a positive value. f the input voltage in is greater than in1, which in > in1, then current D1, D3, and D4 are equal. This shall mean current D1 is less than D. This implies that current D is equal to the sum of current D4 and out. i.e. D = D4 + out. The differential input voltage is in(d = ( in1 in. For each input of the differential pair would see a change of ( in1 in / = in(d /. Thus, a change in input in(d / will result a change of g m in(d / for the drain current of MOFET M 1 and M. The ac equivalent circuit of output side is shown in Fig. 11.1. be The differential voltage gain A (dm of the differential amplifier is found to 1 out A (dm = = (g + g (r r R in in1 m m4 O O4 L (11.3-311 -
Figure 11.0: An active load MOFET differential amplifier From Kirchhoff s voltage law, output voltage is out = - (g m in(d / +g m4 in(d /(r o1 r o4 R L. Therefore, the differential voltage gain A (dm is A v(dm out 1 = = (g m + g m4 (ro ro4 R L in in1 n normal circumstance transcondctance g m is equal to transconductance g m4. i.e. g m = g m4. Thus, the differential gain is A (dm = g m (ro ro4 R L. ince the output impedance of the MOFET r o4 and r o are large, it can be assumed that they are equal. f the load R L is not connected then the differential gain equation A g. m (dm = ro, where r o4 = r o = r o. The equation demonstrates that the differential gain is a large constant for a given MOFET in active load configuration. - 31 -
Figure 11.1: ac model of the half circuit of an active load MOFET differential amplifier 11.4 BiCMO Differential Amplifier The differential mode gain of a BJT differential amplifier is equal to A (dm = - g m r o. t is also equal to A C A A (dm = =. This result shows that the T C T gain is a constant value. For a typical Early voltage A of 50 and thermal voltage T of 5m, the gain is,000/. Thus, lowering the collector current C will improve input impedance but reducing g m, thus, scarifying bandwidth because the unity gain frequency f T of BJT is impedance of the BJT is equal to r β T = = β. g m C - 313 - (C g m µ + C. The input The differential mode gain A (dm of a MOFET differential amplifier is equal to A (dm = -g m r o = M K D = D M K D, which shall mean gain is inversely proportional to D. ince the thermal voltage M of MOFET is much lower than the thermal voltage of BJT differential amplifier, the differential gain A (dm of BJT is much higher than differential gain of MOFET differential amplifier. f drain current D is lower, the bandwidth of the amplifier reduces because the transconductance g m is proportional to D and the unity gain frequency f T is proportional to transconductance g m. The input impedance of the MOFET has infinite value. Combining the high gain of BJT and infinite impedance of MOFET will lead to BiCMO differential amplifier design that
can be a basic configuration, cascade configuration, active load configuration, etc. The circuit of active load BiCMO differential amplifier is shown in Fig. 11.. Figure 11.: An active load BiCMO differential amplifier The differential voltage gain A (dm of the BiCMO differential amplifier is equal to whereby 1 out A v(dm = = (g + g (r r R M g m =, D5 in in1 M g m4 =, D5 m m4 O O4 M r O4 =, and D5 L (11.33 M r O =. n normal D5 circumstance g m = g m4. Thus, the differential gain is A (dm = in out in1 = g Example 11. m (r O r O4 R L. - 314 -
A BiCMO differential amplifier as shown in Fig. 11.1 has D5 = 10µA, identical BJT with A = 50 and β = 40, identical MOFET with M = 0, K = 5µA/, W = 30µm, L = 10µm, G = 1.0, DD = 10 and = 10 Determine the differential gain of the amplifier without the load R L and bias voltage. olution The output impedance of the BJT is A / D5 = x50/10µa = 4MΩ. The output impedance of the MOFET is M / D5 = x0/10µa = 10MΩ. The overall output impedance R O of differential amplifier is 4MΩ 10MΩ =.86MΩ. The transconductance g m of MOFET is.36µa/. K = x5µ A / x10 A = D 5 µ Thus, the differential voltage gain A (dm is -g m R O = -.36x.86MΩ = - 63.9. The gate-to-source voltage of MOFET M 5 is 1.5. The current D5 is D5 = C OX µ n W L ( =.5x10-5 x3/( G 1.0 = 10µA. This implies that G G is equal to 1.51. tn ince = - 10 and G = bias -, bias is equal to -8.49. 11.5 Cascode Differential Amplifier Let s discuss one type of cascade differential amplifier, which is bipolar junction transistor type. Consider a BJT cascode differential amplifier shown in Fig. 11.3. This configuration is usually to improve the output resistance for the gain and frequency response. Transistor Q 5 and Q 6 are connected as common base amplifier. The half circuit of the amplifier is shown in Fig. 11.4. The ac circuit of the half circuit amplifier is shown in Fig. 11.5. From the ac circuit r 6 /(β+1 is parallel to r o i.e. r 6 /(β+1 r o. All r o, r o4, and r o6 are the same because the collector current flows in them are the same r o. The transconductance g m, g m4, and g m6 should be equal to g m. - 315 -
Figure 11.3: A BJT cascode differential amplifier - 316 -
Figure 11.4: Half circuit of a BJT cascade differential amplifier g (r R The output voltage is equal to out = m in (d o L. Thus, the differentialmode gain is equal to A (dm = g (r R. m o L Figure 11.5: ac circuit of the half circuit differential amplifier 11.6 Effect of Device Mismatch An ideal BJT differential amplifier has identical transistor pair and bias resistors. This shall mean that if the differential input voltage in(d is zero then the differential output voltage out(d should be zero. n reality, there should have some mismatch in the bias resistor and the transistor pair should have offset difference. The offset voltage of a differential amplifier os is defined the input differential voltage in(d required to drive the output differential voltage out(d to zero voltage. From Fig. 11., the offset voltage os shall be os = be1 - be, which is also equal to os = T ln C1 1 C (11.34 Offset voltage can also be expressed as the change of collector resistance and reverse saturation current of the transistors in which it follows equation (11.35. - 317 -
os = T R R C C (11.35 where R C = R C1 - R C, = 1 -, R C = R R C1 + C, and C = + 1. 11.7 Frequency Response of Differential Amplifier f the base resistor R B is added to the bipolar junction transistor differential amplifier circuit shown in Fig. 11., then the differential mode voltage gain A (dm shall be A v(dm = g R m C r r + R B. From the earlier analysis of high frequency response of the common-emitter configuration, the differential mode voltage gain transfer function is A v(dm (s = r 1 g mr C, where C r + R B 1+ s( r R B (C + CM M is Miller's 1+ sr C (Cµ + Cce capacitance, which is equal to C µ (1 + g m R C and C µ is the collector-to-base capacitance. From the function, it shows there are two critical frequency f H and f H1 determined by 1 [ r R (C C ] B + M and 1 1 [ R B( C + Cce ] µ. However, due to very small value of C ce and C µ, and small R C, the critical frequency is extremely high, which can be infinite. ince there is no coupling capacitor in the circuit, the bandwidth different mode gain shall be from zero Hz frequency to f H. The frequency response is shown in Fig. 11.6. The frequency response for the common mode voltage gain of the amplifier can be analyzed using small signal equivalent half circuit shown in Fig. 11.7 and the emitter current source is replaced with a capacitor C o and a resistor R o. - 318 -
- 319 - Figure 11.6: Frequency response of differential mode gain Figure 11.7: ac equivalent circuit of the common mode differential amplifier The common mode output voltage out(c is -g m R C. At base-to-emitter loop, from Kirchhoff s voltage law, it produces in(c (s = + + + o o m B sc 1 R g / r R / r or in(c (s = + β + + + o o o B C sr 1 R r 1 1 r R. ubstituting from out(c (s equation, the commom mode voltage gain A (cm (s shall be
A (cm (s = g R ( 1+ sr C m C o o R B ( 1+ β R 1+ ( 1+ sr oco + r r o (11.36 The gain equation shows that there is a zero and a pole. From the zero, the critical frequency f Z shall be 1/ ( R o C o. The zero also explains why C o parallel with R o. At low frequency, C o is a open circuit and the common signal see impedance R o. As frequency increase, the impedance C o decreases and R o becomes bypassed. ince the current source can has very high resistance R o and small capacitance C o, the critical frequency can be very small. oon the operating frequency is more than the critical frequency, the gain of the amplifier increases at the rate 0 db/decade or 6 db/octave. Figure 11.8 illustrates the freqeuncy response. Figure 11.8: Frequency response of the common mode gain From equation (11.36, the critical frequency of the pole is 1 f P = R eqco (11.37 where R eq R B R o1+ r = R B ( 1+ β R 1+ + r r o. The denominator of this resistance R eq is very large due to (1 + βr o term. This shall mean that R eq is very small. Therefore, the critical frequency is very high. - 30 -
f the ratio of the frequency response for differential mode gain and common mode gain is plotted, then the frequency response of common mode rejection ratio shall be obtained and it is shown in Fig. 11.9. Figure 11.9: Frequency response of the common mode rejection ratio - 31 -
Exercises 11.1. An active load emitter coupled BJT differential amplifier is shown in the Fig. i. Draw differential half circuit for the amplifier. ii. how that the differential-mode gain A (dm = g m (ro ro4 R L. iii. f r o = r o4 = r o, prove that the differential-mode gain is equal to A A (dm =. T iv. Calculate the room temperature differential-mode gain of the amplifier if the Early voltage of the transistor is 80 and express the result in decibel. v. Comment the result. 11.. An n-channel MOFET differential amplifier is shown below. Both MOFETs have aspect ratio W/L = 5µm/1.0µm, µ n C ox = 50µA/, threshold voltage T = 0.6, and DD = 3.0. You may use equation D = Wµ ncox = G L ( same design parameters. T for calculation and assume both MOFET's have - 3 -
i. Prove that the common mode gain of the amplifier is R D / 1 / ( g + R ii. What is the common mode input voltage in1 = in for the voltage drop across resistor R to be 0.6? iii. What should be the value of resistor R for maintaining 0.6 voltage drops across it? 11.3. An n-channel MOFET differential amplifier is show below has common mode gain follow expression R D / 1 / ( g + R m. Both MOFETs have aspect ratio W/L = 5µm/1.0µm, µ n C ox = 50µA/, threshold voltage T = 0.6, R = 600Ω, and DD = 3.0. You may use equation D = Wµ ncox = G L ( same design parameters. T for calculation and assume both MOFET's have m. - 33 -
i. Prove that the differential mode gain of the amplifier is g R m D. ii. Derive the equation for transconductance g m. iii. Derive the formula for the common rejection ratio for the amplifier. tate a way to improve this parameter. iv. Calculate the common rejection ratio of this amplifier and express the result in decibel. 11.4. The parameters of the emitter-coupled pair BJT differential amplifier are β = 100, R E = 50 kω, E = 1mA, CC = 15, R C = 10 kω. i. Calculate the dc collector current of in(d = 5m. ii. Calculate the CMRR of the amplifier. 11.5. The design of JFET differential amplifier is shown in the Fig. with one input terminal is grounded. The dc biasing current = 10mA, DD = = 15. The JFETs are identical and have G(off = - 4.0 and D = 0mA. A small signal voltage of A 1 = -10 is required. Calculate the design values of A (dm, A (cm, and CMRR. - 34 -
11.6. Calculate the differential gain of the given MOFET amplifier circuit shown in the in figure. Given that bias = - 3.5, µ n C ox = 5.x10-5 A/, µ p C ox =.1x10-5 A/, tn = 0.7, tp = - 0.7, (W/L 1, = 40, (W/L 3,4 = 0, (W/L 5 = 40, (1/λ 1, = 0.01, (1/λ 3,4 = 0.0, and R L = 5.0kΩ. - 35 -
Bibliography 1. Jacob Millman and Arvin Grabel, "Microelectronics", second edition, McGraw-Hill nternational Editions, 1987.. Muhammad H. Rashid, "Microelectronic Circuits: Analysis and Design", PW Publishing Company, 1999. 3. Robert T. Paynter, "Electronic Devices and Circuits", fifth edition, McGraw-Hill, 1997. 4. Adel. edra and Kenneth C. mith, "Microelectronic Circuits", fourth edition, Oxford University Press, 1998. 5. Theodore F. Bogart Jr., Jeffrey. Beasley, and Guillermo Rico, Electronic Devices and Circuit, sixth edition, Prentice Hall, 004. - 36 -