SiTime SIT8002AC-13-18E50 MEMS Process Review For comments, questions, or more information about this report, or for any additional technical needs concerning semiconductor technology, please call Sales at Chipworks. 3685 Richmond Road, Suite 500, Ottawa, ON K2H 5B7, Canada Tel: 613.829.0414 Fax: 613.829.0515 www.chipworks.com
MEMS Process Review Table of Contents 1.1 List of Figures 1.2 List of Tables 1.3 Company Profile 1.4 Introduction 1.5 Device Summary 1.6 Process Summary 2.1 SIT8002 Package 2.2 MEMS Resonator 2.3 Control ASIC 3 Package Analysis 3.1 Package Overview 4.1 Summary 4.2 Process 5.1 General Device Structure 5.2 Dielectrics 5.3 Metallization Contacts 5.4 EpiSeal and Vias 5.5 Silicon MEMS Layer 5.6 Epilayers and Substrate 6 MEMS Resonator Architectural Analysis 6.1 Plan View Analysis 7 Critical Dimensions 7.1 Control ASIC 7.2 MEMS Resonator 8 References 9 Statement of Measurement Uncertainty and Scope Variation About Chipworks
Overview 1-1 1.1 List of Figures 2.1.1 Top Package View 2.1.2 Bottom Package View 2.1.3 Plan-View Package X-Ray 2.1.4 Side-View Package X-Ray 2.1.5 MEMS Oscillator and Control ASIC 2.2.1 Resonator Die Photograph 2.2.2 Resonator 2.2.3 MEMS Die Corner 2.2.4 Minimum Pitch Bond Pads 2.3.1 ASIC Die Photograph 2.3.2 ASIC Die Markings 1 2.3.3 ASIC Metal 4 Die Markings 2 2.3.4 ASIC Die Corner 2.3.5 ASIC Minimum Pitch Bond Pads 3 Package Analysis 3.1.1 Package Cross Section 3.1.2 Package Lead and ASIC 3.1.3 ASIC Die Attached 3.1.4 Resonator Die 3.1.5 Resonator Die Bond Pad 4.2.1 General Structure 4.2.2 Minimum Pitch Metal 1 4.2.3 CMOS Transistor 4.2.4 Lateral PNP Transistors 5.1.1 Resonator General Structure 5.2.1 Passivation and PMD 5.2.2 Passivation 5.2.3 Pre-Metal Dielectric 5.2.4 PMD Seal 5.2.5 Sacrificial Oxide Layer 5.3.1 Minimum Pitch Metal 1 5.3.2 Minimum Width Metal 1 5.3.3 Contact 5.3.4 Contact Edge 5.4.1 EpiSeal Layers 5.4.2 EpiSeal Vents 5.4.3 Polysilicon Via 5.5.1 Silicon MEMS Structures 5.5.2 Si Beam 5.6.1 SRP Profile of EpiSeal Layers, SOI, and Handle Wafer
Overview 1-2 6 MEMS Resonator Architectural Analysis 6.1.1 Resonator Top Level 6.1.2 Polysilicon EpiSeal Layer 6.1.3 Polysilicon Vias 6.1.4 Silicon Resonator 6.1.5 Drive/Sense Electrode 6.1.6 Corner of Resonator Beam and Spring 6.1.7 Tilt-View Spring and Resonator Beam 6.1.8 Drive/Sense Electrode Gap 6.1.9 Facets on Silicon Spring 1.2 List of Tables 1.4.1 Device Identification 1.5.1 Device Summary 1.5.2 MEMS Resonator 1.5.3 Control ASIC 1.6.1 Resonator 1.6.2 Control ASIC Die 2.1.1 Package Pinout 2.2.1 Pad Functions 2.2.2 MEMS Resonator Die Dimensions 2.3.1 ASIC Die Horizontal Dimensions 4.1.1 Observed Control ASIC Critical Dimensions 5.2.1 Dielectric Layer Thickness 5.3.1 Metal and Contact Dimensions 5.4.1 EpiSeal and Via Dimensions 5.5.1 Silicon Handle Wafer Dimensions 7 Critical Dimensions 7.1.1 ASIC Die Horizontal Dimensions 7.1.2 Observed Control ASIC Critical Dimensions 7.2.1 MEMS Resonator Die Dimensions 7.2.2 Dielectric Layer Thickness 7.2.3 Metal and Contact Dimensions 7.2.4 EpiSeal and Via Dimensions 7.2.5 Silicon Handle Wafer Dimensions
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