Revised: January 26,

Similar documents
ECE 3274 Common-Collector (Emitter-Follower) Amplifier Project

ECE 3274 MOSFET CD Amplifier Project

ECE 3274 Common-Emitter Amplifier Project

The MOSFET can be easily damaged by static electricity, so careful handling is important.

Page 1 of 7. Power_AmpFal17 11/7/ :14

ECE 3274 Common-Emitter Amplifier Project

In a cascade configuration, the overall voltage and current gains are given by:

The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering ECE 20 - LAB

A 3-STAGE 5W AUDIO AMPLIFIER

UNIVERSITY OF PENNSYLVANIA EE 206

ClassABampDesign. Do not design for an edge. Class B push pull stage. Vdd = - Vee. For Vin < Vbe (Ri + Rin2) / Rin2

Experiment #8: Designing and Measuring a Common-Collector Amplifier

ECE 2201 PRELAB 6 BJT COMMON EMITTER (CE) AMPLIFIER

2. SINGLE STAGE BIPOLAR JUNCTION TRANSISTOR (BJT) AMPLIFIERS

Experiment No. 9 DESIGN AND CHARACTERISTICS OF COMMON BASE AND COMMON COLLECTOR AMPLIFIERS

TTL LOGIC and RING OSCILLATOR TTL

Frequency Response of Common Emitter Amplifier

UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering

FREQUENCY RESPONSE OF COMMON COLLECTOR AMPLIFIER

Digital Applications of the Operational Amplifier

UNIVERSITY OF UTAH ELECTRICAL ENGINEERING DEPARTMENT

Cbyp. RoutCS 2N7000. Chi-CS. Cs Cbyp. CS-CC figure 1: Two stage amplifier

Well we know that the battery Vcc must be 9V, so that is taken care of.

Lab 2: Discrete BJT Op-Amps (Part I)

.dc Vcc Ib 0 50uA 5uA

Physics 623 Transistor Characteristics and Single Transistor Amplifier Sept. 12, 2017

Lab 2: Common Emitter Design: Part 2

Experiment #7: Designing and Measuring a Common-Emitter Amplifier

ECE4902 C Lab 7

Experiment #6: Biasing an NPN BJT Introduction to CE, CC, and CB Amplifiers

Homework Assignment 12

University of Michigan EECS 311: Electronic Circuits Fall 2008 LAB 4 SINGLE STAGE AMPLIFIER

EXPERIMENT 10: SINGLE-TRANSISTOR AMPLIFIERS 11/11/10

Experiment 6: Biasing Circuitry

Experiment 8 Frequency Response

I1 19u 5V R11 1MEG IDC Q7 Q2N3904 Q2N3904. Figure 3.1 A scaled down 741 op amp used in this lab

ECE 310L : LAB 9. Fall 2012 (Hay)

EXPERIMENT 10: SINGLE-TRANSISTOR AMPLIFIERS 10/27/17

Fundamentals of Microelectronics. Bipolar Amplifier

Low Distortion Design 3

Experiment 6: Biasing Circuitry

3-Stage Transimpedance Amplifier

EXPERIMENT 12: SIMULATION STUDY OF DIFFERENT BIASING CIRCUITS USING NPN BJT

5.25Chapter V Problem Set

(b) 25% (b) increases

I C I E =I B = I C 1 V BE 0.7 V

15EEE282 Electronic Circuits and Simulation Lab - I Lab # 6

ESE319 Introduction to Microelectronics High Frequency BJT Model & Cascode BJT Amplifier

EE4902 C Lab 7

ECE 363 FINAL (F16) 6 problems for 100 pts Problem #1: Fuel Pump Controller (18 pts)

Module 4 Unit 4 Feedback in Amplifiers

ECEN 325 Lab 7: Characterization and DC Biasing of the BJT

Phy 335, Unit 4 Transistors and transistor circuits (part one)

ECE3204 D2015 Lab 1. See suggested breadboard configuration on following page!

EXP8: AMPLIFIERS II.

School of Sciences. ELECTRONICS II ECE212A 2 nd Assignment

Prelab 6: Biasing Circuitry

Single-Stage Amplifiers

Chapter 5 Transistor Bias Circuits

Lab 3: BJT Digital Switch

ECE 2C Final Exam. June 8, 2010

Designing an Audio Amplifier Using a Class B Push-Pull Output Stage

Linear electronic. Lecture No. 1

EE 2274 RC and Op Amp Circuit Completed Prior to Coming to Lab. Prelab Part I: RC Circuit

Lab 4. Transistor as an amplifier, part 2

EE 332 Design Project

Lab 9: Operational amplifiers II (version 1.5)

Introduction PNP C NPN C

VCC. Digital 16 Frequency Divider Digital-to-Analog Converter Butterworth Active Filter Sample-and-Hold Amplifier (part 2) Last Update: 03/19/14

EK307 Active Filters and Steady State Frequency Response

ECE4902 C Lab 5 MOSFET Common Source Amplifier with Active Load Bandwidth of MOSFET Common Source Amplifier: Resistive Load / Active Load

FREQUENCY RESPONSE OF COMMON COLLECTOR AMPLIFIER

EE 3111 Lab 7.1. BJT Amplifiers

Carleton University ELEC Lab 1. L2 Friday 2:30 P.M. Student Number: Operation of a BJT. Author: Adam Heffernan

UNIT I BIASING OF DISCRETE BJT AND MOSFET PART A

EE12: Laboratory Project (Part-2) AM Transmitter

Experiment 8&9 BJT AMPLIFIER

Mini Project 2 Single Transistor Amplifiers. ELEC 301 University of British Columbia

When you have completed this exercise, you will be able to determine the ac operating characteristics of

Integrators, differentiators, and simple filters

Mini Project 3 Multi-Transistor Amplifiers. ELEC 301 University of British Columbia

THE UNIVERSITY OF HONG KONG. Department of Electrical and Electrical Engineering

E84 Lab 3: Transistor

Electronics EECE2412 Spring 2018 Exam #2

Lab 2: Common Base Common Collector Design Exercise

Lab Experiment #2 Differential Amplifiers. Group Members

Homework Assignment 05

EEE225: Analogue and Digital Electronics

EXPT NO: 1.A. COMMON EMITTER AMPLIFIER (Software) PRELAB:

LABORATORY #3 QUARTZ CRYSTAL OSCILLATOR DESIGN

Experiment No. 3 Audio Components

Physics 116A Notes Fall 2004

Communication Circuit Lab Manual

Electronics Lab. (EE21338)

When input, output and feedback voltages are all symmetric bipolar signals with respect to ground, no biasing is required.

Common Emitter Amplifier

EE 2274 DIODE OR GATE & CLIPPING CIRCUIT

BJT Circuits (MCQs of Moderate Complexity)

Experiment 5 Single-Stage MOS Amplifiers

PHYS225 Lecture 6. Electronic Circuits

Transcription:

ECE 3274 Active Load Common Emitter Amplifier Project 1. Objective This project will show how the use of an active load in a common emitter amplifier can affect the gain open loop gain. 2. Components Qty Device 1 2N2222 NPN Transistor 2 2N3906 PNP Transistor 3. Introduction This project consists of two amplifier designs. The first amplifier, shown in Figure 2, is a commonemitter amplifier with the emitter grounded and negative feedback provided through R b1, R b2 and C fdc. This change serves to stabilize the bias of the amplifier and increase gain. The second amplifier, shown in Figure 3, is a modification of the first with the collector resistor replaced with a current mirror. This has the effect of increasing the open loop gain of the amplifier significantly. Figure 1 shows the customary front-end filter, which is required for both amplifiers and replaces R s in each schematic. R b1 and R b2 with C fdc to form the DC negative feedback path. R b1, R b2, and R b3, with Vce, form the voltage divider to bias the transistor Q-point. This is needed because we did not use an emitter resistor to control I c and provide negative feedback in the DC bias circuit. The selection of the C fdc needs to such that the high frequency cutoff of the feedback network is below the amplifier low frequency cutoff. Set R b1 = R b2 in your design and set the current through R b1 and R b2 to at ten times the base current. Set the current though R b3 to nine times the base current. For the AC design, assume that the midpoint of the feedback network is a ground at the midband frequency. This means that R b2 is in the input impedance design and R b1 is in the output impedance design. For the active load design, set R e2 = R e3 and set the voltage across the resistors to 1V. You should refer to your lab lecture notes, your Electronics II Lecture notes, your textbook, the course website, and other reference material to determine how best to design your amplifier. This lab is intended as a design project and not as a step-by-step guide. Revised: January 26, 2016 1

4. Requirements Both amplifier designs must meet the following requirements. Requirement Specification Collector Current Q1 3mA Low Frequency Cutoff Between 100 Hz and 300 Hz Hi Frequency Cutoff Between 50 khz and 150 khz Base Resistors R b1 = R b2 Output Voltage Swing Greater than 4.0 V pk-pk Load Resistance 1.5 kω Power Supply Voltage 9 V dc Table 1. Amplifier requirements. Use the same base resistor values for both amplifiers, and maintain the same collector-emitter voltage (in other words, the Q-point for both amplifier designs should be the same). 5. Prelab Design Project For this project, you will design two amplifiers a common-emitter amplifier without and with an active load. These circuits are shown in Figure 2 and 3 respectively. You should refer to your class notes, textbook, instructor, and other reference material to help you design the circuits. Start with the DC design and then move onto the AC design. Use the following fixed component values in your circuit: Component Value R i 150Ω C byp 0.1µF C fdc 47µF Q1 r o 60kΩ Q2,Q3 r o 30kΩ V BE 0.65V β 150 Table 2. Fixed component values. Revised: January 26, 2016 2

Vcc Cfdc Rc Rb1 Vout Cout Rb2 Vin Ri Cin Q1 NPN Rload 50 Rgen Rb3 Rout AC Chi Rin2 Figure 1. Common-emitter amplifier without active load. Vcc Vcc Re2 Re3 Q2 PNP Q3 PNP Cfdc Rb1 Rref Rb2 Vin Cout Rin Ri Cin Q1 NPN Vout AC 50 Rgen Chi Rin2 Rb3 Rout Rload Figure 2. Common-emitter amplifier with active load. Revised: January 26, 2016 3

5.1 DC Bias (35 point) Begin by designing the DC bias networks for the amplifiers. Once you have designed the DC bias network, use the transistor characteristics for the 2N2222 and 2N3906 (second design, for current mirror) transistors to determine the transistor parameters for where you are operating. Note that there is no single correct answer and that your design may differ significantly from your colleagues. You should show all work and walk through all calculations. You must calculate and show all of the following values for both amplifiers (excluding R e2, R e3 and R ref for the first design). Component Values Device Parameters Voltages and Currents R b1 R b3 Beta dc V ce R c Beta ac V be R e2 and R e3 r π V e r o I c I b Table 3. DC Bias and Amplifier Parameters 5.2 AC Design (35 point) Design the ac characteristics of the amplifier. You must calculate and show all of the following values. We will set the poles for the low frequency break point at the same frequency. The Cfdc has a break point below Cin and Cout so we will ingnore it. BWshrinkage = 2 1 n 1 where (n = 2) number of low frequency pole at the same frequency. F L = (F Cin + F Cout) / (BWshrinkage * n). We need adjust the frequency because of bandwidth shrinkage. Set Fcin =Fcout = F L*(BWshrinkage) Cin = 1/(2π Fcin Rci) Cout = 1/(2π Fcout Rcout) Component Values Amplifier Parameters Voltages, Currents, and Power C in Voltage Gain v in C out Current Gain v out Power Gain (in db) i in Low Frequency Cutoff i out High Frequency Cutoff p in p out Input Resistance Output Resistance Table 4. Small Signal (ac) Amplifier Parameters 5.5 Computer-aided Analysis Spice (Required) (30 point) Once you have completed your two amplifier designs, use LTspice to analyze their performance. Generate the following plots: (a) A time-domain plot of the input and output, with the output voltage of 2.0V pk at 20 khz. The output should not have any distortion or clipping. Calculate the midband gain and indicate it on the plot. Compare this to your calculated values. (b) An FFT of your time-domain waveform. Circle and indicate the height of any strong harmonics, in db relative to your fundamental frequency at 20 khz. (c) A frequency sweep of the amplifier from 10 Hz to 1 MHz. Indicate the high and low frequencies on the plot (these should correspond to the half-power, or 3dB below midband points). Compare these to your calculated values. Revised: January 26, 2016 4

6. Lab Procedure 6.1. Construct the CE amplifier shown in Figure 1. Remember that the 50Ω resistor is internal to the function generator and is not in your circuit. Record the values of the bias network resistors and the capacitors you used in the circuit. Remember to add the front end circuit. 6.2. Measure the following values: (a) Q-point: V CE, V BE, V E, I C and V E2. (b) Voltage, current, and power gains. (c) Maximum undistorted peak-to-peak output voltage. (d) Input and output resistance. (e) Low and high cutoff frequencies (half power point). Recall that input impedance is given by R in = v in/i in, output impedance is given by R out = (v oc v load)/i out, voltage gain is given by A v = v out/v in, and current gain is given by A i = i out/i in. Additionally, plot the following: (a) Input waveform (adjust input for undistorted output) and output waveform at the maximum undistorted value. (b) Power spectrum showing the fundamental at 20 khz and first few harmonics. Add a step to scope capture (Analysis Frequency domain measurements Power spectrum). (c) Frequency response from 10 Hz to 1 MHz (set the input voltage to a value that does not cause distortion across the entire passband of the amplifier). 6.3. Construct the CE with active load amplifier shown in Figure 2. Remember that the 50Ω resistor is internal to the function generator and is not in your circuit. Record the values of the bias network resistors and the capacitors you used in the circuit. 6.4. Repeat section 6.2 for this design. Revised: January 26, 2016 5

ECE 3274 Active Load Common Emitter Amplifier Project Data Sheet Name: Lab Date: Bench: Partner: Remember to include units for all answers and to label all printouts. There are a total of six (8) printouts in this lab. Only one set of printouts is required per group. 6.1. Component values for common-emitter amplifier. R b1: R b2: R b3: R c: R L: 6.2. Common-emitter amplifier. There are 4 plots (Vin, Vout, Power spectrum, and ACsweep). Capacitor Values: C in: C out: C fdc: Q-Point: V CE1: V BE1: V E1: I C1: Gain: Voltage: Current: Power: Voltage Output: Max: Vin V Ri Voc Iin I Load V Load: Resistance: Input Output Frequency Response: Low: High: 6.3. Component values for common-emitter amplifier with active load amplifier. R b1: R b2: R b3: R ref: R e2: R e3: R L: 6.4. Common-emitter amplifier with active load. There are 4 plots (Vin, Vout, Power spectrum, and ACsweep). Capacitor Values: C in: C out: C fdc: Q-Point: V CE1: V BE1: V E1: I E2: I ref: V E2: Gain: Voltage: Current: Power: Voltage Output : Max: Vin V Ri Voc Iin I Load V Load: Resistance: Input Output Frequency Response: Low: High: Revised: January 26, 2016 6