Structure-exploiting symbolic-numerical model reduction of nonlinear electrical circuits

Structure-exploiting symbolic-numerical model reduction of nonlinear electrical circuits ECMI 2010, Wuppertal, Germany, July 26-30, 2010 Oliver Schmidt Slide 1

Research Network SyreNe SyreNe System Reduction for Nanoscale IC Design funded by the German Federal Ministry of Education and Research (BMBF) cooperation: TU Berlin, TU Braunschweig, TU Chemnitz, U Hamburg, Fraunhofer ITWM Kaiserslautern, Infineon Technologies AG, NEC Europe Ltd., Qimonda AG Slide 2

Research Network SyreNe Slide 3

Outline Introduction and Foundations Hierarchical Modelling and Model Reduction Implementations and Applications Slide 4

Outline Introduction and Foundations Mathematical Modelling Model Reduction Hierarchical Modelling and Model Reduction Implementations and Applications Slide 5

Mathematical Modelling of Electrical Circuits differential part algebraic part with inputs internal variables outputs parameters system of DAEs singular Jacobian Slide 6

Model Reduction entire systems of modern ICs contain up to several millions of equations design verification requires a high number of simulation runs with different input signals System and Model Reduction inevitable! besides pure numerical reduction techniques also symbolic methods original DAE reference solution reduced DAE DAE F R 1 R 2 R k DAE G original reduced y F = A( F, u ) E( y, y ) < ε F G y G = A( G, u ) Slide 7

Symbolic Techniques algebraic manipulations x = f ( y) 0= g( x, y) term cancellations F j : N i= 1 t ( x) = 0 i ( f ( y y) 0= g ), N Gj : t ( x ɶ ) = 0 i k i= 1 original reduced Slide 8

Error Functions standard Slide 9

Error Functions standard Slide 10

Error Functions standard Slide 11

Error Functions standard ( ) interval error function Slide 12

Error Functions standard ( ) interval error function p L -norms Slide 13

Outline Introduction and Foundations Hierarchical Modelling and Model Reduction Hierarchical Modelling Hierarchical Reduction Subsystem Reduction Subsystem Sensitivities Subsystem Ranking Algorithm for Hierarchical Model Reduction Implementations and Applications Slide 14

New Challenges continuous miniaturization and increasing numbers of components on a single chip (IC) need for the modelling of parasitic physical effects thermic effects mutually influencing electromagnetic fields critical components modelled distributed by means of PDEs (e.g. drift-diffusion model for semiconductor components) coupling of DAEs and PDEs leads to PDAEs semi-discretization leads to very huge systems of equations Moore s law: continuous increase in number of equations Therefore: need for new ideas for model reduction! Slide 15

Hierarchical Modelling system level f i Phase comparator Loop filter F(s) A=1 VCO block level f o IN + - VDD VSS OUT transistor level level of components hierarchical layout Drain SiO 2 Gate Metal Source different subsystems, coupled by an interconnecting structure P N Bulk P Slide 16

Hierarchical Reduction Idea: exploitation of hierarchy reduce subsystems separately replace subsystems by reduced models advantages faster processing of smaller problems coupling of different techniques recursive approach possible level concept larger nonlinear circuits processable entire system 1 1 1 1 2 2 2 2 f ( x, y, z ) = 0 f ( x, y, z ) = 0 f 3 f ( x 0 3 ( x, y 3 1, z, y 3 1, x 2, y 2, x, y, x ) = 0 f 3 3 4, y 4 ( x 4 4 ) = 0 subsystem 1 subsystem 2 subsystem 3 subsystem 4 netlist based DAE PDE, y 4, z 4 ) = 0 Slide 17

Hierarchical Reduction Example differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 10min) 2% error: 124 eq., 425 terms 12 V -12 V Slide 18

Hierarchical Reduction Example differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 10min) 2% error: 124 eq., 425 terms 10% error: 44 eq., 284 terms 12 V -12 V Slide 19

Hierarchical Reduction Example differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 10min) 2% error: 124 eq., 425 terms 10% error: 44 eq., 284 terms 12 V -12 V Rleitung8 Rleitung1 Rleitung9 DUT2 DUT Slide 20

Hierarchical Reduction Example differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 10min) 2% error: 124 eq., 425 terms 10% error: 44 eq., 284 terms hierarchical coupled symbolicnumerical reduction (within seconds!) 62 eq., 252 terms 12 V -12 V Rleitung8 Rleitung1 Rleitung9 DUT2 DUT Slide 21

Hierarchical Reduction Example differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 10min) 2% error: 124 eq., 425 terms 10% error: 44 eq., 284 terms hierarchical coupled symbolicnumerical reduction (within seconds!) 62 eq., 252 terms 66 eq., 396 terms 12 V -12 V Rleitung8 Rleitung1 Rleitung9 DUT2 DUT Slide 22

Hierarchical Reduction Example tests with different excitations robust simulation speed-up by a factor of 5 Slide 23

Subsystem Reduction Difficulties standard techniques for setting up the describing equations of the entire system loss of information about hierarchical netlist-structure consequence: ansatz on netlist level segmentation yields subsystems with open terminals no defined input/output-behavior Slide 24

Subsystem Reduction Workflow simulate subsystem in test bench (a), record voltage potentials at subsystem terminals connect subsystem terminals to voltage sources (b) d sub- system a setup of describing system of equations and reduction (c) sub- system test bench removal of sources yields reduced subsystem (d) c sub- system b Slide 25

Subsystem Sensitivities relation between errors of subsystem and entire system not available determine degree of reduction of subsystems by influence on entire system simulate original system replace Ti by reduced system Ti,k simulate perturbed entire system compute error on output of entire system T3... T3,1 T3,m entire system T1 T2 T3 T4 entire system T1 T2 T3,k T4 Slide 26

Subsystem Sensitivities Definition Definition Subsystem Sensitivity electrical circuit entire system T1 T2 T3 T4 reduction information, e.g. or =r3k(t (T3) T3,k 3,k=r =r3k error function sensitivity of : entire system T1 T2 T3,k T4 Slide 27

Subsystem Ranking heuristically reasonable order of reductions order sensitivities increasingly w.r.t. error ( lists Li) reduce T according to r, where replace T and check accumulated error of entire system ok: remove entry, optionally delete list otherwise: delete list and reset subsystem completed when all lists Li deleted Slide 28

Subsystem Ranking entire system T1 T2 T3 T4 Slide 29

Subsystem Ranking entire system T1 T2 T3 T4 Slide 30

Subsystem Ranking entire system T1 T2 T3 T4 Slide 31

Subsystem Ranking entire system T1 T2 T3 T4 Slide 32

Subsystem Ranking entire system T1 T2 T3 T4 Slide 33

Subsystem Ranking entire system T1 T2 T3 T4 Slide 34

Subsystem Ranking entire system T1 T2 T3 T4 Slide 35

Subsystem Ranking entire system T1 T2 T3 T4 Slide 36

Subsystem Ranking entire system T1 T2 T3 T4 Slide 37

Subsystem Ranking entire system T1 T2 T3 T4 Slide 38

Subsystem Ranking entire system T1 T2 T3 T4 Slide 39

Subsystem Ranking entire system T1 T2 T3 T4 Slide 40

Subsystem Ranking entire system T1 T2 T3 T4 Slide 41

Subsystem Ranking entire system T1 T2 T3 T4 Slide 42

Subsystem Ranking entire system T1 T2 T3 T4 Slide 43

Subsystem Ranking entire system T1 T2 T3 T4 Slide 44

Subsystem Ranking entire system T1 T2 T3 T4 etc. Slide 45

Hierarchical Reduction Algorithm summary choose reduction methods for separated subsystems compute several reduced models for each subsystem compute subsystem sensitivities hierarchical reduction by means of subsystem ranking and error checks completed when sufficient degree of reduction is reached or all ranking lists are deleted Slide 46

Outline Introduction and Foundations Hierarchical Modelling and Model Reduction Implementations and Applications Implementations Hierarchical Reduction of an Operational Amplifier Slide 47

Implementations hierarchical reduction algorithm to a large extent implemented in RecordNodeVoltages detection of nodes connected to subsystem terminals test bench simulation and recording of voltage potentials ReduceHelpCircuit computation of reduced subsystem models ReduceSubcircuits internally calls procedures above yields entire system with all reduced subsystem models appended (advantage: possibility for easy switching among different reduced models) further: distinct data objects (StateSpaceObject) and operators thereon (GetDAE, GetStateSpace), different models for transmission lines and state space systems, various development environments and error functions Slide 48

Example Application operational amplifier op741 specification 7 subsystems symbolic reductions error bounds [%] {1,2,5,10,20,30,,90,100} 10% error (entire system) transient analysis 2 distinct error functions input: sine wave excitation, 0.8 V amplitude, 1 khz frequency, T=[0 s, 0.002 s] Slide 49

Subsystem Ranking L²-norm 2 error functions L²-norm interval -error function similar degree of reduction different number of steps interval Slide 50

Reduction by Using Additional Information additional information: number of equations / terms of subsystems same specifications as before eqns. 8 7 slightly increased degree of reduction 6 5 4 3 2 terms 30 27 24 1 21 terms 1 5 10 20 30 40 50 60 70 80 90 100 error 18 15 12 9 CM3 160 140 120 PP 6 3 1 5 10 20 30 40 50 60 70 80 90 100 error 100 80 eqns. 60 24 40 21 20 18 1 5 10 20 30 40 50 60 70 80 90 100 error 15 12 9 6 3 1 5 10 20 30 40 50 60 70 80 90 100 error Slide 51

Results comparison non-hierarchical, hierarchical and hybrid approach: significant savings in time models with similar quality w.r.t. number of equations and terms time cost for simulations error Slide 52

Results further excitations pulse sum of three sine waves sine wave Slide 53

Thank you for your attention. Slide 54