Improving Amplifier Voltage Gain

15.1 Multistage ac-coupled Amplifiers 1077 TABLE 15.3 Three-Stage Amplifier Summary HAND ANALYSIS SPICE RESULTS Voltage gain 998 1010 Input signal range 92.7 V Input resistance 1 M 1M Output resistance 60.5 55.7 Current gain 4.03 10 6 Power gain 4.02 10 9 and a low output resistance. The current and power gains are both quite large. The input signal must be kept below 92.7 V inorder to satisfy the small-signal limitations of the transistors. 15.1.7 Improving Amplifier Voltage Gain We know that the gain of the C-S amplifier is inversely proportional to the square root of drain current. In this amplifier, there is no need to operate the first stage at a 5-mA bias current level, and the voltage gain of the amplifier could be increased by reducing I D1 while maintaining a constant voltage drop across R D1.Itshould be possible to improve the signal range by increasing the current in the output stage and the voltage drop across R E3. Another possibility is to replace Q 3 with a FET. Some gain loss might again occur in the third stage because the gain of a common-drain amplifier is typically less than that of a common-collector stage, but this could be made up by improving the gain of the first and second stages (see Probs. 15.3 and 15.7). Exercise: (a) What would be the voltage gain of the amplifier if I D1 is reduced to 1 ma and R D1 is increased to 3 k so that V D is maintained constant? (b) The FET g m decreases by 5. Why did the gain not increase by a factor of 5? Answers: 1840; although R D1 increases by a factor of 5, the total load resistance at the drain of M 1 does not. 15.1.8 The Common-Emitter Cascade The three-stage amplifier in Fig. 15.1 uses a common-source stage in cascade with a commonemitter stage. However, we know from Chapters 13 and 14 that common-emitter stages typically offer more voltage gain than common-source stages, and, to achieve the highest possible voltage gain, several common-emitter stages are often cascaded, as indicated by the ac small-signal equivalent circuit for an n-stage amplifier in Fig. 15.7. The gain can be written as the product of the gains of the individual stages; A v = v 1 v 2 v o = A v1 A v2 A vn (15.26) v i v 1 v n 1

1078 Chapter 15 Multistage Amplifiers v i Q 1 v 2 v n1 v Q n 1 R R L R I2 I1 v o Figure 15.7 n-stage cascade of common-emitter amplifiers. For all but the final stage, the gain is given by where g mi = transconductance of transistor i R Ii = ith interstage resistance r πi1 = input resistance of transistor i 1 A vi = g mi (R Ii r πi1 ) (15.27) The gain of the last stage is A vn = g mn R L = 10VCC, where V CC is the power supply voltage. Two limits are of particular interest. If the gain is limited by the interstage resistances, then each stage has a gain of approximately 10V CC, and the overall gain of the n-stage amplifier is A vn = ( 10V CC ) n (15.28) For the second case, the gain is assumed to be limited by the input resistance of the transistors, and the gain becomes A vn = ( 1) n I C1 I Cn β o2 β o3 β on (10V CC ) (15.29) Normally, I Cn I C1 because the signal and power levels usually increase in each successive stage of most amplifiers. Because β o is often less than 10V CC, Eq. (15.29) is often the actual limiting case. The origin of Eq. (15.29) can be more readily understood from the three-stage example in Fig. 15.8, in which the interstage resistors are assumed infinite in value. The output signal current from the first stage is g m1 v s. This current is amplified by the current gain of the next two stages and produces an output current of i c3 = β o3 β o2 g m1 v i (15.30) v i g m1 v s Q 1 β o2 g m1 v s Q 3 β o3 β o2 g m1 v s R L v o Figure 15.8 Ideal common-emitter cascade.

15.2 Direct-Coupled Amplifiers 1079 which develops the output voltage across load resistance R L : The voltage gain of the overall cascade is then A v3 = v o v i v o = β o3 β o2 g m1 R L v i (15.31) = β o3 β o2 g m1 R L = g m1 g m3 β o3 β o2 (g m3 R L ) (15.32) Writing the transconductances in terms of their respective collector currents yields an equation in the form of Eq. (15.29): A v3 = I c1 I c3 β o2 β o3 (10V CC ) (15.33) Foracascade of n identical stages (I Cn = I C1 ), Eq. (15.33) becomes A vn = ( 1) n (β o ) n 1 (10V CC ) (15.34) Except for the last stage, the voltage gain of each stage defined by Eq. (15.34) is equal to the current gain β o, which may be less than 10V CC. Exercise: An amplifier is required with a gain of 140 db. Estimate the minimum number of amplifier stages that will be required if the design must use a 15-V supply and transistors with β o = 75. Answer: Five stages; although Eq. (15.28) yields an estimate of four stages, Eq. (15.34) yields an estimate of five. (β o < 10V CC.) 15.2 DIRECT-COUPLED AMPLIFIERS The coupling capacitors in the multistage amplifier in Fig. 15.1 limit the low-frequency response of the amplifier and prevent its application as a dc amplifier. For the amplifier to provide gain at dc or very low frequencies, capacitors in series with the signal path (C 1, C 3, C 5, and C 6 ) must be eliminated. Such an amplifier is called a dc-coupled, or direct-coupled, amplifier. Using a direct-coupled design can also eliminate the additional resistors that are required to bias the individual stages in an ac-coupled amplifier, thus producing a less expensive amplifier design. Bypass capacitors C 2 and C 4 also affect the gain at low frequencies and cause the amplifier to have a high-pass response. However, they do not inherently prevent the amplifier from operating at dc. 15.2.1 Analysis of a dc-coupled Amplifier Figure 15.9 is a direct-coupled version of the three-stage amplifier in Fig. 15.1. The dc levels at the various nodes in Fig. 15.9 have been designed to permit direct connections between the stages, and coupling capacitors C 3 and C 5 have been eliminated between M 1 and, and between and Q 3, respectively. Symmetrical ±7.5-V power supplies are now used so that the Q-point voltages at both the input and output of the amplifier will be approximately zero. However, the amplifier in Fig. 15.9 still includes bypass capacitors to enhance its ac performance (see Prob. 15.2). The

1080 Chapter 15 Multistage Amplifiers C-S amplifier C-E amplifier C-C amplifier 7.5 V R E2 C 4 R D1 620 1.4 k 22 F R I 10 k M 1 Q3 v ± R G R 1 M R S1 C C2 4.7 k 2 R E3 3.3 k 250 1.6 k 22 F 7.5 V Figure 15.9 A direct-coupled version of the three-stage amplifier in Fig. 15.2. dc gain of the amplifier is small, but the midband ac gain exceeds 1000 due to the presence of the two bypass capacitors. An amplifier truly designed for dc amplification will eliminate all these capacitors, and the basic differential and operational amplifier circuits to be discussed later in this chapter do completely eliminate the need for both coupling and bypass capacitors. npn transistor in Fig. 15.1 has been replaced by a pnp transistor in Fig. 15.9. Alternating npn or n-channel with pnp or p-channel transistors from stage to stage is common in dc-coupled designs. This is a technique developed to take maximum advantage of the available power supply voltage. 15.2.2 dc Analysis The dc equivalent circuit for the dc-coupled amplifier appears in Fig. 15.10. Note that the source and load resistors, R I and R L, must now be included in the circuit. The voltage at the drain of M 1 provides bias voltage to the base of, and the voltage developed at the collector of establishes the base bias for Q 3.For amplifiers, the transistors should all be operating in the active region. Thus, the current in M 1 is independent of the voltage at its drain and therefore independent of the fact that the base of happens to be connected to its drain. Similarly, the collector current of is not be affected by the presence of Q 3 attached to its collector. Because of this lack of interaction, the dc analysis can proceed through the circuit from left to right, from M 1 to to Q 3. If we use the transistor parameter values in Table 15.1 and assume active-region operation with zero gate current, then the drain current of M 1 is given by I D = K n 2 (V GS V TN ) 2 = 0.01 2 (V GS 2) 2 where V GS = V G V S = 0 ( 7.5 1600I D ) (15.35) Collecting terms yields a quadratic equation for I D : 2.56 10 6 I 2 D 30,600I D 90.3 = 0 (15.36)

15.2 Direct-Coupled Amplifiers 1081 7.5 V R E2 1.4 kω 620 Ω R D1 V D I B2 I E2 10 kω I D M 1 V C2 I C2 IB3 Q 3 I L R G R S1 R C2 I 3 R L 1 MΩ 1.6 kω 4.7 kω R E3 3.3 kω 7.5 V 250 Ω Figure 15.10 dc Equivalent circuit for direct-coupled amplifier. The solutions to Eq. (15.36) are I D = 5.29 ma and I D = 6.66 ma. A 6.66-mA drain-source current would produce a voltage drop of 10.7 V across R S1 and cut off the FET. Thus, the drain current must be I D = 5.29 ma, and the voltage at the source of M 1 is V S = 0.964 V. Applying KCL at the drain node, the drain voltage of M 1 can be expressed as V D = 7.5 620(I DS I B2 ) (15.37) If we assume that I B2 I D, then V D = 7.5 620ID = 7.5 620 (5.29 ma) = 4.22 V (15.38) and the drain-source voltage of M 1 is V DS = 4.22 0.964 = 3.26 V, which is indeed sufficient to pinch-off M 1. The Q-point of bipolar transistor is controlled by the voltage at its base, which is equal to the drain voltage of M 1. Assuming active-region operation, V D = 7.5 1400I E2 V EB2 (15.39) and solving Eq. (15.39) for I E2 gives I E2 = 7.5 V D V EB2 1400 = 7.5 V 4.22 V 0.7 V 1400 = 1.84 ma (15.40) Based on the current gain β F2 = 150 from Table 15.1, I C2 = 1.83 ma and I B2 = 12.2 A (15.41) The results in Eq. (15.41) justify the assumption I B2 I D used in Eq. (15.38). The voltage V C2 at the collector of can be expressed as V C2 = 4700(I C2 I B3 ) 7.5 V (15.42)

1082 Chapter 15 Multistage Amplifiers Assuming that I B3 I C2, Checking the collector-emitter voltage of, V C2 = 4700IC2 7.5 V= 1.10 V (15.43) V EC2 = V E2 V C2 = V D1 V EB2 V C2 = 4.22 0.7 1.10 = 3.82 V (15.44) which is greater than 0.7 V. This confirms that is operating in the active region. The voltage at the output of the amplifier is equal to the emitter voltage of Q 3, and the emitter current of Q 3 is given by V O = V C2 V BE3 = 1.10 V 0.700 V = 0.400 V (15.45) I E3 = I 3 I L = V O 7.5 V 3300 V O 0.40 7.5 V = 250 3300 0.4 = 3.99 ma (15.46) 250 Using the current gain β F3 = 80, I C3 = 3.94 ma and I B3 = 49.3 A (15.47) I B3 is less than 3 percent of I C2,soneglecting I B3 in the calculation of V C2 in Eq. (15.43) was a reasonable assumption. Finally, the collector-emitter voltage of Q 3 is V CE3 = 7.5 V E3 = 7.5 0.40 = 7.10 V (15.48) which verifies that Q 3 is operating in the active region. Calculation of the Q-points of the three transistors is complete. The Q-point values have been used to determine the values of the small-signal parameters, as summarized in Table 15.4. (Be sure to compare the Q-point values in Table 15.4 to those in Table 15.2.) Two things should be noted here. There is an offset voltage (0.4 V) at the output of the amplifier, and a nonzero dc current exists in the 250- load resistor. In an ideal design, the output voltage would be zero, and no dc current would appear in R L.Inthis circuit, it is virtually impossible to achieve exactly zero output voltage with standard resistor values without some form of overall feedback around the amplifier. (Remember in Chapters 11 and 12 that we saw many circuits in which feedback was used to set the quiescent output of an op amp to 0 V.) Also, the TABLE 15.4 Q-Points and Small-Signal Parameters for the Transistors in Fig. 15.10 Q-POINT VALUES Q-POINT VALUES SPICE CALCULATIONS HAND CALCULATIONS SMALL-SIGNAL PARAMETERS M 1 (5.31 ma, 3.21 V) (5.29 ma, 3.26 V) g m = 10.4 ms, r o = 10.1 k (1.77 ma, 4.27 V) (1.83 ma, 3.82 V) g m = 73.2 ms, r π = 2.05 k, r o = 45.8k Q 3 (1.98 ma, 7.56 V) (3.99 ma, 7.10 V) g m = 160 ms, r π = 501, r o = 16.8 k

15.2 Direct-Coupled Amplifiers 1083 results depend on the assumed values of V BE and V EB.Ifwesimulate the circuit in SPICE using the parameters in Table 15.1 with I S = 0.1 fa, the output voltage is found to be close to zero ( 62.7 mv). The Q-points from SPICE are given in Table 15.4. The collector current of Q 3 is reduced since there is now only a small current in R L. Exercise: Verify that the values of the small-signal parameters in Table 15.4 are correct. Exercise: Use SPICE to verify the Q-points for the three transistors in the circuit in Fig. 15.9. Answers: See Table 15.4. Exercise: What is the minimum value of V DS needed to saturate M 1? Find I E2 and V D1 if β F2 = 10. (Assume I B2 no longer satisfies I B2 I D1.) Answers: 1.04 V; 1.77 ma, 4.32 V 15.2.3 ac Analysis The ac equivalent circuit for the amplifier in Fig. 15.9 is drawn in Fig. 15.11, and is very similar to that in Fig. 15.3. The values of the interstage resistors have increased slightly in value due to the absence of bias resistors R 1 R 4 in Fig. 15.1. Because the Q-points and small-signal parameters of the transistors are also almost identical to those in the ac-coupled amplifier, the overall characteristics of the amplifier should be quite similar to those of Fig. 15.1, and indeed they are: A v = 1160, R in = 1M, and R out = 47. Details of these calculations mirror those done in Sec. 15.1 and are left as the next exercise. Thus, in this case we can achieve the same amplifier performance with either an ac- or dc-coupled design. dc coupling requires fewer components, but the Q-points of the various stages become interdependent. If the Q-point of one stage shifts, the Q-points of all the stages may also shift (see Prob. 15.16). v i v 3 v Q 3 2 10 kω R in3 M 1 R in2 R I2 R L3 R I R I1 v o R G 1 MΩ 4.70 kω 232 Ω 620 Ω C-S amplifier C-E amplifier C-C amplifier Figure 15.11 ac Equivalent circuit valid for small-signal analysis.

1084 Chapter 15 Multistage Amplifiers Exercise: Calculate the actual voltage gain, input resistance, and output resistance of the direct-coupled amplifier in Fig. 15.9. Answers: 1160, 1 M, 47 Exercise: What is the dc gain of the amplifier in Fig. 15.9? (The dc gain is the gain with the two bypass capacitors removed from the circuit.) Answer: 0.94. A quick estimate would be ( A v = A v1 A v2 A v3 = R )( D1 R ) C2 R S1 R E2 (1) = ( )( ) 620 4700 = 1.3 1600 1400 15.2.4 Compound Transistor Configurations The Darlington and Cascode Circuits In this section, we will discuss the characteristics of two special dc-coupled transistor configurations, the Darlington and cascode circuits. These compound transistor circuits function in a manner similar to a single transistor, but with improved characteristics. The Darlington stage provides high current gain, whereas the cascode amplifier offers high output resistance and intrinsic voltage gain. In Chapter 17, we will also find that the cascode amplifier provides improved response at high frequencies. An additional compound transistor configuration can be found in Prob. 15.35. The Darlington Circuit In many circuits, it would be advantageous to have a bipolar transistor with a much higher current gain than that of a single BJT. An FET may not be usable because it cannot provide the required amplification factor, or a bipolar IC technology that does not realize FETs may be in use. The circuit depicted in Fig. 15.12, called the Darlington configuration, or Darlington circuit, is an important two-stage direct-coupled amplifier that attempts to solve this problem. The Darlington circuit behaves in a manner similar to that of a single transistor but with a current gain equal to the product of the current gains of the individual transistors. The dc and ac behavior of the Darlington circuit are discussed in the next two sections. dc Analysis Writing an expression for the dc collector current I C at the output of the composite transistor in Fig. 15.12(a) in terms of the input base current I B, I C = I C1 I C2 = β F1 I B β F2 I E1 = β F1 I B β F2 (β F1 1)I B (15.49) and factoring β F1 β F2 from Eq. (15.49) gives [ I C = β F1 β F2 1 1 1 ] I B = βf1 β F2 I B for β F1,β F2 1 (15.50) β F1 β F2

15.2 Direct-Coupled Amplifiers 1085 B i B Q 1 i C1 i C i C2 v BE1 v BE C B i B C i C Q' i 1 Q 1 i 2 I C2 = β o2 I E1 = βo2 I C1 (a) v BE2 i E E (b) Figure 15.12 (a) Darlington connection of two bipolar transistors. (b) Representation as a single composite transistor Q. i E E v 1 v e Figure 15.13 Darlington circuit as a two-port. v 2 g m2 = βo1 g m1 r o1 = βo1 r o2 r π1 = βo1 r π2 (β o1 1)r π2 v e = v 1 v 1 = r π1 (β o1 1)r π2 2 If both current gains are much larger than 1, then the composite transistor has a current gain that is approximately equal to the product of the current gains of the individual transistors. Also, note that the collector currents of the two transistors are related by I C2 = βf2 I C1 = IC. The Darlington circuit requires higher dc bias voltages than does a single transistor. The base-emitter voltage of the composite transistor is equivalent to two diode voltage drops V BE = V BE1 V BE2 = 1.4 V (15.51) and to keep the collector-base junction of Q 1 reverse-biased, V CE must also be greater than (V BE1 V BE2 ). ac Analysis The ac behavior of the Darlington circuit can be explored by treating the configuration as the two-port in Fig. 15.13 and calculating its y-parameters: i 1 = y 11 v 1 y 12 v 2 i 2 = y 21 v 1 y 22 v 2 (15.52) These parameters are easily found by replacing the transistors in Fig. 15.13 by their small-signal models and applying the definitions of the parameters to the resulting network. Because of the relationship between I C1 and I C2, the small-signal parameters of the two transistors are also related to each other by the expressions given with the circuit in Fig. 15.13. The results of this analysis are presented in Eq. (15.53), although the detailed calculations are left for Prob. 15.26. r π = (y 11) 1 = r π1 (β o1 1)r π2 = 2βo1 r π2 y 12 1 = = 0 (β o1 1)r o1 g m = y 21 = g m1 2 g m2 2 = g m2 2 ( r o = (y 22) 1 = ro2 2 r ) o1 = 2 β o2 3 r o2 (15.53)

1086 Chapter 15 Multistage Amplifiers The ac current gain β o and amplification factor µ f for the composite Darlington transistor are β o = y 21 y = g m r π = β o1 β o2 11 v2 =0 µ f = v 2 = g m r o = g m2 2 2r o2 3 = µ f 2 3 v 1 i2 =0 (15.54) From Eqs. (15.53) and (15.54), we can see that the Darlington configuration behaves as a single composite transistor operating with a very high, effective current gain, β o1 β o2,but with a transconductance equal to one-half that of a single BJT operating at the collector current I C. The high current gain results in a high input resistance; however, the amplification factor of the composite device has been reduced by a factor of 3. Exercise: What is the current gain of a Darlington transistor if β F1 = 50, V A1 = 75 V, β F2 = 80, and V A2 = 60 V? If the operating current of the composite transistor is 500 A and V CE = 10, what are the values of r π, g m, r o, and µ f? Answers: 4000; 400 k, 0.01 S, 70 k, 700 The Cascode Amplifier A C-E/C-B Cascade Another very important direct-coupled two-transistor amplifier configuration is the cascade connection of the common-emitter and common-base amplifiers. This special amplifier configuration is referred to as the cascode amplifier. The cascode amplifier is particularly useful in wide-band amplifiers used in RF communications as well as high output resistance current sources and high gain amplifiers. Although this section focuses on the C-E/C-B version of the cascode amplifier, it can be made with any combination of C-E/C-S and C-B/C-G stages (that is, with C-E/C-B, C-E/C-G, C-S/C-G, or C-S/C-B) (see Probs. 15.33, 15.37, 15.40, and 15.42). dc Considerations In Fig. 15.14, we can see that the collector current of Q 1 is the emitter current of, and so I C2 = α F I C1.For typical transistors with reasonably high current gain, I C2 = IC1. The base of must be biased by a voltage source V BB that is large enough to ensure that Q 1 is operating in the forward-active region. The minimum value of V BB is V CE1 = V BB V BE2 V BE1 or V BB 2V BE (15.55) and must be equal to at least 2V BE,orapproximately 1.4 V. i C1 i B1 Q 1 i C2 v CE1 V BB Figure 15.14 Cascode circuit with dc bias source V BB.

15.3 Differential Amplifiers 1087 v 1 i 1 Q 1 i 2 v 2 Figure 15.15 Cascode circuit as a two-port. ac Analysis The ac behavior of the cascode circuit can also be explored by treating the configuration as the two-port in Fig. 15.15 and calculating its y-parameters. As with the Darlington circuit, these parameters can be found by replacing the transistors in Fig. 15.15 by their smallsignal models, recognizing that the transistor parameters are related through I C2 = α F2 I C1. The results are given in Eq. (15.56), but the detailed calculations are left for Prob. 15.33. r π = (y 11) 1 = r π1 y 12 = 0 g m = y 21 = α o2 g m1 = gm1 (15.56) r o = (y 22) 1 = ro2 (1 g m2 (r π2 r o1 )) = β o2 r o2 The current gain β o and amplification factor µ f for the composite cascode transistor are β o = y 21 y = β o1 α o2 = βo1 11 v2 =0 µ f = v (15.57) 2 = β o2 µ f 2 v 1 i2 =0 From Eqs. (15.56) and (15.57), we can see that the cascode configuration behaves as a single composite common-emitter transistor operating at a collector current I C = IC2,but having an extremely high amplification factor of β o2 µ f 2. The cascode stage is often found in high-performance differential and operational amplifiers, where it can afford very high voltage gain and commonmode rejection. It can also be used to realize current sources with very high output resistances. In Chapter 17, we shall find that cascode amplifiers also offer much better bandwidth than the corresponding single-transistor C-E or C-S stages. Exercise: Calculate the two-port parameters of the cascode amplifier in Fig. 15.15 if the transistors are identical and has I C2 = 100 A. Use β F = β o = 100, V A = 75 V, and V CE2 = 10. What are the current gain and amplification factor for the cascode configuration? What would be the values of r π, g m, r o, and µ f for a single transistor operating with I C = 100 A and V CE = 10 V? Answers: 24.8 k, 0,0.004 S, 85 M ; 99.2, 340,000; 25.0 k, 0.004 S, 85 k, 3000 15.3 DIFFERENTIAL AMPLIFIERS The direct-coupled amplifier design in Sec. 15.2 still uses internal bypass capacitors to achieve high ac gain as well as external coupling capacitors at the input and output. The dc-coupled