This document was created with FrameMaker 44 64K (8K x 8) CMS EPRM 27C64 FEATURES PACKAGE TYPES High speed performance - 12 ns access time available CMS Technology for low power consumption - 2 ma Active current - 1 µa Standby current Factory programming available Auto-insertion-compatible plastic packages Auto ID aids automated programming Separate chip enable and output enable controls High speed express programming algorithm rganized 8K x 8: JEDEC standard pinouts - 28-pin Dual-in-line package - 32-pin PLCC Package - 28-pin SIC package - Tape and reel Available for the following temperature ranges - Commercial: C to +7 C - Industrial: -4 C to +85 C DESCRIPTIN The 27C64 is a CMS 64K bit (electrically) Programmable Read nly Memory. The device is organized as 8K words by 8 bits (8K bytes). Accessing individual bytes from an address transition or from power-up (chip enable pin going low) is accomplished in less than 12 ns. CMS design and processing enables this part to be used in systems where reduced power consumption and high reliability are requirements. A complete family of packages is offered to provide the most flexibility in applications. For surface mount applications, PLCC or SIC packaging is available. Tape and reel packaging is also available for PLCC or SIC packages. DIP/SIC PLCC PP A12 A7 A6 A5 A4 A3 A2 A1 A 1 2 SS A6 5 A5 6 A4 7 A3 8 A2 9 A1 1 A 11 NC 12 13 1 2 3 4 5 6 7 8 9 1 11 12 13 14 A7 A12 4 3 1 2 PP NU cc PGM NC 2 14 15 16 17 18 19 2 SS 27C64 27C64 28 27 26 25 24 23 22 21 2 19 18 17 16 15 1 32 31 3 NU 3 4 5 CC PGM NC A8 A9 A11 E A1 CE 7 6 5 4 3 29 A8 28 A9 27 A11 26 NC 25 E 24 A1 23 CE 22 7 21 6 1996 DS1117L-page 1
1. ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* CC and input voltages w.r.t. SS... -.6 to + 7.25 PP voltage w.r.t. SS during programming... -.6 to +14 oltage on A9 w.r.t. SS... -.6 to +13.5 utput voltage w.r.t. SS... -.6 to CC +1. Storage temperature... -65 C to +15 C Ambient temp. with power applied... -65 C to +125 C *Notice: Stresses above those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: Name A-A12 CE E PGM PP - 7 CC SS NC NU PIN FUNCTIN TABLE Function Address Inputs Chip Enable utput Enable Program Enable Programming oltage Data utput +5 Power Supply Ground No Connection; No Internal Connections Not Used; No External Connection Is Allowed TABLE 1-2: READ PERATIN DC CHARACTERISTICS CC = +5 (±1%) Commercial: Tamb = C to +7 C Industrial: Tamb = -4 C to +85 C Parameter Part* Status Symbol Min Max Units Conditions Input oltages all Logic "1" Logic "" 2. -.5 CC+1.8 Input Leakage all ILI -1 1 µa IN = to CC utput oltages all Logic "1" Logic "" H L 2.4.45 IH = -4 µa IL = 2.1 ma utput Leakage all IL -1 1 µa UT = to CC Input Capacitance all CIN 6 pf IN = ; Tamb = 25 C; f = 1 MHz utput Capacitance all CUT 12 pf UT = ; Tamb = 25 C; f = 1 MHz Power Supply Current, Active Power Supply Current, Standby IPP Read Current PP Read oltage C I C I all all all TTL input TTL input TTL input TTL input CMS input Read Mode Read Mode ICC1 ICC2 ICC(S) IPP PP CC-.7 2 25 2 3 1 1 CC ma ma CC = 5.5; PP = CC; f = 1 MHz; E = CE = ; IUT = ma; = -.1 to.8; = 2. to CC; Note 1 ma ma µa CE = CC ±.2 µa PP = 5.5 * Parts: C=Commercial Temperature Range; I =Industrial Temperature Range. Note 1: Typical active current increases.5 ma per MHz up to operating frequency for all temperature ranges. DS1117L-page 2 1996
TABLE 1-3: READ PERATIN AC CHARACTERISTICS AC Testing Waveform: = 2.4 and =.45; H = 2. L =.8 utput Load: 1 TTL Load + 1 pf Input Rise and Fall Times: 1 ns Ambient Temperature: Commercial: Tamb = C to +7 C Industrial: Tamb = -4 C to +85 C Parameter Sym 27C64-12 27C64-15 27C64-17 27C64-2 27C64-25 Min Max Min Max Min Max Min Max Min Max Units Conditions Address to utput Delay tacc 12 15 17 2 25 ns CE = E = CE to utput Delay tce 12 15 17 2 25 ns E = E to utput Delay te 65 7 7 75 1 ns CE = CE or E to /P High Impedance utput Hold from Address CE or E, whichever occurs first tff 5 5 5 55 6 ns th ns FIGURE 1-1: READ WAEFRMS Address Address alid CE tce(2) E te(2) th tff(1,3) utputs - 7 H L High Z alid utput High Z tacc Note 1: tff is specified for E or CE, whichever occurs first. 2: E may be delayed up to tce - te after the falling edge of CE without impact on tce. 3: This parameter is sampled and is not 1% tested. 1996 DS1117L-page 3
TABLE 1-4: PRGRAMMING DC CHARACTERISTICS Ambient Temperature: Tamb = 25 C ± 5 C CC = 6.5 ±.25, PP = H = 13. ±.25 Parameter Status Symbol Min Max. Units Conditions Input oltages Logic 1 Logic 2. -.1 CC+1.8 Input Leakage ILI -1 1 µa IN = to CC utput oltages Logic 1 Logic H L 2.4.45 IH = -4 µa IL = 2.1 ma CC Current, program & verify ICC2 2 ma Note 1 PP Current, program IPP2 25 ma Note 1 A9 Product Identification H 11.5 12.5 Note 1: CC must be applied simultaneously or before PP and removed simultaneously or after PP. TABLE 1-5: PRGRAMMING AC CHARACTERISTICS for Program, Program erify AC Testing Waveform: =2.4 and =.45; H=2.; L=.8 and Program Inhibit Modes Ambient Temperature: Tamb=25 C ±5 C CC= 6.5 ±.25, PP = H = 13. ±.25 Parameter Symbol Min Max Units Remarks Address Set-Up Time tas 2 µs Data Set-Up Time tds 2 µs Data Hold Time tdh 2 µs Address Hold Time tah µs Float Delay (2) tdf 13 ns CC Set-Up Time tcs 2 µs Program Pulse Width (1) tpw 95 15 µs 1 µs typical CE Set-Up Time tces 2 µs E Set-Up Time tes 2 µs PP Set-Up Time tps 2 µs Data alid from E te 1 ns Note 1: For express algorithm, initial programming width tolerance is 1 µs ±5%. 2: This parameter is only sampled and not 1% tested. utput float is defined as the point where data is no longer driven (see timing diagram). DS1117L-page 4 1996
FIGURE 1-2: PRGRAMMING WAEFRMS (1) Program erify Address Address Stable Data tas Data In Stable High Z Data ut alid tah t DS t DH tdf (2) PP 13. (3) 5. tps 6.5 (3) CC 5. tcs CE PGM E tces tpw tpw tes te (2) Notes: (1) (2) (3) The input timing reference is.8 for and 2. for. tdf and te are characteristics of the device but must be accommodated by the programmer. cc = 6.5 ±.25, PP = H = 13. ±.25 for Express algorithm. TABLE 1-6: MDES peration Mode CE E PGM PP A9-7 Read CC X DUT Program H X DIN Program erify H X DUT Program Inhibit X X H X High Z Standby X X CC X High Z utput Disable CC X High Z Identity CC H Identity Code X = Don t Care 1.2 Read Mode (See Timing Diagrams and AC Characteristics) Read Mode is accessed when a) the CE pin is low to power up (enable) the chip b) the E pin is low to gate the data to the output pins For Read operations, if the addresses are stable, the address access time (tacc) is equal to the delay from CE to output (tce). Data is transferred to the output after a delay from the falling edge of E (te). 1996 DS1117L-page 5
1.3 Standby Mode The standby mode is defined when the CE pin is high () and a program mode is not defined. When these conditions are met, the supply current will drop from 2 ma to 1 µa. 1.4 utput Enable This feature eliminates bus contention in microprocessor-based systems in which multiple devices may drive the bus. The outputs go into a high impedance state when the following condition is true: The E and PGM pins are both high. 1.5 Erase Mode (U.. Windowed ersions) Windowed products offer the capability to erase the memory array. The memory matrix is erased to the all 1 s state when exposed to ultraviolet light. To ensure complete erasure, a dose of 15 watt-second/cm 2 is required. This means that the device window must be placed within one inch and directly underneath an ultraviolet lamp with a wavelength of 2537 Angstroms, intensity of 12,µW/cm 2 for approximately 2 minutes. 1.6 Programming Mode The Express Algorithm has been developed to improve the programming throughput times in a production environment. Up to ten 1-microsecond pulses are applied until the byte is verified. No overprogramming is required. A flowchart of the express algorithm is shown in Figure 1-3. Programming takes place when: a) CC is brought to the proper voltage, b) PP is brought to the proper H level, c) the CE pin is low, d) the E pin is high, and e) the PGM pin is low. Since the erased state is 1 in the array, programming of is required. The address to be programmed is set via pins A-A12 and the data to be programmed is presented to pins -7. When data and address are stable, E is high, CE is low and a low-going pulse on the PGM line programs that location. 1.7 erify After the array has been programmed it must be verified to ensure all the bits have been correctly programmed. This mode is entered when all the following conditions are met: a) CC is at the proper level, b) PP is at the proper H level, c) the CE line is low, d) the PGM line is high, and e) the E line is low. 1.8 Inhibit When programming multiple devices in parallel with different data, only CE or PGM need be under separate control to each device. By pulsing the CE or PGM line low on a particular device in conjunction with the PGM or CE line low, that device will be programmed; all other devices with CE or PGM held high will not be programmed with the data, although address and data will be available on their input pins (i.e., when a high level is present on CE or PGM); and the device is inhibited from programming. 1.9 Identity Mode In this mode, specific data is output which identifies the manufacturer as and device type. This mode is entered when Pin A9 is taken to H (11.5 to 12.5). The CE and E lines must be at. A is used to access any of the two non-erasable bytes whose data appears on through 7. Pin Input utput Identity Manufacturer Device Type* A * Code subject to change 7 6 5 1 4 3 1 2 1 1 1 H e x 29 2 DS1117L-page 6 1996
FIGURE 1-3: PRGRAMMING EXPRESS ALGRITHM Conditions: Tamb = 25 C ±5 C CC = 6.5 ±.25 PP = 13. ±.25 Start ADDR = First Location CC = 6.5 PP = 13. X = Program one 1 µs pulse Increment X erify Byte Pass Fail No Yes Device X = 1? Failed Last Address? Yes No Increment Address CC = PP = 4.5, 5.5 Device Passed Yes All bytes = original data? No Device Failed 1996 DS1117L-page 7
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27C64 Product Identification System To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices. 27C64 25 I /P Package: L = Plastic Leaded Chip Carrier P = Plastic DIP (6 Mil) S = Plastic SIC (3 Mil) Temperature Blank = C to +7 C Range: I = 4 C to +85 C Access 12 = 12 ns Time: 15 = 15 ns 17 = 17 ns 2 = 2 ns 25 = 25 ns Device: 27C64 64K (8K x 8) CMS EPRM 1996 DS1117L-page 11
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