CSE 577 Spring Insoo Kim, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University

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CSE 577 Spring 2011 Basic Amplifiers and Differential Amplifier, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University

Don t let the computer think for you In today s analog design, simulation of circuits is essential because the behavior of short-channel MOSFETs cannot be predicted accurately by hand calculations. Nonetheless, if the designer avoids a simple and intuitive analysis of the circuits and hence skips the task of gaining insight, then he/she cannot interpret the simulation results intelligently. For this reason, we say, Don t let the computer think for you. - Behzad Razavi

Contents Fundamentals Basic Amplifiers: Low Frequency Analysis Basic Amplifiers: High Frequency Analysis Differential Amplifier Feedback

Fundamentals Definitions DC Operating Point & Load line Large Signal Analysis vs. Small Signal Analysis MOSFET intrinsic Capacitances

Definitions mb

DC Operating Point & Load Line

Large Signal Analysis vs. Small Signal Analysis Large Signal Analysis

Large Signal Analysis vs. Small Signal Analysis Small Signal Analysis How convenient!!

MOSFET Intrinsic Capacitances

(cont d) MOSFET Intrinsic Capacitances

Basic Amplifiers: Low Frequency Analysis Single Stage Amplifiers Multi Stage Amplifiers

Single Stage Amplifiers: CS, CD, and CG Stage

Common Source Stage : Voltage Gain

Common Drain Stage: Output Resistance

Common Gate Stage : Input Resistance

Summary

Quiz CD stage amplifier is suitable for output stage of OPAmp due to its low output impedance and large bandwidth. However, in CMOS analog IC, CS stage is more widely used for output stage OPAmp than CD stage. Why?

Loads for basic amplifiers

(cont d) Loads for basic amplifiers Diode Connected Load V I X X = 1 gm+ gmb+ r o g m 1 + g 1 mb 1 g m = g m 1 + g mb r o R X A v = g m1 1 g m 2 ( W / L) ( W / L) 1 2

(cont d) Loads for basic amplifiers Source degeneration G m g 1+ g m m R S R out = R r o S [( g [ R S m2 ( g + g m2 mb2 + g ) r o mb2 + 1] + r ) + 1] o

Cascode Stage Small Signal Analysis V A out v = ( Rout RD ) gm 1Vin = g ( R R ) m 1 out D Rout R out = r o1 r o2 [( g [ r o1 m2 ( g + g m2 mb2 + ) r g o2 mb2 + 1] + r ) + 1] o2

Folded Cascode Stage A= g R m1 o R = R R ω D t o = = o2c ω = Aω [ gm2cro2c( ro2 ro7) ] [ gm4cro4cro3] 1/ ( C R ) D L SR= 2I/C L o = g o4c m1 /C L

(cont d) Folded Cascode Stage What are the advantages of folded cascode amplifier? Disadvantages: Limited Output swing Large Voltage Headroom Large Power Consumption

Basic Amplifiers: High Frequency Analysis Frequency Analysis Dominant Pole Approach

Frequency Analysis

(cont d) Frequency Analysis Bode Plot

Dominant Pole Approach

BW Estimation by Dominant Pole Approach

Bandwidth Comparison

Quiz Design an amplifier which satisfy following features using basic single-stage amplifiers. High gain Large Bandwidth High input impedance Low output impedance

Differential Amplifier Single Stage Amplifiers Multi Stage Amplifiers

Why differential Amplifier? Single Ended Signal can be easily contaminated A Differential Signal can be cleaned up Power Supply noise can be reduced

Differential Amplifier Analysis Classic Diff Amp

(cont d) Differential Amplifier Analysis

Diff Amp with Current Mirror Load G R A m out v = = g r g m2,4 o2 m2,4 r o4 ( r o2 r o4 ) CMRR= (2g r m1 o5 = CMRR( R ) g m3 ( r o1 r load) g o3 m3 ) ( r Common Mode Input Voltage Range V SS +V TN1 +V DSAT5 +V DSAT1 < V IC < V DD V DSAT3 V TP3 + V TN1 o1 r o3 ) 1. What is CM Input Voltage? 2. How do we prove this equation?

(Std. Library) Design Exercise Design Flow Determine Specifications Power Consumption (ex. 1mW) Voltage Gain (ex. >30) Active Common Mode Input range (as large as possible) Others: slew rate, CMRR, PSRR, etc. Determine minimum channel length Determine channel width Determine W 1,2 from voltage gain spec. Determine W 5 & Bias Voltage from power consumption & CM min. Determine W 3,4 from CM max. Determine Bias Level of current source tr. Check other specifications

Feedback Feedback & Stability Voltage Amplifier Model Common Mode Feedback

Feedback & Stability

Voltage Amplifier Model Models

(cont d) Voltage Amplifier Model 1 st Order Model

(cont d) Voltage Amplifier Model 2 nd Order Model

(cont d) Voltage Amplifier Model Time Response of the 2 nd Order Model

(cont d) Voltage Amplifier Model

Feedback Characteristics Gain desensitization A f da da A f x x f f o s A = 1+ βa da = (1+ βa) 2 1 da = 1+ βa A Band width extension AM A(s) = 1+ s/ ω A f H A(s) (s) = 1+ βa(s) AM /(1+ βam ) = 1+ s / ω (1+ βa H M ) Noise Reduction S = N V o S N V V s n A1A2 = Vs 1+ βa A Vs = V n A 2 1 2 + V n A1 1+ βa A Non-linearity Reduction (a) (b) w/o feedback w feedback 1 2

Common Mode Feedback Why is CMFB circuit needed? Due to TR mismatch, TRs may not be in saturation region at operating point. DM Gain decreases and CM gain increases Since output CM level is sensitive to device properties and mismatches, it cannot be stabilized by means of differential feedback. General Topology of CMFB Circuit

(cont d) Common Mode Feedback Examples of CMFB Folded cascode amplifier with CMFB Useful for low gain applications A v = g ( ro 1,2 ro 3, 4 R m1,2 F )

References Joongho Choi, CMOS analog IC Design, IDEC Lecture Note, Mar. 1999. B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001. Hongjun Park, CMOS Analog Integrated Circuits Design, Sigma Press, 1999.