Land Grid Array (LGA) Low Inductance Capacitor Advantages in Military and Aerospace Applications

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Land Grid Array (LGA) Low Inductance Capacitor Advantages in Military and Aerospace Applications A B S T R A C T : The benefits of Land Grid Array (LGA) capacitors and superior low inductance performance in modern military and aerospace designs. Sonja Brown Product Marketing Manager Low Inductance Capacitors

Land Grid Array (LGA) Low Inductance Capacitor Advantages in Military and Aerospace Applications Sonja Brown Product Marketing Manager Low Inductance Capacitors Introduction Today s aerospace and military theatre applications demand more real-time data processing than ever before. The two main drivers are high acquisition data rates and graphics/interfaces for information, display and response systems. Both aspects of these require more and faster CPU/ASIC processing power. The common factor is to provide the pulse energy fast enough to support the higher clock rates of the various CPU, GPU and DSPs. This requires a clean power supply system with minimal equivalent series resistance (ESR) and, more importantly, at high frequency, low inductance (equivalent series inductance = ESL). What is inductance and why is it important When an ASIC or MPU switches, it will draw power. The amount of circuit noise that it generates, (delta V), is equal to the inductance (L) times the di/dt, where di/dt is the rate of current change caused when the device switches logic state. As the IC frequency goes up, delta V will increase. As delta V is the voltage noise that is created in the circuit, it impacts the noise margins specified in the circuit. In order to keep delta V low, designers can either use large amounts of standard capacitors mounted in parallel, or utilize a smaller number of low inductance capacitors. As a result the increasing speed of systems has driven the requirement for lower ESL capacitors. In addition, when bussing a signal into and out of a processor the electromagnetic energy of the signal itself will act as a coil due to the loop of its path. This effect becomes very significant, as it causes increased power loss as the frequency of the signal increases. This loss of power impacts the efficiency of the processor to handle data. In a standard MLCC capacitor, the ESL arises as a function of the geometry of the device itself; the signal travels into one terminal, out the other and then to the processor, creating a loop large enough to have a significant loss at high frequency. High-speed MPU, GPU and DSP semiconductor device performance can be significantly enhanced by reduced inductance capacitors being positioned very close to the die (on the package) or in the immediate vicinity on the PCB. There are a number of strategies component manufacturers have employed to reduce the impact of this loop. Evolution of low inductance MLCC capacitors. The first capacitors released specifically to reduce inductance were called low inductance chip capacitors (LICC), which used reverse geometry terminations. This meant terminating the capacitor on the long side (L) rather than the traditional end (W), so the signal loop would be based on the width of the part, rather than the length. For example, a 1206 device could be manufactured as an 0612 and would exhibit half the inductance, (typically 500pH vs 1nH). Going to smaller case sizes (0508, 0306) would further reduce ESL because the current loop is smaller, but there is a trade-off. The smaller parts would have lower bulk capacitance available for decoupling. In these circumstances, some designers have used combinations of low inductance capacitors and high CV capacitors in parallel to achieve their parametric performance goals. The next generation of devices, pioneered and patented by AVX, were interdigitated chip capacitors (IDC). Instead of a solid termination on the package, the part had multiple striped terminations, alternately connected to the power and ground planes of the PCB, or even the processor itself. This system resulted in mutual inductance cancellation, separating the inductive and capacitive properties of the device from each other. As an example, an X5R, 4 volt, 0508 outline package can yield 2.2uF bulk capacitance but with only 45pH of ESL. Going beyond this performance level, a low inductance capacitor array (LICA) was developed. This was an array of vertical electrode elements in a BGA flip-chip package. This was specifically designed for on-chip or interposer deployment in very high-end processor applications. Concept of Revolutionar y Land Grid Array Capacitors The next generation of low inductance capacitors for PCB (rather than BGA) applications has just been released. The land grid array (LGA) capacitor design evolved from the two basic strategies outlined above for reducing ESL. The first was to make the area of the 2

current loop formed by the mounted device as small as possible, then use multiple, parallel loops to reduce the net inductance of the device. The second is to break up the longside terminations into segmented terminals of polarity to form several parallel small area current loops such as in interdigitated capacitors (IDCs). LICC IDC Figure 1. Internal electrode schematics show how IDC terminals are segmented into alternating polarity forming small parallel current loops, unlike the LICC terminals. While the LGA design evolved from its predecessors, LICC and IDC, it is revolutionary in the fact that it utilizes precision fine copper termination technology (FCT) and the very important vertical orientation for the internal electrodes, similar to the LICA product. Multi- Layer Ceramic Capacitors (MLCC), LICC and IDC all have traditional horizontally oriented electrodes and terminals located on the sides of the capacitors through which electrical signals enter/exit the devices. With vertical electrodes and precision FCT termination on the bottom, LGA capacitors have very small current loops and therefore very low ESL. 0306 LICC ESL ~ 105 ph 0306 LGA ESL ~ 35 ph Figure 2. Patterned vertical electrodes coupled with precision FCT termination enable LGA capacitors with very small current loops and very low ESL. Traditional methods of termination become more problematic as the component size is reduced. The new LGA system is the enabling technology which allows a precisely controlled gap between the opposing polarity terminals on the bottom of the LGA Capacitor. This is a critical design element as it minimizes the effective current loop width. The new FCT precision termination is accomplished with a patented process which enables tight control of the terminal deposition and therefore enables smaller devices with finer pitch interconnect to be manufactured. Using the FCT process also allows the electrode configuration of the I/O terminals to be located on the bottom of the capacitor so signals can feed directly into and out of the PCB vias to the processor. Together with the vertical electrode configuration allowing loop areas to be greatly reduced, and current cancellation within the capacitor achieved by the new terminal structure, a relatively simple two-terminal LGA can have an inductance of only 35pH. Benefits of Land Grid array Capacitors This new LGA technology offers many benefits for aerospace and military applications. Design engineers can take advantage of reduced board count (reduced weight), ease of manufacturing and generate more robust end products. A two-terminal LGA device has equivalent ESL of an eight-terminal IDC device. From the standpoint of manufacturability, this is a major improvement for all end customers but especially for military/high reliability applications. This equates to fewer filet inspections and more robust connections with ease of manufacturing in mind. Another benefit of the LGA capacitor is the range of case sizes available. This technology is available in 0805, 0508, 0306 and now even 0204 case sizes. The primary variable within this assortment of devices is the cancellation span, or minimization of the linear distance spanned by the gap between the bottom terminals to minimize ESL. Unlike conventional capacitors such as MLCC, LICC and IDC, the inductance is actually lower for larger case sizes in the LGA capacitor because the current loop area is set by the design of the internal electrode rather than by the external dimensions of the component (See Figure 3.). This means that maximum capacitance does not have to be sacrificed for lowest inductance. The major benefit in military/high reliability applications is reduction in the number of components necessary to optimize the system performance. G W There is another obvious benefit of the LGA system with respect to PCB component density. Unlike traditional MLCC components, the LGA recommended pad layout footprints are only marginally larger than the actual device itself, providing a much tighter packing density on the PCB, which is important in size / weight constrained systems. This enables much more effective capacitance to G L G H Figure 3. Three key geometries control inductance in LGA capacitors. 3

be placed in a given area on the board. An additional advantage which gives rise to a much more robust board assembly comes from the larger termination area of the LGA capacitors. This results in a very reliable bond with lower mounting stresses. Board-mounting trials at AVX and other sites have shown that parts are readily reflowed, and the mechanical integrity of the LGA solder joint is equivalent, or superior, to those formed with conventional capacitor styles. The combination of high bond strength and small component size means these devices are ideal for high vibration/shock applications. A larger termination area also reduces chances of tombstoning and misalignment. LGA capacitors are available in RoHS compliant or Tin/Lead terminations. Summar y Fine copper termination (FCT) technology and vertically placed electrodes are the basis for revolutionary, ultralow inductance Land Grid Array (LGA) capacitors. They are ideally suited to military, space, defense, and other high reliability applications where size, weight and high design reliability are critical. The superior performance does not compromise capacitance or termination bond strength and most importantly enables designers to meet the future demands of the fast developing sensing, display and navigation systems which are being integrated into a wide range of equipment from avionics to hand held devices. Applications Benefiting from Land Grid Array Technology Many military, defense, aerospace, and other high reliability systems will benefit from the use of LGA capacitors. Initiatives such as Future Combat Systems (FCS), using a range of applications like GPS, JTRS and FLIR will utilize DSP, ASIC, CPU and GPU semiconductor technologies. They will see significantly improved system performance related to reliability, robust design, and the lower ESL from LGA capacitors. In fact, any application where data is being gathered, manipulated, stored and/or reported in real time will benefit from the superior decoupling performance of these devices. 4

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