Features l Advanced Process Technology l Ultra Low On-Resistance l 175 C Operating Temperature l Fast Switching l Repetitive Avalanche Allowed up to Tjmax l Lead-Free Description This HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. Absolute Maximum Ratings I D @ T C = 25 C Parameter Continuous Drain Current, V GS @ 1V (Silicon Limited) HEXFET Power MOSFET V DSS = 55V R DS(on) = 6.5mΩ I D = 75A www.irf.com 1 7/23/1 G TO-22AB IRF325ZPbF D S D 2 Pak IRF325ZSPbF IRF325ZPbF IRF325ZSPbF IRF325ZLPbF TO-262 IRF325ZLPbF Units I D @ T C = C Continuous Drain Current, V GS @ 1V 78 A I D @ T C = 25 C Continuous Drain Current, V GS @ 1V (Package Limited) 75 I DM Pulsed Drain Current c 44 P D @T C = 25 C Power Dissipation 17 W Linear Derating Factor 1.1 W/ C V GS Gate-to-Source Voltage ± 2 V E AS (Thermally limited) Single Pulse Avalanche Energyd 18 mj E AS (Tested ) Single Pulse Avalanche Energy Tested Value h 25 I AR Avalanche Currentc See Fig.12a, 12b, 15, 16 A E AR Repetitive Avalanche Energy g mj T J Operating Junction and -55 to + 175 T STG Storage Temperature Range C Soldering Temperature, for 1 seconds 3 (1.6mm from case ) 1 lbfyin (1.1Nym) Mounting Torque, 6-32 or M3 screw i Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case.9 C/W R θcs Case-to-Sink, Flat Greased Surface i.5 R θja Junction-to-Ambient i 62 R θja Junction-to-Ambient (PCB Mount) j 4 Max. 11 PD - 95129A
IRF325ZS/LPbF Electrical Characteristics @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units V (BR)DSS Drain-to-Source Breakdown Voltage 55 V Conditions V GS = V, I D = 25µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient.51 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance 4.9 6.5 mω V GS = 1V, I D = 66A e V GS(th) Gate Threshold Voltage 2. 4. V V DS = V GS, I D = 25µA gfs Forward Transconductance 71 S V DS = 25V, I D = 66A I DSS Drain-to-Source Leakage Current 2 µa V DS = 55V, V GS = V 25 V DS = 55V, V GS = V, T J = 125 C I GSS Gate-to-Source Forward Leakage 2 na V GS = 2V Gate-to-Source Reverse Leakage -2 V GS = -2V Q g Total Gate Charge 76 11 I D = 66A Q gs Gate-to-Source Charge 21 nc V DS = 44V Q gd Gate-to-Drain ("Miller") Charge 3 V GS = 1V e t d(on) Turn-On Delay Time 18 V DD = 28V t r Rise Time 95 I D = 66A t d(off) Turn-Off Delay Time 45 ns R G = 6.8 Ω t f Fall Time 67 V GS = 1V e L D Internal Drain Inductance 4.5 Between lead, nh 6mm (.25in.) L S Internal Source Inductance 7.5 from package and center of die contact C iss Input Capacitance 345 V GS = V C oss Output Capacitance 55 V DS = 25V C rss Reverse Transfer Capacitance 31 pf ƒ = 1.MHz C oss Output Capacitance 194 V GS = V, V DS = 1.V, ƒ = 1.MHz C oss Output Capacitance 43 V GS = V, V DS = 44V, ƒ = 1.MHz C oss eff. Effective Output Capacitance 64 V GS = V, V DS = V to 44V f Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current 75 MOSFET symbol (Body Diode) A showing the I SM Pulsed Source Current 44 integral reverse (Body Diode)Ãc p-n junction diode. V SD Diode Forward Voltage 1.3 V T J = 25 C, I S = 66A, V GS = V e t rr Reverse Recovery Time 28 42 ns T J = 25 C, I F = 66A, V DD = 25V Q rr Reverse Recovery Charge 25 38 nc di/dt = A/µs e t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com
I D, Drain-to-Source Current ( A) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) Gfs, Forward Transconductance (S) IRF325ZS/LPbF V GS TOP 15V 1V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V V GS TOP 15V 1V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V 1 4.5V 2µs PULSE WIDTH Tj = 25 C 1.1 1 1 V DS, Drain-to-Source Voltage (V) 4.5V 2µs PULSE WIDTH Tj = 175 C 1.1 1 1 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics T J = 25 C 12 T J = 175 C T J = 175 C 8 6 T J = 25 C 1 4 V DS = 25V 2µs PULSE WIDTH 1 4. 5. 6. 7. 8. 9. 1. 11. V GS, Gate-to-Source Voltage (V) 2 V DS = 1V 2µs PULSE WIDTH 2 4 6 8 I D, Drain-to-Source Current (A) Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance Vs. Drain Current www.irf.com 3
I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) IRF325ZS/LPbF 6 5 4 V GS = V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd Ciss 2 16 12 I D = 66A V DS = 44V VDS= 28V VDS= 11V 3 8 2 Coss 4 Crss 1 1 V DS, Drain-to-Source Voltage (V) 2 4 6 8 12 Q G Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage. OPERATION IN THIS AREA LIMITED BY R DS (on). T J = 175 C 1. µsec T J = 25 C 1 1. V GS = V.1.2.6 1. 1.4 1.8 2.2 V SD, Source-toDrain Voltage (V) 1.1 Tc = 25 C Tj = 175 C Single Pulse 1msec 1msec 1 1 V DS, Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com
I D, Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) IRF325ZS/LPbF 12 LIMITED BY PACKAGE 2.5 I D = 66A V GS = 1V 8 2. 6 1.5 4 2 1. 25 5 75 125 15 175 T C, Case Temperature ( C).5-6 -4-2 2 4 6 8 12 14 16 18 T J, Junction Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 1. Normalized On-Resistance Vs. Temperature 1 D =.5 Thermal Response ( Z thjc ).2.1.1.5.1.2.1.1 SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 1E-6 1E-5.1.1.1.1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5
V GS(th) Gate threshold Voltage (V) E AS, Single Pulse Avalanche Energy (mj) IRF325ZS/LPbF V DS L 15V DRIVER 35 3 25 TOP BOTTOM I D 27A 47A 66A R G 2V V GS tp D.U.T IAS.1Ω + - V DD A 2 15 Fig 12a. Unclamped Inductive Test Circuit tp V (BR)DSS 5 25 5 75 125 15 175 Starting T J, Junction Temperature ( C) I AS Fig 12b. Unclamped Inductive Waveforms Q G Fig 12c. Maximum Avalanche Energy Vs. Drain Current 1 V Q GS Q GD 4. V G Charge Fig 13a. Basic Gate Charge Waveform 3. I D = 25µA 2. 1K DUT L VCC 1. -75-5 -25 25 5 75 125 15 175 T J, Temperature ( C ) Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature 6 www.irf.com
Avalanche Current (A) E AR, Avalanche Energy (mj) IRF325ZS/LPbF Duty Cycle = Single Pulse 1.1.5.1 Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax 1.1 1.E-8 1.E-7 1.E-6 1.E-5 1.E-4 1.E-3 1.E-2 1.E-1 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth 2 16 12 8 4 TOP Single Pulse BOTTOM 1% Duty Cycle I D = 66A 25 5 75 125 15 175 Starting T J, Junction Temperature ( C) Notes on Repetitive Avalanche Curves, Figures 15, 16: (For further info, see AN-5 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see figure 11) P D (ave) = 1/2 ( 1.3 BV I av ) = DT/ Z thjc Fig 16. Maximum Avalanche Energy I av = 2DT/ [1.3 BV Z th ] Vs. Temperature E AS (AR) = P D (ave) t av www.irf.com 7
IRF325ZS/LPbF + - D.U.T + ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - + Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =1V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V DS R D R G V GS D.U.T. + - V DD 1V Pulse Width 1 µs Duty Factor.1 % Fig 18a. Switching Time Test Circuit V DS 9% 1% V GS t d(on) t r t d(off) t f Fig 18b. Switching Time Waveforms 8 www.irf.com
IRF325ZS/LPbF TO-22AB Package Outline Dimensions are shown in millimeters (inches) TO-22AB Part Marking Information EXAMPLE: THIS IS AN IRF11 LOT CODE 1789 ASSEMBLED ON WW 19, 2 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead - Free" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR = 2 WEEK 19 LINE C TO-22AB package is not recommended for Surface Mount Application Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9
IRF325ZS/LPbF D 2 Pak (TO-263AB) Package Outline Dimensions are shown in millimeters (inches) D 2 Pak (TO-263AB) Part Marking Information THIS IS AN IRF53S WITH LOT CODE 824 ASSEMBLED ON WW 2, 2 IN THE AS SEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO AS S E MB LY LOT CODE F53S PART NUMBER DATE CODE YEAR = 2 WEEK 2 LINE L OR INTERNATIONAL RECTIFIER LOGO AS S E MB LY LOT CODE F53S PART NUMBER DATE CODE P = DE S IGNAT E S L E AD - F RE E PRODUCT (OPTIONAL) YEAR = 2 WEEK 2 A = ASSEMBLY SITE CODE Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ 1 www.irf.com
IRF325ZS/LPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL313L LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead-Free" OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = ASSEMBLY SITE CODE Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 11
IRF325ZS/LPbF D 2 Pak Tape & Reel Infomation Dimensions are shown in millimeters (inches) TRR 1.6 (.63) 1.5 (.59) 4.1 (.161) 3.9 (.153) 1.6 (.63) 1.5 (.59).368 (.145).342 (.135) FEED DIRECTION TRL 1.85 (.73) 1.65 (.65) 1.9 (.429) 1.7 (.421) 11.6 (.457) 11.4 (.449) 16.1 (.634) 15.9 (.626) 1.75 (.69) 1.25 (.49) 15.42 (.69) 15.22 (.61) 24.3 (.957) 23.9 (.941) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.5 (.532) 12.8 (.54) 27.4 (1.79) 23.9 (.941) 4 33. (14.173) MAX. 6. (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by T Jmax, starting T J = 25 C, L =.8mH R G = 25Ω, I AS = 66A, V GS =1V. Part not recommended for use above this value. ƒ Pulse width 1.ms; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from to 8% V DSS. 26.4 (1.39) 24.4 (.961) 3 3.4 (1.197) MAX. 4 Limited by T Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. % tested to this value in production. This is only applied to TO-22AB pakcage. ˆ This is applied to D 2 Pak, when mounted on 1" square PCB (FR- 4 or G-1 Material). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245, USA Tel: (31) 252-715 TAC Fax: (31) 252-793 Visit us at www.irf.com for sales contact information. 7/21 12 www.irf.com