CHPTE PETNL MPLFES Chapter utline. The deal p mp. The nerting Configuration. The Noninerting Configuration. Difference mplifiers.5 ntegrators and Differentiators.6 DC mperfections.7 Effect of Finite pen Loop Gain and Bandwidth on Circuit Performance.8 Large Signal peration of p mp NTUEE Electronics L. H. Lu
. deal p mp ntroduction Their applications were initially in the area of analog computation and instrumentation p amp is ery popular because of its ersatility p amp circuits work at leels that are quite close to their predicted theoretical performance The op amp is treated a building block to study its terminal characteristics and its applications p amp symbol and terminals Two input terminals: inerting input terminal () and noninerting input terminal (+) ne output terminal Two dc power supplies V + and V ther terminals for frequency compensation and offset nulling Circuit symbol for op amp p amp with dc power supplies NTUEE Electronics L. H. Lu
deal characteristics of op amp Differential input single ended output amplifier nfinite input impedance i = i = (regardless of the input oltage) Zero output impedance = ( ) (regardless of the load) nfinite open loop differential gain nfinite common mode rejection nfinite bandwidth Differential and common mode signals Two independent input signals: and Differential mode input signal ( d ): d = ( ) Common mode input signal ( cm ): cm = ( + ) lternatie expression of and : = cm d = cm + d Exercise. (Textbook) Exercise. (Textbook) NTUEE Electronics L. H. Lu
. The nerting Configuration The inerting close loop configuration External components and form a close loop utput is fed back to the inerting input terminal nput signal is applied from the inerting terminal nerting configuration using ideal op amp The required conditions to apply irtual short for op amp circuit: Negatie feedback configuration nfinite open loop gain Closed loop gain: G = nfinite differential gain: = = nfinite input impedance: i = i = Zero output impedance: = i = Voltage gain is negatie nput and output signals are out of phase Closed loop gain depends entirely on external passie components (independent of op amp gain) Close loop amplifier trades gain (high open loop gain) for accuracy (finite but accurate closed loop gain) NTUEE Electronics L. H. Lu
Equialent circuit model for the inerting configuration nput impedance: i i = ( ) = For high input closed loop impedance, should be large, but is limited to proide sufficient G n general, the inerting configuration suffers from a low input impedance utput impedance: o = Voltage gain: o = ther circuit example for inerting configuration NTUEE Electronics L. H. Lu 5
pplication: the weighted summer weighted summer using the inerting configuration weighted summer for coefficients of both signs Exercise. (Textbook) Exercise.6 (Textbook) Exercise.7 (Textbook) NTUEE Electronics L. H. Lu 6 )... ( n n f f f n k k f i c c b c a b c a
. Noninerting Configuration The noninerting close loop configuration External components and form a close loop utput is fed back to the inerting input terminal nput signal is applied from the noninerting terminal Noninerting configuration using ideal op amp The required conditions to apply irtual short for op amp circuit: Negatie feedback configuration nfinite open loop gain Closed loop gain: G = + nfinite differential gain: + = = nfinite input impedance: i = i = Zero output impedance: = + i = ( + ) Closed loop gain depends entirely on external passie components (independent of op amp gain) Close loop amplifier trades gain (high open loop gain) for accuracy (finite but accurate closed loop gain) Equialent circuit model for the noninerting configuration nput impedance: i = utput impedance: o = (+ ) i Voltage gain: o = + NTUEE Electronics L. H. Lu 7
The oltage follower Unity gain buffer based on noninerting configuration Equialent oltage amplifier model: nput resistance of the oltage follower i = utput resistance of the oltage follower o = Voltage gain of the oltage follower o = The closed loop gain is unity regardless of source and load t is typically used as a buffer oltage amplifier to connect a source with a high impedance to a lowimpedance load Exercise.9 (Textbook) NTUEE Electronics L. H. Lu 8
Exercise : ssume the op amps are ideal, find the oltage gain ( o i )of the following circuits. () () () () NTUEE Electronics L. H. Lu 9
. Difference mplifiers Difference amplifier deal difference amplifier: esponds to differential input signal d ejects the common mode input signal cm Practical difference amplifier: = d d + cm cm d is the differential gain cm is the common mode gain Common mode rejection ratio (CM): Single op amp difference amplifier NTUEE Electronics L. H. Lu log cm d CM i d cm d cm d cm cm d
Superposition technique for linear time inariant circuit The condition for difference amplifier operation: = = ( )( ) For simplicity, the resistances can be chosen as: = and = Differential input resistance id : Differential input resistance: id = Large can be used to increase id becomes impractically large to maintain required gain Gain can be adjusted by changing and simultaneously NTUEE Electronics L. H. Lu ) ( Set = Set = cm d log CM d cm
nstrumentation amplifier d Differential mode gain can be adjusted by tuning Common mode gain is zero nput impedance is infinite utput impedance is zero t s preferable to obtain all the required gain in the st stage, leaing the nd stage with a gain of one Exercise.5 (Textbook) Exercise.7 (Textbook) NTUEE Electronics L. H. Lu
.5 ntegrators and Differentiators nerting configuration with general impedance and in inerting configuration can be replaced by Z (s) and Z (s) The closed loop transfer function: V o (s) V i (s) = Z (s) Z (s) The transmission magnitude and phase for a sinusoid input can be ealuated by replacing s with j nerting integrator Time domain analysis: C ( t) V C ( t) C C Frequency domain analysis: t i ( t) dt V ( t) C t Vo ( j) Z V ( j) Z jc i V V o i C = 9 C C t ( t) dt V ( t) dt C lso known as Miller integrator ntegrator frequency ( int ) is the inerse of the integrator time constant (C) int = C The capacitor acts as an open circuit at dc ( = ) open loop configuration at dc (infinite gain) ny tiny dc in the input could result in output saturation NTUEE Electronics L. H. Lu
The Miller integrator with parallel feedback resistance To preent integrator saturation due to infinite dc gain, parallel feedback resistance is included G (db) Vo ( j) Z( j) V ( j) Z ( j) i F jc F C C w (log scale) Closed loop gain = (j F + F ) Closed loop gain at dc = F Closed loop gain at high frequency ( >> F C) jc Corner frequency (db frequency) = F C The integrator characteristics is no longer ideal Large resistance F should be used for the feedback NTUEE Electronics L. H. Lu
The op amp differentiator Time domain analysis d ( t) i C dt d ( t) ( t) C dt Frequency domain analysis Vo ( j) Z V ( j) Z i V V o i jc C = 9 Differentiator operation: Differentiator time constant: C Gain (= C) becomes infinite at ery high frequencies High frequency noise is magnified (generally aoided in practice) NTUEE Electronics L. H. Lu 5
The differentiator with series resistance To preent magnifying high frequency noise, series resistance F is included G (db) Vo ( j) jc V ( j ) j C i F C F C w (log scale) Closed loop gain = jc ( + j F C) Closed loop gain at infinite frequency = F Closed loop gain at low frequency ( << F C ) jc Corner frequency (db frequency) = F C The differentiator characteristics is no longer ideal NTUEE Electronics L. H. Lu 6
Exercise : For a Miller integrator with = k and C = nf, a shunt resistance F is used to suppress the dc gain. Find the minimum alue of F if a period signal with a period of. s is applied at the input. Example. (Textbook) Example.5 (Textbook) Exercise.8 (Textbook) Exercise. (Textbook) NTUEE Electronics L. H. Lu 7
.6 DC mperfections* ffset oltage nput offset oltage (V S ) arises as a result of the unaoidable mismatches The offset oltage and its polarity ary from one op amp to another The analysis can be simplified by using the circuit model with an offset free op amp and a oltage source V S at input terminal Typical offset oltage is a few mv Effect of offset oltage for a closed loop amplifier V V S ( ) dc oltage V S (+ ) exists at the output at zero input oltage nput offset oltage is effectiely amplified by the closed loop gain as the error oltage at output Some op amps are proided with two additional terminals for offset nulling NTUEE Electronics L. H. Lu 8
nput bias and offset current DC bias currents B and B are required for certain types of op amps nput bias current is defined by B = ( B + B ) nput offset current is defined as S = B B Typical alues for op amps that use bipolar transistors are B = n and S = n Effect of input bias current for a closed loop amplifiers utput dc oltage due to input bias current: V = B B The alue of and the closed loop gain are limited. NTUEE Electronics L. H. Lu 9
Effect of input offset oltage on the the inerting integrator The output oltage is gien by t V VS C S dt V VS t C The output oltage increases with time until the op amp saturates Effect of input bias current on the inerting integrator The output oltage is gien by S t B Sdt B C C S t The output oltage also increases with time until the op amp saturates NTUEE Electronics L. H. Lu
.7 Effect of Finite pen Loop Gain and Bandwidth on Circuit Performance Practical op amp characteristics p amp with finite open loop gain: (j) = p amp with finite open loop gain and bandwidth: (j) = ( + j b ) Frequency response of op amp: pen loop op amp The frequency response of an open loop op amp is approximated by STC form: (j) = (+ j b ) t low frequencies ( << b ), the open loop op amp is approximated by (jw) t high frequencies ( >> b ), the open loop op amp is approximated by (jw) b Unity gain bandwidth (f t = t ) is defined as the frequency at which (j t ) t = b NTUEE Electronics L. H. Lu
nerting configuration using op amp with finite open loop gain Closed loop gain: Closed loop gain approaches the ideal alue of as approaches to infinite To minimize the dependence of G on open loop gain, we should hae >> + nput impedance: utput impedance: nerting configuration using op amp with finite gain and bandwidth NTUEE Electronics L. H. Lu ) ( i i ) ( G ) ( ) ( G G i i o ) ( ) ( ) ( ) ( b j j G ) ( ) ( j b if >> + G G (+j db ) where G = and db = b (+ ) ( G ) b
Exercise : Consider an inerting amplifier where the open loop gain and db bandwidth of the op amp are and rads, respectiely. Find the gain and bandwidth of the closeloop gain (exact and approximated alues) for the following cases: =,,, and. Exercise : n op amp has an open loop gain of 8 db and a db bandwidth of rads. () The op amp is used in an inerting amplifier with =. Find the close loop gain at dc and at = rads. () Two identical inerting amplifiers with = are cascaded. Find the close loop gain at dc and at = rads. () For the cascaded amplifier in (), find the frequency at which the gain is db lower than the dc gain. Exercise.6 (Textbook) Example.6 (Textbook) Exercise.7 (Textbook) Exercise.8 (Textbook) NTUEE Electronics L. H. Lu
utput oltage saturation.8 Large Signal peration of p mps ated output oltage (,max ) specifies the maximum output oltage swing of op amp Linear amplifier operation (for the required <,max ): = (+ ) Clipped output waeform (for the required >,max ): =,max The maximum input swing allowed for output oltage limited case:,max =,max (+ ) utput is typically limited by oltage in cases where L is large utput current limits Maximum output current (i,max ) specifies the output current limitation of op amp Linear amplifier operation (for the required i < i,max ): = (+ ) and i L = L Clipped output waeform (for the required i > i,max ): i L = i,max i F The maximum input swing allowed for output current limited case:,max = i,max [ L ( + )](+ ) utput is typically limited by current in cases where L is small NTUEE Electronics L. H. Lu
Slew rate Slew rate is the maximum rate of change possible at the output: S (Vsec) Slew rate may cause non linear distortion for large signal operation d dt max nput step function Small signal distortion (finite BW) Large signal distortion (S) Full power bandwidth ( t) V ( e Defined as the highest frequency allowed for a unity gain buffer with a sinusoidal output at,max t t ) ( t) V i o sint do ( t) Vo cost dt do ( t) max Vo S distortionless dt do ( t) max Vo S distortion dt M S fm o,max ( t) V o sint,max w M S w NTUEE Electronics L. H. Lu 5
Example.7 (Textbook) Exercise.9 (Textbook) Exercise. (Textbook) NTUEE Electronics L. H. Lu 6