FDYCZ Complementary N & P-Channel PowerTrench MOSFET Features : N-Channel Max r DS(on).7 at V GS =.V, I D = ma Max r DS(on). at V GS =.V, I D = ma Max r DS(on). at V GS =.V, I D = ma : P-Channel Max r DS(on). at V GS = -.V, I D = -ma Max r DS(on). at V GS = -.V, I D = -ma Max r DS(on).7 at V GS = -.V, I D = -ma ESD protection diode (note ) RoHS Compliant General Description This Complementary N & P-Channel MOSFET has been designed using Fairchild Semiconductor s advanced Power Trench process to optimize the r DS(ON) @ V GS =.V and specify the r DS(ON) @ V GS =.V. Applicatio Level shifting MOSFET Maximum Ratings T C = C unless otherwise noted Thermal Characteristics Power Supply Converter Circuits Load/Power Switching Cell Phones, Pagers Symbol Parameter Units V DS Drain to Source Voltage - V V GS Gate to Source Voltage ± ± V Drain Current -Continuous (Note a) - I D -Pulsed - ma Power Dissipation (Steady State) (Note a) P D (Note b) mw T J, T STG Operating and Storage Jaunting Temperature Range - to C S G D November 9 D G S FDYCZ Complementary N & P-Channel PowerTrench MOSFET R JA Thermal Resistance, Junction to Ambient (Note a) R JA Thermal Resistance, Junction to Ambient (Note b) Package Marking and Ordering Information C/W Device Marking Device Package Reel Size Tape Width Quantity E FDYCZ SC9-7 mm units 9 Fairchild Semiconductor Corporation FDYCZ Rev. B
Electrical Characteristics T J = C unless otherwise noted Symbol Parameter Test Conditio Type Min Typ Max Units Off Characteristics B VDSS B VDSS T J I DSS I GSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current On Characteristics (note ) V GS(th) V GS(th) T J r DS(on) g FS Gate-Body Leakage Dynamic Characteristics Switching Characteristics I D = A, V GS = V I D = - A, V GS = V I D = A, referenced to C I D = - A, referenced to C V DS = V, V DS =V V DS = -V, V DS =V V GS = ±V, V DS = V V GS = ±.V, V DS = V V GS = ±V, V DS = V Gate to Source Threshold Voltage V GS = V DS, I D = A V GS = V DS, I D = - A Gate to Source Threshold Voltage Temperature Coefficient Drain to Source On Resistance Forward Traconductance I D = A, referenced to C I D = - A, referenced to C V GS =.V, I D = ma V GS =.V, I D = ma V GS =.V, I D = ma, V GS =.V, I D = ma,t J = C V GS = -.V, I D = --ma V GS = -.V, I D = -ma V GS = -.V, I D = -ma V GS = -.V, I D = -ma, T J = C V DS = V, I D = ma V DS = -V, I D = -ma C iss Input Capacitance V DS = V, V GS = V, f = MHz C oss C rss Output Capacitance Reverse Trafer Capacitance V DS = -V, V GS = V, f = MHz t d(on) t r t d(off) Turn-On Delay Time Rise Time Turn-Off Delay Time V DD = V, I D = A, V GS =.V, R g = V DD = -V, I D = -.A, V GS = -.V, R g = t f Fall Time Q g Q gs Total Gate Charge Gate to Source Gate Charge V DS = V, I D = ma, V GS =.V Q gd Gate to Drain Miller Charge V DS = -V, I D = -ma, V GS = -.V -. -. -. -. -........7........ V - ± ± ±. -..7......7.... mv/ C A A V mv/ C S pf pf pf nc nc nc FDYCZ Complementary N & P-Channel PowerTrench MOSFET 9 Fairchild Semiconductor Corporation FDYCZ Rev. B
Electrical Characteristics T J = C unless otherwise noted Drain-Source Diode Characteristics V SD t rr Q rr Symbol Parameter Test Conditio Type Min Typ Max Units Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge V GS = V, I S = ma (Note ) V GS = V, I S = -ma (Note ) I F = ma, di/dt = A/ s I F = -ma, di/dt = A/ s Notes: : R JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pi. R JC is guaranteed by design while R JA is determined by the user's board design. Scale : on letter size paper a) C/W when mounted on a in pad of oz copper : Pulse Test : Pulse Width < us, Duty Cycle <.% : The diode connected between the gate and source serves only as protection agait ESD. No gate overvoltage rating is implied..7 -.. -. b) C/W when mounted on a minimum pad of oz copper V nc FDYCZ Complementary N & P-Channel PowerTrench MOSFET 9 Fairchild Semiconductor Corporation FDYCZ Rev. B
Typical Characteristics (N-Channel) ID, DRAIN CURRENT (A)...............7.... Figure. On-Region Characteristics Figure. Normalized on-resistance vs. Drain Current and Gate Voltage...9....... - - 7 Figure. Normalized on-resistance vs. Temperature V DS = V T A = - o C o C o C... V GS, GATE TO SOURCE VOLTAGE (V) Figure. Trafer Characteristics R DS(ON), ON-RESISTANCE (OHM) IS, REVERSE DRAIN CURRENT (A).9..7.... T A = o C T A = o C Figure. On-Resistance vs. Gate-to-Source Voltage.... V GS = V V GS, GATE TO SOURCE VOLTAGE (V) T A = o C o C - o C I D = ma...... V SD, BODY DIODE FORWARD VOLTAGE (V) Figure. Source to Drain Diode Forward Voltage vs. Source Current and Temperature FDYCZ Complementary N & P-Channel PowerTrench MOSFET 9 Fairchild Semiconductor Corporation FDYCZ Rev. B
Typical Characteristics (N-Channel) ID, DRAIN CURRENT (A).... Figure 7. Gate Charge Characteristics. V GS =.V ms s R JA = o C/W s T A = o C DC.. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE R DS(ON) LIMIT Figure 9. Maximum Safe Operating Area. D=...... V DS, DRAIN-SOURCE VOLTAGE (V) ms ms P(pk), PEAK TRANSIENT POWER (W) 9 7 Figure. Capacitance vs. Drain to source voltage.... t, TIME (sec) R JA = C/W T A = C Figure. Single Pulse Maximum Power Dissipation..... t, TIME (sec) R JA (t) = r(t) * R JA R JA = C/W P(pk) t t T J - T A = P * R JA (t) Duty Cycle, D = t / t FDYCZ Complementary N & P-Channel PowerTrench MOSFET Figure. Traient Thermal Respoe Curve Thermal characterization performed using the conditio described in Note b. Traient thermal respoe will change depending on the circuit board design. 9 Fairchild Semiconductor Corporation FDYCZ Rev. B
Typical Characteristics (P-Channel) -ID, DRAIN CURRENT (A).... RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) V GS = -.V -.V.. -V DS, DRAIN TO SOURCE VOLTAGE (V).... Figure. -.V -.V -.V -.V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE On-Region Characteristics Figure.. - - 7 T J, JUNCTION TEMPERATURE ( o C) Figure..... I D = -.A V GS = -.V V DS = -V Normalized on-resistance vs. Temperature T A = o C - o C o C... -V GS, GATE TO SOURCE VOLTAGE (V) -IS, REVERSE DRAIN CURRENT (A) RDS(ON), ON-RESISTANCE (OHM)......7...7...... V GS =-.V -.V -.V -.V -.V -.V -.V.... -I D, DRAIN CURRENT (A) Normalized on-resistance vs. Drain Current and Gate Voltage T A = o C T A = o C -V GS, GATE TO SOURCE VOLTAGE (V) Figure. On-Resistance vs. Gate-to-Source Voltage V GS = V T A = o C o C - o C I D = -.7A...... -V SD, BODY DIODE FORWARD VOLTAGE (V) FDYCZ Complementary N & P-Channel PowerTrench MOSFET Figure. Trafer Characteristics Figure 7. Source to Drain Diode Forward Voltage vs. Source Current and Temperature 9 Fairchild Semiconductor Corporation FDYCZ Rev. B
Typical Characteristics (P-Channel) -VGS, GATE-SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A) I D = -.A... Q g, GATE CHARGE (nc) Figure. V DS = -V -V -V Gate Charge Characteristics Figure 9.... -V DS, DRAIN-SOURCE VOLTAGE (V) r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE. R DS(ON) LIMIT V GS = -.V R JA = o C/W T A = o C ms ms ms s s DC s CAPACITANCE (pf) 7 C rss C oss -V DS, DRAIN TO SOURCE VOLTAGE (V) C iss f = MHz V GS = V Capacitance vs. Drain to source voltage.... t, TIME (sec) Figure. Maximum Safe Operating Area Figure. Single Pulse Maximum Power Dissipation. D =...... P(pk), PEAK TRANSIENT POWER (W) R JA = /W T A =..... t, TIME (sec) P(pk) R JA (t) = r(t) * R JA R JA = /W t t T J - T A = P * R JA (t) Duty Cycle, D = t / t FDYCZ Complementary N & P-Channel PowerTrench MOSFET Figure. Traient Thermal Respoe Curve Thermal characterization performed using the conditio described in Note b. Traient thermal respoe will change depending on the circuit board design. 9 Fairchild Semiconductor Corporation FDYCZ Rev. B 7
Dimeional Outline and Pad Layout. BSC. BSC (.) C.7. TOP VIEW A.... B.... BSC. C B A SEE DETAIL A..... LAND PATTERN RECOMMENDATION DETAIL A SCALE :..... FDYCZ Complementary N & P-Channel PowerTrench MOSFET BOTTOM VIEW NOTES: A) THIS PACKAGE CONFORMS TO EIAJ SC9 PACKAGING STANDARD. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DRAWING CONFORMS TO ASME Y.M-99 D) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. MADArevA 9 Fairchild Semiconductor Corporation FDYCZ Rev. B
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