Advanced AD/DA converters Overview Higher-order single-stage modulators Higher-Order ΔΣ Modulators Stability Optimization of TF zeros Higher-order multi-stage modulators Pietro Andreani Dept. of Electrical and Information Technology Lund University, Sweden Matching issues Advanced AD/DA Converters Higher-Order ΔΣ Modulators From these equations we obtain: with General single-stage DSM STF z + Y z L z U z L z V z 0 V( z Y( z + E( z Since Y is analog and V is digital, the reference voltage of the ADC is implicitly assumed to be unity in the equation above, and the same for the feedback DAC, which is in fact omitted in the schematic V( z STF( z U( z + TF( z E( z L0 ( z TF ( z L ( z L z Advanced AD/DA Converters Higher-Order ΔΣ Modulators 3 General single-stage DSM II L0 z STF ( z TF ( z L ( z L z Conversely, given the desired STF and TF, we obtain L 0 STF ( z ( z L ( z TF ( z TF z L must be large in the signal band, to reduce the TF there L 0 must also be large to give an STF close to unity L 0 and L have their poles in the same range; in fact L 0 and L usually have the same poles, which are also the zeros of the TF; L 0 and L have in general different zeros A typical case is when the STF is just a delay, and the TF is an -time differentiation: k ( Advanced AD/DA Converters Higher-Order ΔΣ Modulators 4 STF z z TF z z from which z z L0( z z ( z ; L( z ( z ( z
Poles and zeros The poles common to L 0 and L lie on the unit circle at z -k zeros of L 0 (for >k lie at z0, and k at infinity The zeros of L obey the equation z This yields one zero at infinity (for i0 below, and the rest is given by πi zi ( z j cot i,,... π j i + e Special case Important special case: loop filter with single input, and only the difference u(n-v(n enters the loop STF z ; L z Lz L z Lz 0 Lz Lz ; TF ( z + + Lz Advanced AD/DA Converters Higher-Order ΔΣ Modulators 5 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 6 Other special case Important special case: forward path gives L 0 L+, L unchanged Realizability There must be at least a clock delay in the loop containing L and Q + Lz Lz STF ( z + The input of the loop filter is therefore: TF ( z + Lz E U V U STF U + TF E + L This means that the loop does not contain the signal, but only the filtered quantization noise much relaxed demands on linearity! Otherwise, a given value of y(n would result in v(ny(n+e(n y(n+e(n, and this would pass through L instantly and change y(n during the same period the first sample of the impulse response of L (z must be zero this means that and therefore L ( 0 TF ( H ( L ( Advanced AD/DA Converters Higher-Order ΔΣ Modulators 7 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 8
If we assume the TF to be H ( Realizability II m bz m + b z +... + bz+ b H( z n az + a z + + az+ a n m m 0 n n... 0 bn m n, H( a Advanced AD/DA Converters Higher-Order ΔΣ Modulators 9 n Stability considerations The linearized model of the modulator would predict that the sole loop transfer function L would determine the stability properties of the modulator this would neglect the non-linear nature of the quantizer! The range of input amplitudes for which the modulator is stable is called stable input range, and must be lower or equal to the full range of the first feedback DAC In a higher-order single-bit modulator the stable input range is a few db below the full range of the feedback DAC this loss is usually the result of the non-linear effects of quantizer overload in fact, the input to the quantizer is Y( z STF( z U( z + ( TF( z E( z which shows that if the input u (filtered by the STF approaches the edge of the quantizer overload, the addition of the filtered q-error may push y past the overload range; this overload will increase E(z, which will aggravate the original overload, and so on in positive-feedback fashion To restore a stable operation of the modulator may require a reset, since just disconnecting the input may not be enough! Advanced AD/DA Converters Higher-Order ΔΣ Modulators 0 Stability considerations II The STF acts as a prefilter stability is mainly determined by the TF and by the number of bits in the quantizer Unfortunately, there are no known necessary and sufficient TF properties ensuring stable operation! The known results are either too conservative, or apply to special cases with DC inputs The most widely used criterion for stability is the so-called Lee s rule: jω jω A binary ΔΣ modulator is likely to be stable if TF ( e TF ( e max <.5 This is actually neither necessary nor sufficient! (in fact, it does not say anything about the maximum input signal! The maximum usually occurs at ωπ (i.e. at yquist, since this is farthest from the zeros (usually all close to z and closest to the poles; an exception can be when high-q poles exist in the TF, in which case the peak may occur near the highest-q pole. ω More on instability Replace the quantizer with a linear gain k and additive noise: As we have already seen, k can be found through simulations, and is given by vy, E y k, v( n sign( y( n yy, E y Therefore, we can write an improved linear TF as TF k ( z kl z k + TF z TF ( z The locus of the roots of the denominator, drawn for 0<k<, predicts the stability of the system Advanced AD/DA Converters Higher-Order ΔΣ Modulators Advanced AD/DA Converters Higher-Order ΔΣ Modulators
More on stability TF ( z TF k ( z kl z k + TF z k roots are poles of TF k0 roots are zeros of TF Stability all roots inside id the unit circle Here: root locus of a 5 th -order modulator unstable for k < 0.547 We can also appreciate what happens by considering the Bode plot of the loop gain, kl (z typically, the loop has its poles at or near DC high gain at low frequencies, decaying with 0dB/dec Loop gain Bode plot Loop gain with k conditional stability: if the gain drops sufficiently the phase at the 0dB crossing becomes lower than 80 degrees Two pairs of conjugate zeros in the TF The phase is 80 degrees for a loop gain of.83 if k /.83 0.547, the loop becomes unstable v(n is fixed in a single-bit quantizer reducing k is equivalent to increasing y and hence u again, this confirms that instability can be avoided by limiting the input signal Advanced AD/DA Converters Higher-Order ΔΣ Modulators 3 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 4 More on stability More sophisticated approaches to assess stability have been proposed by, among others, Lars Risbo at DTU, now at TI-Denmark In practice, extensive simulations are unavoidable! We have seen that rapidly varying input signals can cause instability even if their amplitude is low realistic worst-case input signals must be used square wave with frequency of the dominant poles of the TF usually well outside the signal band analog prefiltering may be of great thelp Advanced AD/DA Converters Higher-Order ΔΣ Modulators 5 Multi-bit stability Consider a modulator with an M-step quantizer (i.e., with M+ levels. The modulator is guaranteed (proof in book not to experience overload for any input u(n such that max un M h, where h h n and n < + hn Z Hz Z TFz 3 3 Example: M6, H z z 3z + 3z z h 8 any input with maximum value below 0 is guaranteed to be stable stable for inputs up to 6.5% of the full scale value of 6. Modulators with th -order differentiation for TF and M + steps in quantizer sufficient condition stable for arbitrary inputs up to 50% of the input range at least: H( z ( z z + z... + M h + + +... max un < + + + n Advanced AD/DA Converters Higher-Order ΔΣ Modulators 6 n 0
Multi-bit stability If M available range for signal is only, i.e. LSB! If M + available range for signal is 0.5(M++.5 > 50% If M + available range for signal is over 75% Extensive simulations show that for 5 and M > 5 the condition is very stringent: slightly higher u(n causes instability! Extensive behavioral simulations a must! Zero optimization Spreading zeros on the unit circle (i.e., at finite frequencies total inband noise is reduced Moving poles closer to zeros reduces the out-of-band TF improved stability Optimal zero location (assuming poles do not impact: Advanced AD/DA Converters Higher-Order ΔΣ Modulators 7 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 8 Zero optimization example Example: 5 th order, OSR3, both optimized and with all TF zeros at DC Zero optimization example simulation Same example: simulation vs. linear model, both k and optimal k.7 (obtained, once again, a posteriori from the simulation data one more time, the optimal k case matches simulations really well -6dBFS input, SQR 84dB 64 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 9 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 0
Zero optimization example SQR SQR less erratic than in lower-order modulators constant white noise assumption is more valid in higher-order modulators Input below 40dBFS 7dB higher than expected see spectrum in next slide linear model not enough (tones at f s /4, notch at f s / Zero optimization example SQR Low inputs spectrum is quite different from the expected linear model not enough! (lower in-band noise, tones at f s /4, notch at f s / Advanced AD/DA Converters Higher-Order ΔΣ Modulators Advanced AD/DA Converters Higher-Order ΔΣ Modulators More on zero optimization Even-order TFs: no optimized zeros at DC no perfect noise suppression at DC if perfect DC reproduction is required, it is possible to place two zeros at DC, and optimize the other ones following the same noise-minimization procedure (zeros at DC also help reducing the probability of low-frequency idle tones Constraints: TF pole optimization a The TF must satisfy the realizability condition TF ( b The out-of-band TF gain, and hence the stability of the modulator, are largely determined by the TF poles c We assumed that only the TF zeros are important in-band; also, TF poles are very often STF poles as well the denominator of the TF should be flat in-band! These constraints entail a trade-off in the location of the poles software tools available (e.g. Schreier s Delta-Sigma toolbox in Matlab Advanced AD/DA Converters Higher-Order ΔΣ Modulators 3 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 4
Optimization procedure If software is not available, cookbook recipe: Choose the modulator order based on the desired specifications Choose the TF type usual choices are Butterworth, inverse Chebyshev, or maximally-flat all-pole highpass transfer functions 3 Place the -3dB cutoff of the TF slightly above the edge of the signal band z zi 4 ow you have zeros z i and poles p i of the TF: H( z i z pi 5 Predict the stability of the modulator for multi-bit quantization, with the formula max un M+ h and for single-bit with Lee s rule: j max TF e ω <.5 ω Optimization procedure Since the maximum value of the TF on the unit circle usually occurs at z- (i.e. ωω s /; even if the peak occurs elsewhere, its value is usually close to that at z-, Lee s rule requires + zi H ( <.5 + p i 6 Confirm stability through extensive simulations 7 If stability not good poles must be shifted away from z-, while maintaining the flat gain in the signal band can be achieved by reducing the cutoff frequency, which can be shown to reduce the peak TF gain 8 If stability is robust but the SQR does not reach the predicted values, it may be beneficial to make the design more aggressive by increasing the cutoff frequency and repeating the stability test; steps 6-8 are iterated until a satisfactory performance is obtained i Advanced AD/DA Converters Higher-Order ΔΣ Modulators 5 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 6 Empirical SQR limits, b quantizer Curves include the effect of input amplitude reduction to ensure stability Empirical SQR limits, b quantizer Curves include the effect of input amplitude reduction to ensure stability Advanced AD/DA Converters Higher-Order ΔΣ Modulators 7 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 8
Empirical SQR limits, 3b quantizer Curves include the effect of input amplitude reduction to ensure stability Loop filter architectures CIFB CIFB cascaded integrators with distributed feedback and distributed inputs b (... + b + b z + + b z + i 0 ( z + i i L a (... + a + a z + + a z i + i i L z Advanced AD/DA Converters Higher-Order ΔΣ Modulators 9 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 30 Loop filter architectures CIFB (... + b b + b z + + b z + i 0 ( z + i i L L z a a+ a +... + a ( i + z + i i ( D( z H( z L z a + a z +... + a z + z All zeros at z ( DC; the a i coefficients can be found by equating D(z to the denominator of the desired TF Loop filter architectures CIFB 0 (... + L0 z b+ b z + + b z STF ( z L z D z The b i coefficients can be found by equating with the numerator of the desired STF Usually, all a i are non-zero because of the needed poles for stable operation The b i, however, can be chosen more freely: e.g., all equal to zero except b all STF zeros lie at infinity, and STF is given by b /D(z D(z must be flat in the pass-band Other possibility: b i a i, b + STF, modulator output becomes V( z U( z + H( z E( z Advanced AD/DA Converters Higher-Order ΔΣ Modulators 3 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 3
Loop filter architectures CIFB The input of the i th integrator becomes (with b i a i + W z X z av z bu z X z ah z E z i i i i i i Coefficient scaling for optimal dynamic range In general, the values of the feedforward/feedback coefficients yielding the desired TF and STF do not guarantee any control on the internal modulator states (i.e. integrator outputs, which may exceed the limits imposed by the power supply voltage (or, more in general, cause too much distortion dynamic range scaling is a must this is an issue common to all implementations of active filters! Scaling is accomplished by dividing the admittance of all input branches of a given integrator by a factor k,, and multiplying py with the same factor the admittance of all output branches of the same integrator in this way, the rest of the circuit is unaffected, and so are the transfer functions Thus, the input signal u(n is not present at the input of the integrator the loop processes only the quantization noise lower dynamic needed, especially in multi-bit quantizers less extensive dynamic range scaling needed more convenient coefficient values! Also, nonlinearities do not distort the signal, since the signal is not there! Advantageous compared to previous choice (i.e, b i 0 for i> Advanced AD/DA Converters Higher-Order ΔΣ Modulators 33 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 34 Complex zeros, CRFB architecture 5 th order two pairs of complex zeros CIFB modified into cascade of resonators with distributed feedback, CRFB, to keep the zeros on the unit circle (notice that integrators are now of the delaying kind st and nd integrators + feedback g yields two complex poles, solutions of pz z g z+ These poles are on the unit circle at frequencies ω, with ( ω ± cos g Complex zeros, CRFB architecture The same is of course true for the 3 rd and 4 th integrators + feedback g ω <<, cos ω ω ω g Since One of the integrators in each resonator needs to be delay-free to insure that the poles are on the unit circle In high-frequency ADCs realized using SC integrators it is advantageous to have a delay in every integrator, reducing speed requirements the denominator of the resonator becomes now + ( + pz z z g Poles are now outside the unit circle, at ± j g If ω is still a good approximation <<, ω g It should be noticed that the resonators by themselves are unstable, as is clear from the previous analysis; however, they are embedded in a stable feedbacl system, which prevents local oscillations Advanced AD/DA Converters Higher-Order ΔΣ Modulators 35 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 36
CIFF topology Alternative topology: cascade of integrators with feedforward (rather than feedback paths to create TF zeros CIFF topology CIFF with complex zeros CIFF with complex zeros (for the sake of readability, only first and last feedforward paths are shown If b b + and all other b i are zero, then it can be shown that the loop filter does not process the input signal same advantages as previously discussed Advanced AD/DA Converters Higher-Order ΔΣ Modulators 37 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 38 Multi-stage modulators Moderate OSR high SR cannot be obtained with -bit quantizers by simply raising the order of the modulator, because stability limits the permissible input signal amplitude Multi-bit quantizer flash ADC, linearity issues, complexity grows exponentially with #bits Different strategy multi-stage modulators! (with their own problems, though Leslie-Singh (L-0 cascade structure L th -order ΔΣ modulator as first stage, zero-order ADC as second stage; the outputs of the two stages are digitally filtered and combined to obtained the overall output The q-error e of the first stage is extracted in the analog domain, and then converted into digital by the multi-bit second stage V( z H( z V( z + H( z V( z Usually H implements the latency of the second ADC: H is instead chosen as the digital equivalent of TF H z z Advanced AD/DA Converters Higher-Order ΔΣ Modulators 39 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 40
Leslie-Singh (L-0 cascade structure { } + + z STF ( z U ( z TF ( z E ( z V z z STF z U z TF z E z TF z z E z E z Therefore, TF shapes now the q-error of the second stage, which can be made much smaller than the first stage s the second stage has no feedback no latency issues can be implemented e.g. as a multi-bit pipeline ADC (easier than a multi-bit loop quantizer in the first stage SQR enhancement > 0dB We can avoid the difficult subtraction yielding e (n by choosing y (n instead of e (n as input to the second stage: Choosing now + Y z V z E z z STF z U z TF z E z H ( z or actually H z z H z, to make it causal (the same delay of course for H z as well we obtain: Advanced AD/DA Converters Higher-Order ΔΣ Modulators 4 TF z TF z Leslie-Singh (L-0 cascade structure However, we have actually seen modulators where the loop filter only processes q-noise, but no signal, e.g. the CIFB modulator with b i a i and b +. This yields STF(z, and the output of the last integrator is + + TF ( z E ( z X z Y z b U z STF z U z TF z E z b U z Leslie-Singh (L-0 cascade structure + TF ( z z STF( z U ( z + TF( z E ( z + E( z TF ( z z STF( z z TF( z U( z + E ( z TF ( z TF ( z V z z STF z U z TF z E z { } TF in-band the SQR obtainable with this choice is very close << to the one given by the previous circuit a disadvantage though is that y (n contains the signal u(n as well the second ADC must be able to handle much larger signals and must have a much higher linearity! Advanced AD/DA Converters Higher-Order ΔΣ Modulators 4 Leslie-Singh (L-0 cascade structure X (z can be used as input to the second stage, as it does not contain the signal but only q-noise It is possible to adopt the same procedure with other low-distortion architectures extract y-ue, and use it as input to the nd stage E.g.: st stage in L-0 is a nd -order low-distortion CIFF modulator: ( STF z TF z z X z z E z X (z can be used directly as input to the second stage! Advanced AD/DA Converters Higher-Order ΔΣ Modulators 43 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 44
MASH modulator Obvious extension Multi-stAge noise-shaping (MASH, probably worst acronym ever! modulator, where the nd stage is yet another ΔΣ modulator + + V z STF z U z TF z E z V z STF z E z TF z E z For E (z to be cancelled, we require MASH modulator, H z TF z H z STF z H z STF z H z TF z STF is often only a delay and easy to implement The overall output becomes STF ( z STF ( z U ( z TF ( z TF ( z E ( z V z H z V z H z V z STF z V z TF z V z A typical case is a MASH with two nd -order modulators (- MASH STF z STF z z ( TF z TF z z 4 4 ( V z z U z z E z Advanced AD/DA Converters Higher-Order ΔΣ Modulators 45 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 46 MASH modulator oise shaping performance of a 4 th -order single-loop modulator, but stability of a nd -order modulator! In practice, the E input to the second modulator needs to be scaled to fit within the stable input range (scaling factor usually ¼ if the st stage is single-bit, higher than ¼ if multi-bit the inverse of the scaling factor must be included in H If the equation H( z TF( z H( z STF( z does not hold, E appears at the output t filtered by STF z TF z TF z STF z a a where a denotes the actual value of the analog transfer function this may result in a dramatic SQR deterioration this is the critical issue in all MASH modulators MASH modulator Another advantage of MASH is that is that the nd stage operates on e, which is noise-like, even if it may contain some harmonic distortion e is very similar to true white noise! E.g. below, the third harmonic is reduced by more than 30dB across the nd stage no need of dithering in MASH Advanced AD/DA Converters Higher-Order ΔΣ Modulators 47 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 48
MASH modulator Furthermore: multi-bit quantizer in the nd stage can be used without need of correction of DAC non-linearity this is because the nonlinearity error of this DAC is multiplied by H TF highpass filtered suppressed in the baseband! Also, the input of the nd stage does not contain any signal no harmonic distortion is generated! The small additional noise due to DAC non-linearities can be tolerated 3-stage MASH Three-stage MASH q-error of first and second stage can be (ideally cancelled with H( z TF( z H( z STF( z 0 H z TF z H z STF z 0 3 3 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 49 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 50 3-stage MASH [ ] [ ] [ ] V STF U + TF E H STF E + TF E H + STF E + TF E H STF H U + TF H E 3 3 3 3 3 3 3 ( z TF ( z TF ( z TF ( z STF ( z STF ( z H V z STF z H z U z + E z 3 3 3 Since H is an STF, the STFs are flat in the passband, the final q-error is e 3 filtered by the product of the three TFs! Three stages very high SQR is desired extremely low q-noise required leakage of e and e [due to mismatch between analog transfer functions (STF,,3 and TF,,3 and digital ones (H,,3 ] is critical and usually dominant oise leakage In single-stage high-order modulators, imperfections in the passive and active components of the loop filter changes TF and STF somewhat, but as long as the loop gain >>, the q-noise will be shaped (very well In MASH, however, matching between the various analog vs. digital transfer functions is crucial For the three-stage MASH, the leakage transfer function of e and e to the output are: Hl ( z H( z TF( z H( z STF( z H z H z TF z H z STF z Simplifying assumptions: l 3 3 The leakage of e is less important than that of e, since H l represents higher-order noise shaping than H l (e.g., in a -- MASH, H l is at most of order, while H l is of order 4. Moreover, e is smaller than e if a multi-bit quantizer is used in the nd stage Advanced AD/DA Converters Higher-Order ΔΣ Modulators 5 Advanced AD/DA Converters Higher-Order ΔΣ Modulators 5
oise leakage In H l the effect of an imperfect TF dominates the effect of an imperfect STF : Hl( z H( z TF( z H( z STF( z This is because the second stage is followed by the noise-shaping function H TF errors due to imperfect STF are noise shaped; errors due to imperfect TF are not shaped, since H has unity gain over the passband 3 Thus, we can approximate STF H with a actual; i ideal H z TF z H z TF z TF z l a i 4 Since TF /(-L, and L >>, we can rewrite the above expression as Hl ( z L L i a which is much simpler to handle than the original equations Advanced AD/DA Converters Higher-Order ΔΣ Modulators 53 oise leakage Example: - (or -- MASH loop filter of the first stage is a simple delaying integrator, with ideal transfer function a Ii ( z z If there is an error D in the nominal capacitance ratio used in the SCintegrator, and the opamp has a finite DC gain A, the actual transfer function becomes (D<<, a/a << a Ia ( z z p + a a a a D, p A A Since L z I z, we have z z p a + a Hl ( z + D+ a a a A A D + a + ( z A + a A Advanced AD/DA Converters Higher-Order ΔΣ Modulators 54 oise leakage Thus, there is an unfiltered leakage component equal to e /A, and a component that is st -order filtered very high gain opamp required for the unfiltered error; if OSR is moderate, then also D<< is required very high matching between capacitors An error in the path coupling the st stage to the nd stage will also add to H, but its effect at the overall output will be at least st l( ze ( z -order filtered, since the error will pass through H For a nd -order first stage the leakage of e will be reduced d the Taylor expansion of the leakage transfer function around z (i.e. at DC is with l 0 H z A + A z + A z +... a+ a A0 ; A A A aa a D A + + aa A aa Advanced AD/DA Converters Higher-Order ΔΣ Modulators 55 oise leakage a+ a A0 ; A A A aa a D A + + aa A aa First term unfiltered leakage, proportional to the inverse of the opamp gain usually very small Second term st -order filtered; Third term nd -order filtered; these two terms tend to dominate in typical situations Advanced AD/DA Converters Higher-Order ΔΣ Modulators 56