Efficiently simulating a direct-conversion I-Q modulator Andy Howard Applications Engineer Agilent Eesof EDA Overview An I-Q or vector modulator is a commonly used integrated circuit in communication systems. These modulators take two baseband data sequences (I and Q channels) and vary the amplitude and phase of a sinusoidal signal (the carrier) in response to the instantaneous I and Q channel voltages (References 1 and 2.) Designers of these ICs must be concerned with a number of characteristics, such as modulation accuracy, dynamic range, frequency responses, undesired leakage and intermodulation distortion terms, as well as power consumption, efficiency, and output power. This paper covers an ADS example (Reference 3) that shows the simulation of a direct-conversion, transistor-level I-Q modulator. Included are differential-mode mixers, a combiner, a buffer, and a power amplifier. Many simulations of the sub-circuits as well as the modulator are included: amplifier gain compression, load pull, AC frequency responses, mixer intermodulation distortion as a function of various swept parameters, modulator amplitude and phase accuracy, simulations with CDMA baseband data sources, and others. Many of the simulations would be almost impossible to complete with a purely timedomain simulator such as SPICE. The design, although not fabricated, is used to show the many simulation capabilities required to adequately evaluate the performance of an I-Q modulator. The time has not been taken to extensively optimize this design by reducing power consumption, minimizing bias voltages, etc., although the various simulation set-ups could be used to improve the performance. Also, bias circuitry has not been included. The design is a direct-conversion I-Q modulator, and is shown in Figure 1.
Figure 1: The modulator consists of a mixer, a combiner, a buffer, which also converts a differential-mode signal into a single-ended signal, and a power amplifier. Two 960 MHz LO signals that are 90 degrees out of phase are directly modulated by differential-mode baseband I and Q data signals. The LO signals are generated ideally by the simulator, although simulations are included with amplitude and phase imbalances to see their effects. Although not included, a 90-degree phase shifter could be created using an RC-CR network. A number of different simulations have been run on each of the different parts of the modulator, as well as simulations on the parts combined together. Our assumption is that a designer would not just throw the entire modulator together at once, and that there would be shortcomings that would be improved more easily by simulating one part of the modulator at a time. Simulations of each part of the modulator are described below. Power Amplifier The (low) power amplifier takes a voltage source input and converts it to a current, for driving a large-signal amplifier off chip, if a higher output power is desired. The topology consists of an emitterfollower stage driving three emitter-followers in parallel, as shown in Figure 2.
Figure 2: Power amplifier schematic. An S-parameter simulation of the device(s) used in the amplifier can be used to verify that they have gain at the frequency at which the modulator will be used. However, S-parameter analysis is linear only, and does not provide distortion or output power information. A simulation of the DC input-output transfer curve of the amplifier will give you an idea of where best to bias the input signal, so as to get the maximum dynamic range without clipping. This will not lead to the maximum efficiency, but for modulation formats that include both amplitude and phase, minimizing distortion may be more important than DC power consumption. Figure 3 shows a DC transfer curve simulation.
Figure 3: Amplifier s DC transfer curve, with output open-circuited. The markers are used to calculate the optimal input bias point to minimize clipping, although this might have to be modified if the previous stage is unable to output the supply voltage (5 Volts.) A load-pull simulation was run to simulate the output power, DC-to-RF efficiency, and 3rd- and 5th-order intermodulation distortion versus load impedance at one bias point. In this simulation, you specify a circular region of the Smith chart, and load impedances within this region will be presented to the output of the amplifier. The simulation results are shown in Figure 4. The DC-to-RF efficiency can be increased somewhat by driving the amplifier with a larger input signal, although at the expense of increased distortion.
Figure 4: DC-to-RF efficiency and delivered power contours for amplifier. Figure 5 shows the simulated load impedances, output spectrum, intermodulation distortion, and output waveform. Using this output with the contours of Figure 4, you can quickly determine how changing the load impedance affects the output power, efficiency, and level of intermodulation distortion products, as well as the shape of the output waveform.
Figure 5: Outputs from the two-tone load-pull simulation. After running the load-pull simulation, the Power Amplifier DesignGuide was used to determine component values for a simple series-l, shunt-c, series-c matching network, to generate the desired load impedance at 960 MHz. Next, a swept amplitude simulation was run to check output power compression, intermodulation distortion, and output waveforms versus input signal amplitude. The simulation set-up for this is shown in Figure 6.
Figure 6: Amplifier output power compression and intermodulation distortion simulation set-up. Figure 7 shows the simulation results. This shows the output power, efficiency, and intermodulation distortion characteristics, all as a function of input signal amplitude. From these plots and listing columns, you can quickly determine the level of distortion the circuit will produce for a given input signal level.
Figure 7: Output power compression and intermodulation distortion simulation results. As one additional characterization test, a 1-tone simulation was run, with a sweep of two parameters. One was the emitter resistor in each of the three parallel output stages, that sets the bias current, and the other was the input bias voltage. Of course, other arbitrary parameters could be swept to check for performance improvements or sensitivities. The simulation results are shown in Figure 8. Figure 8: Amplifier output power and DC-to-RF efficiency versus input bias voltage and output stage emitter bias resistor.
These results show that there are trade-offs that can be made between output power, DC-to-RF power efficiency, and DC bias current consumption. These plots also show the great flexibility that ADS has in presenting data, making it easier for designers to make trade-offs and optimize designs. Differential Input to Single-Ended Output Converter The differential input to single-ended output converter converts a differential-mode input signal to a single-ended output signal. This type of circuit is required at some point because the baseband circuits handle differential-mode signals whereas the output amplifier is single-ended. The simulations of this circuit include the DC transfer characteristic, as well as the differential- and common-mode smallsignal gains and the common-mode rejection ratio, versus frequency. Figure 9 shows the set-up for simulating both the common- and differential-mode gains. Figure 9: Combiner circuit differential- and common-mode gain simulation. The variable ph is set to two values, 0 and 180, which changes the polarity of one of the input signals and allows both gains to be simulated from one set-up. Figure 10 shows the common- and differential-mode gain simulation results.
Figure 10: Differential input to single-ended output simulation results. Combiner The combiner circuit combines two differential-mode input signals (from the mixers) into a differential-mode output signal. The simulations of this circuit include the DC transfer characteristic, as well as the differential- and common-mode small-signal gains and the common-mode rejection ratio, versus frequency. Mixers Two differential-mode mixers, that are similar to Gilbert cells, are used to directly modulate the two LO signals in quadrature with the baseband I- and Q-modulation waveforms. The two mixers are shown in Figure 11.
Figure 11: Schematic of the two identical mixers. While the schematic is too small to be read, the two mixers have a total of 48 BJTs. Because of their frequency conversion, characterizing mixer performance is more complex than characterizing circuits like amplifiers. The first characterization is of the mixer's conversion gain, second-, and third-order intermodulation distortion versus baseband signal amplitude. The simulation set up for this is shown in Figure 12.
Figure 12: Simulation set-up for mixer conversion gain and intermodulation distortion. In this simulation, the LO signal, modeled as a pulse waveform, is set to 960 MHz, and two baseband signals are defined, 20 khz apart, centered at 1 MHz, although these frequencies may be set arbitrarily without affecting simulation performance (unlike with other, timedomain based simulators.) The amplitudes of the two baseband signals are swept from 5 mv to 35 mv. Figure 13 shows the simulated output
spectrum, in two frequency ranges. Figure 13: Simulated mixer output spectrum, in narrow and broad frequency ranges, and for one input signal amplitude. These spectra are updated when the marker is moved. Figure 14 shows other simulation results, which indicate that the conversion gain is starting to decrease as the input signal amplitude is increased towards 35 mv, and that the intermodulation distortion levels are rising as expected. Although not included in this figure, second-order intermodulation distortion calculations are in the example file.
Figure 14: Mixer conversion gain and intermodulation distortion versus baseband signal amplitude. The data in the boxes are for one particular baseband input signal amplitude, selected by moving a marker. Simulations were also run to characterize the mixer s performance versus LO signal amplitude and baseband signal frequency. Figure 15 shows some of the results from the LO signal amplitude characterization. Figure 15: Mixer conversion gain and intermodulation distortion versus LO signal amplitude. These simulations help to determine the optimal baseband and LO signal amplitudes, as well as ensure that the mixer s frequency response will not distort the modulation signal.
Simulating the Modulator After simulating each element in the modulator individually, you can simulate the performance of the entire modulator. Ideally, the modulator output signal should be proportional to I( t) *sin( ω ct) + Q( t) *cos( ω ct), where I(t) and Q(t) are the baseband modulation signals and ω c is the carrier, or LO frequency, in this case of a direct-conversion modulator. So by applying different I and Q baseband signals, you can characterize the modulator s accuracy, intermodulation distortion, error-vector magnitude, output power compression, LO leakage, etc. If the baseband modulation signals are sinusoids, 90 degrees out of phase: I( t) = Vbb *sin( ω t) and Q( t) = Vbb *cos( ω t) m then if the Q signal is plotted on the y-axis versus the I signal on the x-axis on an x-y plot, then a circle is traced out. When these signals are applied to the I-Q modulator, the trajectory diagram (envelope of the modulated carrier) should also trace a circle of constant amplitude and constant rate of phase change. Any deviation from this ideal response is due to distortion or mismatches in the modulator, or amplitude and phase imbalances in the LO. You can simulate the modulator s performance with ideal LO signals, or introduce LO amplitude and phase imbalances and see their effects on the modulator s performance. The ADS Circuit Envelope simulator is particularly well suited for this type of simulation. Figure 16 shows a set up for simulating the single-sideband modulator output versus baseband signal amplitude. A 3-degree phase error and 5 percent magnitude error have been introduced (although you may set these arbitrarily), so the two LO signals are not ideally 90 degrees out of phase. The baseband signal amplitude has been swept from 1 mv to 30 mv. m
Figure 16: A set up for simulating the modulator output (singlesideband case) versus baseband signal amplitude. Figure 17 shows some of the simulation results. The output spectrum when the baseband signal amplitudes are 30 mv is shown, and this spectrum may be updated to correspond to a different input signal level, by just moving a marker. The upper sideband signal level and the highest intermodulation distortion term versus input signal amplitude are also shown. Figure 17: Part of the single-sideband simulation results.
Figure 18 shows the variation in signal amplitude as well as phase error at the output and two other locations within the modulator. These errors do vary somewhat with baseband signal magnitude. Figure 18: I-Q modulator magnitude and phase error simulation results. If the baseband modulation signals are sinusoids, in phase: I( t) = Vbb *cos( ω t) and Q( t) = Vbb *cos( ω t) m then the resulting output spectrum will be double sideband, centered on the LO frequency. Figure 19 shows some of the simulation results, including the output spectrum when the baseband signal amplitudes are 10 mv, the upper sideband signal level and the highest intermodulation distortion term versus input signal amplitude. m Figure 19: Double-sideband output spectrum, and output power of one of the fundamental tones and one of the intermodulation distortion terms versus input signal amplitude. Finally, the modulator was simulated with baseband signals corresponding to various modulation formats, such as pi/4 DQPSK and the CDMA. Figure 20 shows the modulator s output spectrum, output power, and adjacent-channel power levels, with baseband I and Q signals corresponding to the NADC pi/4 DQPSK modulation format.
Figure 20: Modulator s output spectrum, output power, and adjacentchannel power levels, with baseband I and Q signals corresponding to the NADC pi/4 DQPSK modulation format. Figure 21 shows the output trajectory and constellation diagrams as well as the error vector magnitude (EVM) in Volts versus time and the percent EVM. This simulation was with no LO amplitude or phase imbalance. You can introduce arbitrary values of these imbalances and observe the EVM degradation. Figure 21: Output trajectory and constellation diagrams and error vector magnitude data.
Figure 22 shows the same simulation results as Figure 22, except that this time a 3% LO phase imbalance and a 5% LO amplitude imbalance have been included. The trajectory diagram shows increased distortion, and the error vector magnitude is higher, which is as expected. Figure 22: Output trajectory and constellation diagrams and error vector magnitude data, with LO phase and amplitude imbalances included. A simulation was also run with baseband signals corresponding to the IS-95 CDMA specification. (Actually, any baseband time-domain data may be used as the I and Q modulation signals.) The resulting spectrum, output power, and ACPR for one baseband signal amplitude scaling factor are shown in Figure 23, and for a scaling factor five times as high are shown in Figure 24. There is a noticeable trade-off between output signal power and ACPR. Figure 23: Output spectrum, main channel power, and ACPRs with a baseband CDMA signal.
Figure 24: Output spectrum, main channel power, and ACPRs with a baseband CDMA signal at five times the amplitude of the signal used in Figure 23. Conclusion The design and characterization of I-Q modulators require many advanced simulation tools as well as advanced and flexible methods of displaying the results. This paper has shown the abundant and often unique simulation and data display capabilities of the Agilent Advanced Design System for efficiently simulating and characterizing I-Q modulators and their subcircuits. Reference 1: Jim Wholey Vector Modulator IC s for Use in Wireless Communications, RF Expo West, 1993, pp. 232-240. Reference 2: Digital Modulation in Communication Systems An Introduction, Hewlett-Packard Application Note 1298, 1997. Reference 3: The ADS IQ modulator example discussed in this article may downloaded from: http://contact.tm.agilent.com/tmo/eesof/applications/latest.html The file name is IQ_Mod_from_MDS_prj.zap.