PON CLK D3 D2 D1 D0. Impulse circuit. Figure 1. Block diagram. Extended Type Number Package Remarks

Similar documents
U4224B. Time Code Receiver. Description. Features. Block Diagram

U4221B. Radio Controlled Clock Receiver. Preliminary Information. Description. Features. Block Diagram

Extended Type Number Package Remarks U2535B-FP. Supply voltage for PIN diode Integrator C 3 C 2. Figure 1. Block diagram

TDA4439. Video IF Amplifier for Multistandard TV and VTR. Technology: Bipolar. Features. Case: DIP18. TELEFUNKEN Semiconductors

TV Vertical Deflection Output Amplifier

TDA 1072 A. AM Receiver Circuit. Preliminary Information. Technology: Bipolar Features. TELEFUNKEN Semiconductors. Controlled RF preamplifier

Parameter Test Conditions Symbol Value Unit Junction ambient on glass fibre printed board (40 x 25 x 1.5) mm 3 plated with 35m Cu

Time-code Receiver T4227

(U813BS-SP, U813BSE-SP)

Silicon NPN Planar RF Transistor

Zero-Voltage Switch with Adjustable Ramp. R 2 (R sync ) 220 k (250 V~) Synchronization. Full-wave logic T2117

BFR 93 / BFR 93 R. Silicon NPN Planar RF Transistor. Applications. Features. Absolute Maximum Ratings. Maximum Thermal Resistance

RF-amplifier up to GHz range specially for wide band antenna amplifier.

Chip temperature monitoring. Oscillator 140 C. Output stage logic. Time window current measurement Q S Q R S 2. Figure 1.

BFR91. Silicon NPN Planar RF Transistor. Vishay Semiconductors

Supply voltage limitation Voltage control monitoring. Sync. Control logic. RC Oscillator Divider 1:2 10. Figure 1. Block diagram with external circuit

L-Band Down-Converter for DAB Receivers. Test interface. RF counter Reference counter 32/35/36/ VREF TANK REF NREF C S

BFR93A/BFR93AR/BFR93AW. Silicon NPN Planar RF Transistor. Vishay Semiconductors. Applications. Features. Absolute Maximum Ratings

Part Ordering code Marking Remarks MMBT2222A MMBT2222A-GS18 or MMBT2222A-GS08 1P Tape and Reel

Part Ordering code Marking Remarks Package BFR91A BFR91AGELB-GS08 BFR91A Packed in Bulk TO-50(3)

BP104. Silicon PIN Photodiode. Vishay Semiconductors

TEKS5400. Silicon Photodetector with Logic Output VISHAY. Vishay Semiconductors

Time-Code Reception. Table of Contents

BPW41N. Silicon PIN Photodiode. Vishay Semiconductors

Photo Modules for PCM Remote Control Systems

Low Cost Current Feedback Phase Control Circuit. 22 k/2w BYT51K. R 1 D1 R 8 max. R k. Voltage. detector. Phase control unit = f (V 3 ) C 3 C 4

U2750B-B. Tuner IC for DAB. Preliminary Information

Silicon NPN Planar RF Transistor

BPV11F. Silicon NPN Phototransistor VISHAY. Vishay Semiconductors

BPW85. Silicon NPN Phototransistor. Description. Features. Applications. Absolute Maximum Ratings

Part Type differentiation Ordering code Remarks 2N3904 2N3904-BULK or 2N3904-TAP Bulk / Ammopack

Parameter Test Conditions Symbol Value Unit Junction ambient l=4mm, T L =constant R thja 110 K/W

Part Ordering code Remarks TSMS3700-GS08 TSMS3700-GS08 MOQ: 7500 pcs TSMS3700-GS18 TSMS3700-GS18 MOQ: 8000 pcs

GaAs Infrared Emitting Diode in Miniature (T ) Package

BPW17N. Silicon NPN Phototransistor. Vishay Semiconductors. Description. Features. Applications Detector in electronic control and drive circuits

TEA1007. Simple Phase Control Circuit. Description. Features. Block Diagram

TLMC310. Low Current SMD LED VISHAY. Vishay Semiconductors

Photo Modules for PCM Remote Control Systems

Part Ordering code Marking Remarks Package BFR90A BFR90AGELB-GS08 BFR90A Packed in Bulk TO-50(3)

Voltage stabilization

TSOP312.. IR Receiver Modules for Remote Control Systems VISHAY. Vishay Semiconductors

Photo Modules for PCM Remote Control Systems

Phase Control Circuit Tacho Applications. Automatic retriggering. Phase control unit = f (V 12 ) Soft start 11(11) 12(12) 8(8) 7(7)

UAA145. Phase Control Circuit for Industrial Applications. Description. Features. Applications. Block Diagram

Reflective Optical Sensor with Transistor Output

Absolute Maximum Ratings T amb = 25 C, unless otherwise specified Parameter Test condition Part Symbol Value Unit

BPW41N. Silicon PIN Photodiode. Vishay Semiconductors

S186P. Silicon PIN Photodiode. Vishay Semiconductors

Silicon NPN Planar RF Transistor

S07B / 07D / 07G / 07J / 07M

BPV10NF. High Speed Silicon PIN Photodiode. Vishay Semiconductors

Reflective Optical Sensor with Transistor Output

High Speed Infrared Emitting Diode, 870 nm, GaAlAs Double Hetero

Diode capacitance V R = 0 V, f = 1 MHz, E = 0 C D 1.2 nf V R = 5 V, f = 1 MHz, E = 0 C D 400 pf Dark Resistance V R = 10 mv R D 38 GΩ Optical


Part Ordering code Type Marking Remarks BAT41 BAT41-TR or BAT41-TAP BAT41 Tape and Reel/Ammopack

CNY17 Series. Optocoupler with Phototransistor Output. Description. Applications. TELEFUNKEN Semiconductors

TEPT5600. Ambient Light Sensor. Vishay Semiconductors

BPW46L. Silicon PIN Photodiode. Vishay Semiconductors

2.9 GHz PLL for SAT TV Tuner with UNi-Bus. 14 bit Shift Reg. 15 bit Latch LOCK. SET 15/14 bit counter. Phase detector

Photo Modules for PCM Remote Control Systems

IR Receiver Modules for Remote Control Systems

Integrated Low Profile Transceiver Module for Telecom Applications IrDA Standard

TSOP591.. IR Receiver Modules for Remote Control Systems. Vishay Semiconductors

Part Ordering code Type Marking Remarks BAT41 BAT41-TR or BAT41-TAP BAT41 Tape and Reel/Ammopack

U2270B. Read / Write Base Station IC. Description. Applications. Features

GaAs/GaAlAs IR Emitting Diode in ø 5 mm (T 1) Package

TCLT10.. Series. Optocoupler, Phototransistor Output, SOP-4L, Long Mini-Flat Package VISHAY. Vishay Semiconductors

Type Ordering Code Remarks

TSOP312.. IR Receiver Modules for Remote Control Systems. Vishay Semiconductors

Part Ordering code Marking Remarks BAV99-V BAV99-V-GS18 or BAV99-V-GS08 JE Tape and Reel

TSOP39256CZ1. IR Receiver Modules for Remote Control Systems. Vishay Semiconductors

TSOP48.. IR Receiver Modules for Remote Control Systems. Vishay Semiconductors

BFQ67 / BFQ67R / BFQ67W

CNY17 Series. Optocoupler with Phototransistor Output. Description. Applications. Order Nos. and Classification table is on sheet 2.

BAS19-V / 20-V / 21-V

BPV23NF(L) Silicon PIN Photodiode. Vishay Semiconductors

CNY70. Reflective Optosensor with Transistor Output. Description. Applications. Features. Pin Connection

IR Receiver Modules for Remote Control Systems

Standard SMD LED PLCC-2

IR Receiver Modules for Remote Control Systems

Transmissive Optical Sensor with Phototransistor Output

Part Ordering code Marking Remarks BAV99-V BAV99-V-GS18 or BAV99-V-GS08 JE Tape and Reel

IR Receiver Modules for Remote Control Systems

TDCG1050M, TDCG1060M, TDCR1050M, TDCR1060M Clock Display

IR Receiver Modules for Remote Control Systems

Part Ordering code Type Marking Remarks BAT85S BAT85S-TR or BAT85S-TAP BAT85S Tape and Reel/Ammopack

Clock Display FEATURES APPLICATIONS. (nm) I F I F

Part Ordering code Type Marking Remarks BAS85 BAS85-GS18 or BAS85-GS08 - Tape and Reel

BAS81 / 82 / 83. Small Signal Schottky Diodes. Vishay Semiconductors. Features Integrated protection ring against static discharge

TDSG / O / Y11.. Standard 7- Segment Display 7 mm VISHAY. Vishay Semiconductors

TDS.31.. Standard 7 Segment Display 10 mm. Vishay Semiconductors. Description. Features. Applications

Low Current 7 mm 7-Segment Display

TFBS6614. Lowest Profile 4 Mbits/s (FIR) Infrared Transceiver Module VISHAY. Vishay Semiconductors

TDSG / O / Y31.. Standard 7- Segment Display 10 mm VISHAY. Vishay Semiconductors

BPW17N. Silicon NPN Phototransistor. Vishay Semiconductors

BPV11. Silicon NPN Phototransistor. Vishay Semiconductors

BPV22NF(L) Silicon PIN Photodiode. Vishay Semiconductors

Linear Optocoupler, PCMCIA Package

SD103AW-V/103BW-V/103CW-V

Transcription:

U3B Time-Code Receiver with A/D Converter Description The U3B is a bipolar integrated straight-through receiver circuit in the frequency range of 0 khz to 0 khz. The device is designed for radio-controlled clock applications. Features Very low power consumption Very high sensitivity High selectivity by using two crystal filters Only a few external components necessary -bit digital output AGC hold mode Power-down mode available Block Diagram PON CLK D3 D D D0 VCC 3 6 7 9 0 Power supply ADC Decoder Impulse circuit 9 FLB FLA DEC IN AGC amplifier Rectifier & integrator 3 SL 5 6 5 7 SB QA QB QA QB REC INT Figure. Block diagram Ordering and Package Information Extended Type Number Package Remarks U3B-MFS SSO0 plastic U3B-MFSG3 SSO0 plastic Taping according to IEC-6-3 T3B-MF No Die on foil T3B-MC No Die on carrier Rev. A7, 06-Mar-0 ()

U3B Pin Description VCC 0 D0 (LSB) Pin Symbol Function VCC Supply voltage IN 9 D IN Amplifier Input 3 Ground 3 D SB Bandwidth control 5 QA Crystal filter SB 7 D3 (MSB) 6 QB Crystal filter 7 REC Rectifier output QA QB 5 6 U3B 6 5 PON QB INT Integrator output 9 DEC Decoder input FLA Lowpass filter FLB Lowpass filter CLK Clock input for ADC REC INT DEC FLA 7 9 3 QA SL CLK FLB 3 SL AGC hold mode QA Crystal filter 5 QB Crystal filter 6 PON Power ON/OFF control 7 D3 Data out MSB D Data out 9 D Data out 0 D0 Data out LSB Figure. Pinning IN A ferrite antenna is connected between IN and VCC. For high sensitivity, the Q factor of the antenna circuit should be as high as possible. Please note that a high Q factor requires temperature compensation of the resonant frequency in most cases. Specifications are valid for Q>30. An optimal signal-to-noise ratio will be achieved by a resonant resistance of 50 to 00 k. VCC SB A resistor R SB is connected between SB and. It controls the bandwidth of the crystal filters. It is recommended: R SB = 0 for DCF 77.5 khz, R SB = k for 60 khz WWVB and R SB = open for JGAS 0 khz. IN SB Figure 3. Figure. () Rev. A7, 06-Mar-0

U3B QA, QB In order to achieve a high selectivity, a crystal is connected between the Pins QA and QB. It is used with the serial resonant frequency of the time-code transmitter (e.g., 60 khz WWVB, 77.5 khz DCF or 0 khz JGAS). The equivalent parallel capacitor of the filter crystal is internally compensated. The compensated value is about 0.7 pf. If full sensitivity and selectivity are not needed, the crystal filter can be substituted by a capacitor of pf. SL AGC hold mode: SL high (V SL = V CC ) sets normal function, SL low (V SL = 0) disconnects the rectifier and holds the voltage V INT at the integrator output and also the AGC amplifier gain. VCC SL REC QA Figure 5. QB Rectifier output and integrator input: The capacitor C between REC and INT is the lowpass filter of the rectifier and at the same time a damping element of the gain control. INT Figure. Integrator output: The voltage V INT is the control voltage for the AGC. The capacitor C between INT and DEC defines the time constant of the integrator. The current through the capacitor is the input signal of the decoder. Figure 6. REC Figure 9. INT DEC Decoder input: Senses the current through the integration capacitor C. The dynamic input resistance has a value of about 0 k and is low compared to the impedance of C. FLA, FLB Lowpass filter: A capacitor C 3 connected between FLA and FLB suppresses higher frequencies at the trigger circuit of the decoder. DEC FLB FLB 9 377 Figure 7. Figure. Rev. A7, 06-Mar-0 3 ()

U3B QA, QB According to QA/QB, a crystal is connected between the Pins QA and QB. It is used with the serial resonant frequency of the time-code transmitter (e.g., 60 khz WWVB, 77.5 khz DCF or 0 khz JGAS). The equivalent parallel capacitor of the filter crystal is internally compensated. The value of the compensation is about 0.7 pf. PON QA Figure. QB If PON is connected to, the receiver will be activated. The set-up time is typically 0.5 s after applying at this pin. If PON is connected to VCC, the receiver will switch to power-down mode. A sequence of the digitalized time-code signal can be analyzed by a special noise-suppressing algorithm in order to increase the sensitivity and the signal-to-noise ratio (more than db compared to conventional decoding). Details about the time-code format are described separately. Decimal Gray 0 0000 000 00 3 00 0 5 0 6 0 7 00 0 9 3 0 5 00 VCC VCC PON D0... D3 PON Figure. Figure 3. D0, D, D, D3 The outputs of the ADC consist of PNP-NPN push-pull stages and can be directly connected to a microcomputer. In order to avoid any interference of the output into the antenna circuit, we recommend terminating each digital output with a capacitor of nf. The digitalized signal of the ADC is Gray coded (see table). It should be taken into account that in power-down mode (PON = high), D0, D, D and D3 will be high. CLK The input of the ADC is switched to the AGC voltage by the rising slope of the clock. When conversion time has passed (about. ms at 5 C), the digitalized fieldstrength signal is stored in the output registers D0 to D3 as long as the clock is high and can be read by a microcomputer. The falling slope of the clock switches the input of the ADC to the time-code signal. In the meantime, the digitalized time-code signal is stored in the output registers D0 to D3 as long as the clock is low (see figure ). () Rev. A7, 06-Mar-0

V clk mv 0 50 0 7 t/ms Now, the time-code signal can be read Falling edge initiates time-code conversion Now, the AGC value can be read Rising edge initiates AGC signal conversion Figure. U3B Thus, the first step in designing the antenna circuit is to measure the bandwidth. Figure 7 shows an example for the test circuit. The RF signal is coupled into the bar antenna by inductive means, e.g., a wire loop. It can be measured by a simple oscilloscope using the : probe. The input capacitance of the probe, typically about pf, should be taken into consideration. By varying the frequency of the signal generator, the resonant frequency can be determined. RF signal generator 77.5 khz Probe : M Scope In order to minimize interferences, we recommend a voltage swing of about 0 mv. A full supply-voltage swing is possible but reduces the sensitivity. VCC CLK Figure 5. Please note: The signals and voltages at the Pins REC, INT, FLA, FLB, QA, QB, QA and QB cannot be measured by standard measurement equipment due to very high internal impedances. For the same reason, the PCB should be protected against surface humidity. Design Hints for the Ferrite Antenna The bar antenna is a very critical device of the complete clock receiver. Observing some basic RF design rules helps to avoid possible problems. The IC requires a resonant resistance of 50 k to 00 k. This can be achieved by a variation of the L/C-relation in the antenna circuit. It is not easy to measure such high resistances in the RF region. A more convenient way is to distinguish between the different bandwidths of the antenna circuit and to calculate the resonant resistance afterwards. wire loop C res Figure 6. At the point where the voltage of the RF signal at the probe drops by 3 db, the two frequencies can then be measured. The difference between these two frequencies is called the bandwidth BW A of the antenna circuit. As the value of the capacitor C res in the antenna circuit is known, it is easy to compute the resonant resistance according to the following formula: R res BW A C res where R res is the resonant resistance, BW A is the measured bandwidth (in Hz) C res is the value of the capacitor in the antenna circuit (in Farad). If high inductance values and low capacitor values are used, the additional parasitic capacitances of the coil ( 0 pf) must be considered. The Q value of the capacitor should be no problem if a high Q type is used. The Q value of the coil differs more or less from the DC resistance of the wire. Skin effects can be observed but do not dominate. Therefore, it should not be a problem to achieve the recommended values of the resonant resistance. The use of thicker wire increases the Q value and accordingly reduces bandwidth. This is advantageous in order to improve reception in noisy areas. On the other hand, temperature compensation of the resonant frequency might become a problem if the bandwidth of the antenna circuit is low compared to the temperature variation of the resonant frequency. Of course, the Q value can also be reduced by a parallel resistor. Rev. A7, 06-Mar-0 5 ()

U3B Temperature compensation of the resonant frequency is a must if the clock is used at different temperatures. Please ask your supplier of bar antenna material and of capacitors for specified values of the temperature coefficient. Furthermore, some critical parasitics have to be considered. These are shortened loops (e.g., in the ground line of the PCB board) close to the antenna and undesired loops in the antenna circuit. Shortened loops decrease the Q value of the circuit. They have the same effect like conducting plates close to the antenna. To avoid undesired loops in the antenna circuit, it is recommended to mount the capacitor C res as close as possible to the antenna coil or to use a twisted wire for the antenna-coil connection. This twisted line is also necessary to reduce feedback of noise from the microprocessor to the IC input. Long connection lines must be shielded. A final adjustment of the time-code receiver can be carried out by pushing the coil along the bar antenna. The maximum of the integrator output voltage V INT at Pin INT indicates the resonant point. But attention: The load current should not exceed na, that means an input resistance G of the measuring device is required. Therefore, a special DVM or an isolation amplifier is necessary. Absolute Maximum Ratings Parameters Symbol Value Unit Supply voltage V CC 5.5 V Ambient temperature range T amb 0 to +5 C Storage temperature range R stg 0 to +5 C Junction temperature T j 5 C Electrostatic handling ± V ESD 000 V (MIL Standard 3 D), except Pins, 5, 6, and 5 Thermal Resistance Parameters Symbol Maximum Unit Thermal resistance R thja 70 K/W Electrical Characteristics V CC = 3 V, reference point Pin 3, input signal frequency 0 khz, T amb = 5 C, unless otherwise specified Parameters Test Conditions / Pin Symbol Min Typ Max Unit Supply voltage range Pin V CC. 5.5 V Supply current Pin I CC Without reception signal with reception signal = 00 V OFF mode 5 30 5 0. A A A Set-up time after V CC ON V CC =.5 V t s AGC amplifier input; IN Pin Reception frequency range f in 0 0 khz Minimum input voltage R res = 0 k, Q res > 30 V in.5 V Maximum input voltage V in 0 0 mv Input capacitance to C in.5 pf 6 () Rev. A7, 06-Mar-0

U3B V -0. 3 Parameters Test Conditions / Pin Symbol Min Typ Max Unit ADC; D0, D, D, D3 Pins 7,, 9 and 0 Output voltage HIGH R LOAD = 70 k to V OH V LOW R LOAD = 650 k to VCC V OL CC 0. V Output current HIGH V TCO = V CC / I SOURCE LOW V TCO = V CC / I SINK Input current into DEC Falling slope of CLK I decs 7 na (first bit) Input current into DEC Falling slope of CLK I dece 35 na (last bit) Input current into DEC Falling slope of CLK I decst.75 3.5 7 na (step range) Input voltage at IN (first bit) RF generator at IN, without modulation rising slope of CLK V min db V Input voltage at IN (last bit) RF generator at IN, without modulation rising slope of CLK V max 75 db V Input voltage at IN (step range) RF generator at IN, without modulation rising slope of CLK V step 5.5 db V Clock input; CLK Pin Input voltage swing V swing 50 0 V CC mv Clock frequency f clk 0 5 Hz Dynamical input resistance R dyn. 0 k Power-ON/OFF control; PON Pin 6 Input voltage HIGH Required I IN 0.5 A V CC -0. V LOW V CC -. V Input current V CC = 3 V V CC =.5 V V CC = 5 V I IN..7 0.7 3 A A A Set-up time after PON t 0.5 s AGC hold mode; SL Pin 3 Input voltage HIGH Required I IN 0.5 A V CC -0. V LOW V CC -. V Input current Rejection of interference signals V in = V CC V in =.5 f d f ud = 65 Hz V d = 3 V, f d = 77.5 khz using crystal filters using crystal filter a f 3 a f 0. A A db db Rev. A7, 06-Mar-0 7 ()

U3B Test Circuit (for Fundamental Function) Vd.657V 300k 300k 300k 300k Ipon Test point: DVM with high and low input line for measuring a voltage Vxx or a current Ixx by conversion into a voltage Sd0 Sd Sd Sd3 Vd0 Vd Vd Vd3 Spon M p M Isl D D3 PON QB QA Ssl Ivcc D D0 0k VCC ANALOG DIGITAL CONVERTER STABILISATION U3B TIME CONTROL DECODING SL CLK FLB M Iclk Vclk Iin FLA Sdec M M IN AGC AMPLIFIER RECTIFIER DEC 0M Idec SB QA QB REC INT Vcc 3V ~ Vin Ssb p Vrec 60p 3.3n Srec Sint 0k Vdec Vsb M M M Vint Isb Irec Vrec Iint Vint Figure 7. Test circuit () Rev. A7, 06-Mar-0

U3B ÎÎÎ Field strength Value ADC 6 Time-code signal 0 0 0 0 0 60 0 0 0 0 60 Time (Gating0/s) Figure. Example of a normal DCF signal ÎÎ Field strength Value ADC 6 ÎÎ Time-code signal 0 0 0 0 0 60 0 0 0 0 60 Time (Gating0/s) Figure 9. Example of a disturbed DCF signal Rev. A7, 06-Mar-0 9 ()

U3B Application Circuit for DCF 77.5 khz +V CC Control lines Ferrite Antenna f res = 77.5 khz 77.5 khz ) 3 5 6 U3B 0 9 7 6 5 nf nf nf nf 77.5 khz D0 D D D3 PON 3) Microcomputer C 6. nf C 33 nf C 3 nf 7 9 3 SL ) CLK ) Display Keyboard ) If SL is not used, SL is connected to VCC ) 77.5-kHz crystal can be replaced by pf 3) If IC is activated, PON is connected to ) Voltage swing 0 mv pp at Pin Figure 0. Application Circuit for WWVB 60 khz +V CC Control lines Ferrite Antenna f res = 60 khz RSB 60 khz ) k 3 5 6 U3B 0 9 7 6 5 nf nf nf nf 60 khz D0 D D D3 PON 3) Microcomputer C 5 nf C 7 nf C 3 nf 7 9 3 SL ) CLK ) Display Keyboard ) If SL is not used, SL is connected to VCC ) 60-kHz crystal can be replaced by pf 3) If IC is activated, PON is connected to ) Voltage swing 0 mv pp at Pin Figure. () Rev. A7, 06-Mar-0

U3B Application Circuit for JGAS 0 khz +V CC Control lines Ferrite Antenna f res = 0 khz 0 khz ) 3 5 6 U3B 0 9 7 6 5 nf nf nf nf 0 khz D0 D D D3 PON 3) Microcomputer C 60 pf 0 nf C M R 7 9 3 SL ) CLK ) Display Keyboard C 3 nf ) If SL is not used, SL is connected to VCC ) 0-kHz crystal can be replaced by pf 3) If IC is activated, PON is connected to ) Voltage swing 0 mv pp at Pin Figure. Rev. A7, 06-Mar-0 ()

U3B PAD Coordinates The T3B is also available as die for chip-on-board mounting. DIE size:.6 x.09 mm PAD size: 0 x 0 m (contact window x m) Thickness: 300 m 0 m SYMBOL X-Axis/ m Y-Axis/ m IN 3 IN 3 35 SB 69 QA 0 QB 90 REC 5 INT 766 DEC 0 6 FLA 0 676 FLB 0 7 SYMBOL X-Axis/ m Y-Axis/ m CLK 0 00 SL 0 63 QA 000 76 QB 63 76 PON 3 76 TCO 0 76 D3 696 76 D 3 76 D 6 D0 5 VCC 3 The PAD coordinates are referred to the left bottom point of the contact window. PAD Layout D D D3 TCO PON QB QA SL D0 CLK VCC T3B FLB IN FLA Y Axis IN DEC SB QA QB REC INT Reference point (%) X Axis Figure 3. 9 9 () Rev. A7, 06-Mar-0

Information on the German Transmitter Station: DCF 77, Frequency 77.5 khz, Transmitting power 50 kw U3B Location: Mainflingen/Germany, Geographical coordinates: 50 0. N, 09 00 E Time of transmission: permanent Time frame minute ( index count second ) Time frame 0 5 5 0 5 30 35 0 5 50 55 0 5 R A Z Z A S 0 0 P 0 P 0 0 0 0 P3 coding when required minutes hours calendar day month day of the week year Example:9.35 h s 0 0 P 0 P seconds 0 3 5 6 7 9 30 3 3 33 3 35 minutes hours Start Bit Parity Bit P Parity Bit P Figure. Modulation The carrier amplitude is reduced to 5% at the beginning of each second for a period of 0 ms (binary zero) or 00 ms (binary one), except the 59th second. Time-Code Format (based on Information of Deutsche Bundespost) The time-code format consists of -minute time frames. There is no modulation at the beginning of the 59th second to indicate the switch over to the next -minute time frame. A time frame contains BCD-coded information of minutes, hours, calendar day, day of the week, month and year between the 0th second and 5th second of the time frame, including the start bit S (00 ms) and parity bits P, P and P3. Furthermore, there are 5 additional bits R (transmission by reserve antenna), A (announcement of change-over to summer time), Z (during summer time 00 ms, otherwise 0 ms), Z (during standard time 00 ms, otherwise 0 ms) and A (announcement of leap second) transmitted between the 5th second and 9th second of the time frame. Rev. A7, 06-Mar-0 3 ()

U3B Information on the British Transmitter Station: MSF Frequency 60 khz Transmitting power 50 kw Location: Teddington, Middlesex Geographical coordinates: 5 N, 0 W Time of transmission: permanent, except the first Tuesday of each month from.00 h to.00 h. Time frame minute Time frame ( index count second) 0 5 5 0 5 30 35 0 5 50 55 0 5 0 0 0 0 0 0 0 0 Switch over to the next time frame 0 year month day of month day of week hour minute minute identifier Parity BST check bits hour + minute day of week day + month year BST 7 GMT change impending 500 ms 500 ms Example: March 993 seconds 7 0 0 0 9 0 3 5 6 7 9 30 year month Figure 5. Modulation The carrier amplitude is switched off at the beginning of each second for a period of 0 ms (binary zero) or 00 ms (binary one). Time-Code Format The time-code format consists of -minute time frames. A time frame contains BCD coded information of year, month, calendar day, day of the week, hours and minutes. At the switch-over to the next time frame, the carrier amplitude is switched off for a period of 500 ms. The prescence of the fast code during the first 500 ms at the beginning of the minute in not guaranteed. The transmission rate is 0 bits/s and the code contains information of hour, minute, day and month. () Rev. A7, 06-Mar-0

U3B Information on the US Transmitter Station: WWVB Frequency 60 khz Transmitting power 0 kw Location: Fort Collins Geographical coordinates: 0 0 N, 5 03 W Time of transmission: permanent Time frame minute Time frame ( index count second) 0 5 5 0 5 30 35 0 5 50 55 0 5 P0 FRM 0 0 P 0 P 00 0 0 0 0 P3 ADD SUB ADD P 00 00 00 0 0 0 0 P5 P0 minutes hours days UTI UTI sign correction year daylight savings time bits leap second warning bit leap year indicator bit 0 = non leap year = leap year Example: UTC. h Time frame P0 0 0 P 0 P seconds 0 3 5 6 7 9 3 5 6 7 9 0 minutes Frame-reference marker hours Figure 6. Modulation The carrier amplitude is reduced by db at the beginning of each second and is restored within 500 ms (binary one) or within 00 ms (binary zero). Time-Code Format The time-code format consists of -minute time frames. A time frame contains BCD-coded information of minutes, hours, days and year. In addition, there are 6 position-identifier markers (P0 thru P5) and framereference marker with reduced carrier amplitude of 00 ms duration. Rev. A7, 06-Mar-0 5 ()

U3B Information on the Japanese Transmitter Station: JGAS Frequency 0 khz Transmitting power kw Location: Sanwa, Ibaraki Geographical coordinates: 36 N, 39 5 E Time of transmission: permanent Time frame minute (index count second) Time frame 0 5 5 0 5 30 35 0 5 50 55 0 5 PO FRM 0 0 P 0 P 00 0 0 0 0 P3 ADD SUB ADD P P5 P0 minutes hours days code dut Example:. h Time frame P0 0 0 P 0 P seconds 59 0 3 5 6 7 9 3 5 6 7 9 0 minutes hours Frame-reference marker (FRM) Position-identifier marker P0 Position identifier marker P 0. s 0. s 0.5 s 0 P 0.5 second: Binary one 0. second: Binary zero 0. second: Identifier markers P0...P5 Figure 7. Modulation The carrier amplitude is 0% at the beginning of each second and is switched off after 500 ms (binary one) or after 00 ms (binary zero). Time-Code Format The time-code format consists of -minute time frames. A time frame contains BCD-coded information of minutes, hours and days. In addition, there are 6 positionidentifier markers (P0 thru P5) and frame-reference markers (FRM) with reduced carrier amplitude of 00 ms duration. 6 () Rev. A7, 06-Mar-0

U3B Package Information Package SSO0 Dimensions in mm 6.75 6.50 5.7 5.3.5.3.30 0.5 0.65 5.5 0.5 0.05 6.6 6.3 0.5 0 technical drawings according to DIN specifications 3007 Rev. A7, 06-Mar-0 7 ()

U3B Ozone Depleting Substances Policy Statement It is the policy of Atmel Germany GmbH to. Meet all present and future national and international statutory requirements.. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (97) and its London Amendments (990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Atmel Germany GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents.. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively. Class I and II ozone depleting substances in the Clean Air Act Amendments of 990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision /50/EEC and 9/690/EEC Annex A, B and C (transitional substances) respectively. Atmel Germany GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: http://www.atmel wm.com Atmel Germany GmbH, P.O.B. 3535, D-705 Heilbronn, Germany Telephone: 9 (0)73 67 59, Fax number: 9 (0)73 67 3 () Rev. A7, 06-Mar-0