MO IC Amplifiers MOFETs are inferior to BJTs for analog design in terms of quality per silicon area But MO is the technology of choice for digital applications Therefore, most analog portions of mixed-signal designs are MO Most MO amplifiers will be IC amplifiers with active loads Resistors and decoupling capacitors are too expensive on ICs Token Ring LAN JC 12/89 Lecture 24-1
NMO Amplifier --- Active Load Natural extension of amplifier with resistor pull-up ize M2 and bias M1 so that M1 is in saturation This is a digital NMO logic gate when large input signals are applied V M2 i 2 M1 i 1 v i Lecture 24-2
Load Line View Load line is nonlinear M2-NMO V 15V L=10U W=2U 20 0 10 20 ma I2 10 I1 VC27 3V - M1-NMO L=2U W=10U VO - VO 0 I2 I1 V G =3v Lecture 24-3
NMO Amplifier Example For a larger dc input bias voltage M1 is no longer in saturation M2-NMO V 15V L=10U W=2U 20 0 10 20 ma V G =5v I2 10 I1 VC27 5V - M1-NMO L=2U W=10U VO - VO 0 I2 I1 V G =3v Lecture 24-4
mall ignal Model M2 behaves like a resistor in the small signal model Why? V M2 i 2 M1 i 1 v i g m1 v i r o1 g m2 v gs2 r o2 v i Lecture 24-5
mall ignal Model v i g m1 v i r o1 g m2 r o2 Lecture 24-6
NMO Amplifier Example We would tend to lower the resistance of the pull-up transistor (increase K2), or decrease the current levels of the amplifier transistor (decrease K1) to keep M1 in saturation But these changes tend to lower the gain 20 0 10 20 ma 10 K2 K1 0 K2 I2 I1 K1 Lecture 24-7
NMO Amplifier Example esign objective is to make K1 as large as possible, and K2 as small as possible, to get a reasonable gain V 15V M26-NMO L=10U W=2U frequency e2 e3 e4 e5 e6 I2 I1 13 4.47 v/v VIN IN - M1-NMO L=2U W=10U VO - B(VO) Why the deviation from ideal gain? Lecture 24-8
Body Effect For discrete FETs there is no body effect since the source is tied to the body For ICs, all of the NFET body nodes are tied to the lowest potential in the ckt The source of our load transistor is not at the same potential as the substrate ource voltage partially modulates the channel --- back gate effect V >0 V G > V t n Q B0 Q I V > 0 n V B For large signal behavior this is captured by the change in V t based on the parameter, gamma V t = V t0 γ( 2φ f V B 2φ f ) Lecture 24-9
V Body Effect The impact on the small signal model is a function of same parameters The change in (which is the source voltage) modulates the back gate M2 M1 i 1 M2 v gs2 _ G g m2 v gs2 r o2 g mb v bs2 v ds2 v bs2 B v i Lecture 24-10
Common ource CMO Amplifier --- Active Load Body effect is not as significant a problem for CMO Current sources are used as pull-ups instead of resistors or load-transistors Having complementary types of transistors simplifies the implementation Is the body effect a factor for this amplifier? I REF v i I REF v i Lecture 24-11
Common ource mall ignal Model Load line is now nearly a constant current --- huge gain What does the small signal model look like? I REF v i Lecture 24-12
Common ource mall ignal Model I REF v i Lecture 24-13
CMO High Gain Region Input-output relation is very similar to a CMO inverter V t = 1v K=100µA/V 2 lamda=0.01 M3-PMO1 L=10E-6 W=10E-6 IREF 400UA VI 3V V 10V - M2-PMO1 L=10E-6 W=10E-6 I M1-NMO L=10U W=10U VO - VO 11 10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 VI Lecture 24-14
CMO High Gain Region What is the allowable range for and v i? 11 1 2 3 4 10 VO 9 8 7 6 5 4 3 2 1 0 VI Lecture 24-15
ac Response Using an ac input with a 3 volt offset: V t = 1v K=100µA/V 2 lamda=0.01 V 10V M3-PMO1 L=10E-6 W=10E-6 M2-PMO1 L=10E-6 W=10E-6 37 frequency e2 e3 e4 e5 e6 I 36 IREF 400UA VIN IN - 414.800 µa M1-NMO L=10U W=10U VO 3.568 V - 35 34 33 32 31 30 B(VO) Lecture 24-16
Common rain (ource Follower) Amplifier ource Followers are used for output stages Gain less than unity, but provides low output resistance to drive loads 100µA v i vo Lecture 24-17
Common rain (ource Follower) Amplifier 100µA v i vo Lecture 24-18
Common rain (ource Follower) Amplifier Lecture 24-19
ource Follower For an emitter follower, the gain is the voltage division of input resistance and emitter resistance But the source follower is somewhat different from an impedance reflection standpoint V v s I R L -V mall signal impedance looking into the gate appears as an infinite resistor, while that from the perspective of the source is finite Lecture 24-20
Assuming that R L is infinite? mall ignal Model Lecture 24-21