EMC cases study Antonio Ciccomancini Scogna, CST of America antonio.ciccomancini@cst.com
Introduction Legal Compliance with EMC Standards without compliance products can not be released to the market Failure in First EMC Test EMC not involved in design process EMC often troubleshoot EMC Problems Detected Late in the Design Stage high effort and costs to correct delayed time to market
Introduction Design Stage simulation can accompany the design process and be employed at an early design stage simulation can give answers to fundamental what if questions simulation can be performed without a prototype Trouble shoot simulation can help to understand behavior of the device not a competitor to measurements, both should be used complementary
Outline Printed Circuit Boards Rule Based Checking CST Boardcheck Components and Enclosures Resonances Frequency Domain (FEM) Components Time Domain (FIT) Enclosures Time Domain (TLM) System Level Hybrid Approach (Near Field Source) Cable Susceptibility Cable Entry Susceptibility Cable Studio
Outline Printed Circuit Boards Rule Based Checking CST Boardcheck Components and Enclosures Resonances Frequency Domain (FEM) Components Time Domain (FIT) Enclosures Time Domain (TLM) System Level Hybrid Approach (Near Field Source) Cable Susceptibility Cable Entry Susceptibility Cable Studio
CST BOARDCHECK 1. Deal with a new PCB layout 5. Obtain EMC rules for layout engineers 2. Analyze PCB in EMC rule checker 4. Perform simulations and analyze results 3. Decide which structures need simulation
EMC Rule Checking Workflow Import PCB Design Altium (ODB++), Cadence, Mentor Graphics, Zuken Select Nets Tag critical nets, differential pairs, or power and ground nets Select Components Tag ICs, clock drivers, stitching or decoupling capacitors, or connectors Select EMC/SI Rules Categories: Signal reference, Wiring/Crosstalk, Decoupling, Placement Start EMC Rule Check Push button solution for the detection of EMC violations
EMC Rule Check Violations Critical Differential Net Length Matching and Spacing CST BOARDCHECK helps identify problematic areas on the PCB These nets can then be exported to CST Microwave STUDIO for an accurate 3D full-wave EMC analysis
EMC Rule Check Violations Critical Net Near Edge of Reference Plane CST BOARDCHECK helps identify problematic areas on the PCB These nets can then be exported to CST Microwave STUDIO for an accurate 3D full-wave EMC analysis
CST Boardcheck Rule Checking geometry based Advantages much faster than a simulation checks the complete board easy export to 3D simulation Efficient for printed circuit board with digital signals
Outline Printed Circuit Boards Rule Based Checking CST Boardcheck Components and Enclosures Resonances Frequency Domain (FEM) Components Time Domain (FIT) Enclosures Time Domain (TLM) System Level Hybrid Approach (Near Field Source) Cable Susceptibility Cable Entry Susceptibility Cable Studio
Enclosure Analysis Wireless router Metallic enclosure -> resonances can occur. Frequency of interest: 0 2 GHz.
Resonance Analysis empty enclosure Resonance analysis: Simplified version of the enclosure is analyzed. Frequency domain solver based on FEM is ideally suited for this analysis.
Resonance Analysis Enclosure can support several resonances at the frequency range of interest.
Frequency Domain Solver Finite Element Method on Tetrahedral Grids higher order elements curved tetrahedrons Advantages medium geometrical complexity/electrical size narrowband structures closed resonant structures many ports Efficient for cavities, filters, package bonds, EMC of power electronics
Board-Level Analysis Power integrity Impedance Board Noise calculation resonances propagation Investigation of nets located near to heat sink EMI in the PCB Crosstalk from PCB to package in time and frequencydomain Surface current distribution at critical frequencies
Self resonance PWR/GND cavity 25x25cmx0.1mm Board size
Self impedance z11 dielectric thickness
Real PCB
PI- analysis Dec-12
Impedance profile Dec-12
Impedance Profile 0.87 GHz 1.96 GHz Dec-12
Adding an extra capacitor Dec-12
CST BOARDCHECK Exposed Critical Trace violation detected Dec-12
Signal Integrity Analysis Port 1 is a net excited on the PCB as a possible aggressor Ports 5,6 and 7 are located on nets under the heat sink area 105M mesh cells Simulation performed on 4xGPUs 18h run time Dec-12
Surface current 2GHz
System-Level Analysis Heat sink resonance Vent leakage Seam leakage Coupling to radio Radio shielding and referencing Near field source Radio cables Chassis model Shielding effectiveness External antenna
Heat Sink Analysis Heat sink imported and positioned on ground plane. Transient FIT solver is ideally suited for broadband radiation analysis. CM voltage source 1V
Transient Solver (FIT) Transient Method on Hexahedral Grids perfect boundary approximation Advantages high geometrical complexity broadband results memory efficient true transient co-simulation Efficient for high speed pcbs, antennas, connectors, components in general
Heat sink resonances at probes Resonance frequency above fundamental frequency of enclosure Probes located above and at the side of the heat sink
Field plots at resonances Magnetic Field 900 MHz Field Plot 1800 MHz Field Plot
Shielding Analysis Chassis CAD model imported Generic noise source for shielding effectiveness Transient TLM solver is ideally suited for shielding analysis. Noise source
Transient Solver (TLM) Transient Method on Hexahedral Grids octree mesh Advantages compact models broadband results memory efficient Efficient for enclosures, chassis
Model Simplification Import chassis CAD model Extract sections of vents and seams Replace details with equivalent compact models Compare results Simplified model enables rapid analysis of various design options Compact seam Compact vent
Honeycomb Vent Model 1.74mm hex side length 1mm depth Detailed model Equivalent vent model Transmission through vent Good agreement between detailed and equivalent model
Spring Contact Seam Model Spring contacts on 1.15 inch pitch 0.34 inch overlap Detailed seam model Equivalent seam model Transmission response increases with frequency Good agreement between detailed and equivalent model
Enclosure Shielding Power connector aperture Radiation plots @ 1GHz
Hybridization - Near Field Source A special monitor records the tangential electric and magnetic field in a box around the heat sink. According to Huygens principle this fields can be used as a source in the system level model.
Hybrid Study of the System Number of fins in heat sink was parameterized. Additional components and probes added to the system level model.
Workflow for Hybrid Simulations Sweep number of fins Calculate heat sink models and create near field source Import field source and run chassis simulation Extract probe results
Outline Printed Circuit Boards Rule Based Checking CST Boardcheck Components and Enclosures Resonances Frequency Domain (FEM) Components Time Domain (FIT) Enclosures Time Domain (TLM) System Level Hybrid Approach (Near Field Source) Cable Susceptibility Cable Entry Susceptibility Cable Studio
Cable Entry Susceptibility Probe for recording internal fields Cable entering the chassis Plane wave excitation
Cable Entry Susceptibility USB cable: twisted pair and two single wires external cable shielded Internal cable unshielded
Cable Studio Specialized Method for Cables cross section meshing Advantages shielded cables transfer impedance straight wires and twisted pairs cable bundling coupling to 3D time domain solvers bi-directional coupling Efficient for all types of cables
Cable Definition
Cable Schematic external to internal connection internal termination external termination screen to chassis connection
Cable Entry Susceptibility - Results Probe results Electric Field @ 1000 MHz Screen connected Screen disconnected
Summary Printed Circuit Boards Rule Based Checking CST Boardcheck Components and Enclosures Resonances Frequency Domain (FEM) Components Time Domain (FIT) Enclosures Time Domain (TLM) System Level Hybrid Approach (Near Field Source) Cable Susceptibility Cable Entry Susceptibility Cable Studio