22nm node imaging and beyond: a comparison of EUV and ArFi double patterning ASML: Eelco van Setten, Orion Mouraille, Friso Wittebrood, Mircea Dusa, Koen van Ingen-Schenau, Jo Finders, Kees Feenstra IMEC: Joost Bekaert, Bart Laenens, Vicky Philipsen, Monique Ercken, Eric Hendrickx, Geert Vandenberghe
Presentation outline Introduction SRAM patterning Scaling Summary Slide 2
Litho solutions at the 22nm node 22nm node options: Scale down 32nm node process using ArF immersion Switch to new technology: EUV Technology Enhancement products Infra-structure (process, reticles) Imaging ArF immersion Established, in HVM Extensive portfolio (eg. Flexray, DoseMapper) Well-developed Very low k1, double patterning required Slide 3 EUV 1st pre-production system shipped Being developed Maturing High k1, single exposure 2010 International Symposium on Lithography Extensions
EUV is compared to ArF immersion for 22nm node SRAM back-end layers 1:1 comparison for 22nm node FinFET type SRAM cell => identical clips on ArFi double patterning mask and reflective EUV mask Slide 4
EUV is compared to ArF immersion for 22nm node SRAM back-end layers 1:1 comparison for 22nm node FinFET type SRAM cell => identical clips on ArFi double patterning mask and reflective EUV mask EUV: Alpha Demo Tool at IMEC => NA = 0.25, σ = 0.50 ArFi: XT:1950Hi with Flexray => NA = 1.35, free-form source, XY-polarization Compare imaging performance, identify critical areas for HVM Slide 5
SRAM roadmap shows ~50% bit-cell size reduction per node Nodes evaluated: CDU: 22nm node ArFi and EUV Resolution: 16nm node EUV Node [nm] 65 45 Half Pitch [nm] 110 80 Cell size [µm2] 0.570 0.346 Cell size shrink 40% 32 56 0.171 51% 22 40 0.078 54% 16 28 0.038 51% 22nm, 0.078 um 2 Intel Corporation IDF 2009 16nm, 0.038 um 2 NOTE, 22 and 16nm data is scaled 32nm picture to illustrate cell-size reduction Slide 6
Critical layers of 22 nm node FinFET SRAM design Critical layers of FinFET SRAM: Active layer patterned as fins in Si Poly or metal gate layer Contact hole layer Metal-1 layer Bit-cell size = 2 x 0.096 x 5 x 0.078 = 0.075µm 2 Active layer Poly/metal gate wrapped around fin 78nm Active fin Poly / metal gate layer 96nm Slide 7
Critical layers of 22 nm node FinFET SRAM design Critical layers of FinFET SRAM: Active layer patterned as fins in Si Poly or metal gate layer Contact hole layer Metal-1 layer Bit-cell size = 2 x 0.096 x 5 x 0.078 = 0.075µm 2 Active layer 78nm T1 T6 T4 T3 T5 T2 6-Transistor 1-bit cell: High speed, low power consumption at expense of silicon area (~150F 2 ) => Bit-density is ~25 x smaller than DRAM (6F 2 ) Poly / metal gate layer 96nm Transistor matching = CD control critical for cell operation Slide 8
FinFET SRAM contact and metal-1 layers have complex 2D lay-out at gate/active pitch 22nm node Contact hole and Metal-1 layer patterning requires: Design split to relax minimum pitch + double patterning (eg. Litho-Etch-Litho-Etch) Single exposure EUV... Contact layer Metal layer 78nm 96nm 96nm Slide 9
Presentation outline Introduction SRAM patterning Scaling Summary Slide 10
ArFi masks: Design split and Source Mask Optimization Complex OPC, simultaneously optimizing the mask and illumination pupil to benefit fully from the Flexray illuminator 1. Split design in 2 identical layers for double patterning Contact layer Metal-1 layer Slide 11
ArFi masks: Design split and Source Mask Optimization Complex OPC, simultaneously optimizing the mask and illumination pupil to benefit fully from the Flexray illuminator 1. Split design in 2 identical layers for double patterning 2. Apply Source Mask Optimization (SMO) on splitted design clips M1 clip Simultaneous cooptimization of mask and Source OPCed clip source for given input design. + CH clip SMO Source OPCed clip Contact layer ASML-BRION Tachyon SMO + Metal-1 layer Slide 12
EUV specific mask OPC: Shadowing and flare correction 6 o angle of incidence: CD error on wafer level due to shadow from mask features => HV offset that changes across slit Shadowing error Vertical Horizontal Slide 13
EUV specific mask OPC: Shadowing and flare correction 6 o angle of incidence: CD error on wafer level due to shadow from mask features => HV offset that changes across slit Higher flare than ArF i system: Feature correction depending on feature density Transmission map Flare map Slide 14
EUV specific mask OPC: Shadowing and flare correction 6 o angle of incidence: CD error on wafer level due to shadow from mask features => HV offset that changes across slit Higher flare than ArF i system: Feature correction depending on feature density Here: Constant HV bias for shadowing, no flare correction. Regular OPC for CH layer OPC ASML-BRION Tachyon OPC Slide 15
EUV exposures on bare Si, ArFi exposure on hard mask for etch Double Patterning ArFi EUV 1 st Litho-Etch 2 nd Litho-Etch Process steps Metrology Strip/clean Etch Metrology ArFi Develop Expose Top-coat ArFi Resist BARC Hard mask Oxide Substrate Metrology Strip/clean Etch Metrology ArFi Develop Expose Top-coat ArFi Resist BARC Hard mask Oxide Patterned substr. This presentation focuses on 1 st litho Metrology Strip/clean Etch Metrology EUV Develop Expose EUV Resist EUV Under layer Hard mask Oxide Substrate Not part of this presentation Slide 16
Process window analysis illustrates difference between high k1 and low k1 imaging EUV ArFi E = 13 mj/cm2 E = 22 mj/cm2 E = 18.5 mj/cm2 E = 25 mj/cm2 Metal1-layer Contact-layer Slide 17
Process window analysis illustrates difference between high k1 and low k1 imaging 60 Averaged Bossung curve for 42nm M1 and 50nm CH: EUV vs ArFi 55 50 CD [nm] 45 40 35 30 EUV M1 EUV CH ArF i M1 ArF i CH -150-100 -50 0 50 100 150 Focus [nm] Process window analysis Depth of Focus Metal-1 [nm] Depth of Focus Contact Hole [nm] EUV >300 >300 ArF i ~100 ~130 Slide 18
Process window analysis illustrates difference between high k1 and low k1 imaging 65 60 Averaged Bossung energy latitude curve for 42nm M1 and 50nm CH: EUV vs ArFi CD [nm] CD [nm] 60 55 55 50 50 45 45 EUV M1 40 EUV M1 EUV CH EUV CH 40 35 ArF i M1 ArF M1 ArF i CH 35 ArF CH 30-30 -20-10 0 10 20 30-150 -100-50 0 50 100 150 Delta Focus Energy [nm] [%] Process window analysis Dose sensitivity Metal-1 [nm/%] Dose sensitivity Contact Hole [nm/%] Exposure Latitude Metal-1 [%] Exposure Latitude Contact Hole [%] EUV 0.26 0.21 32 47 ArF i 0.70 0.94 12 10 Slide 19
EUV Full wafer CDU 42nm Metal layer < 3.0nm Full wafer and intra field CDU for 42nm Metal layer: All unique features in designs evaluated Full wafer and intra field CDU < 3.0nm 3σ (7% of TargetCD) for both H and V lay out Identical features in lay-out are within +/-0.6nm from average CD CDU [nm 3σ] 10 9 8 7 6 5 4 3 2 1 0 CDU performance 42nm Metal-1 trench width F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 Feature 52 50 48 46 44 42 40 38 36 34 32 Mean CD [nm] FWCDU H FWCDU V IF CDU H IF CDU V Mean H Mean V Slide 20
EUV Full wafer CDU 50nm Contact layer < 3.8nm Full wafer and intra field CDU for 50nm Contact Hole layer All unique features in designs evaluated Full wafer and intra field CDU < 3.8nm 3σ (7.5% of TargetCD) for both H and V lay out Identical features in lay-out are within +/-0.6nm from average CD CDU [nm 3σ] 10 9 8 7 6 5 4 3 2 1 0 CDU performance 50nm Contact Holes F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 Feature 56 54 52 50 48 46 44 42 40 38 36 Mean CD [nm] FWCDU H FWCDU V IF CDU H IF CDU V Mean H Mean V Slide 21
ArFi Intra field CDU 50nm Contact layer ~ 6.0nm 6 features in splitted design evaluated (for symmetry reasons) Intra field CDU is between 4.5 and 8.7nm 3σ Evaluated contacts print within +/-2nm of average CD CO_set1 CO_set2 CO_set3 CO_set4 CO_between Ellips CDU [nm 3σ] 10 9 8 7 6 5 4 3 2 1 0 CDU performance 50nm Contact Holes 65 63 61 59 57 55 53 51 49 47 45 IF CDU Mean Ellips_Y CO_between CO_set1 CO_set2 Feature CO_set3 CO_set4 Slide 22
ArFi Intra field CDU 50nm Contact layer ~ 6.0nm 6 features in splitted design evaluated (for symmetry reasons) Intra field CDU is between 4.5 and 8.7nm 3σ Evaluated contacts print within +/-2nm of average CD EUV gives better CDU and shows less variation between holes => benefit of high k1 imaging CO_set1 CO_set2 CO_set4 CO_between CO_set3 Ellips CDU [nm 3σ] 10 9 8 7 6 5 4 3 2 1 0 CDU performance CDU performance 50nm Contact 50nm Contact Holes - Holes ArFi vs EUV 65 63 61 59 57 55 53 51 49 47 45 IF CDU IF CDU ArFi IF CDU Mean EUV Ellips_Y Ellips_Y CO_between CO_between CO_set1 CO_set1 CO_set2 CO_set2 Feature Feature CO_set3 CO_set3 CO_set4 CO_set4 Slide 23
ArFi full contact and metal-1 layer succesfully transferred into TiN hardmask After first litho Afteretch DP in in TiN FLEXRAY Full contact layer of 0.078 µm² SRAM Slide 24
ArFi full contact and metal-1 layer succesfully transferred into TiN hardmask After first litho Afteretch DP in in TiN FLEXRAY Full metal1 layer of 0.078 µm² SRAM Slide 25
Simulated CDU budget for 50nm Contacts supports experimental data Main contributors: EUV: Reticle and process + etch (to be verified), same CDU for all features ArFi: MSDxy and reticle, large CDU differences between features 10 9 8 CO_between EUV CO_between ArFi NXE:3100 vs. XT:1950Hi CDU budget for 50nm CH layer CO_set1 CO_set2 CO_set4 CO_between CDU [nm 3σ] 7 6 5 4 CO_set3 Ellips 3 2 1 0 Focus Dose Flare MSDxy MSDz Aberrations Other Reticle Process + Etch System CDU Total CDU CDU budget analysis System CDU [nm; 3σ] Total CDU [nm; 3σ] EUV ~1.0 ~3.5 ArF i ~3.0-6.0 ~4.3-8.8 Slide 26
Contact hole MEEF is ~1.5 for EUV and ~5 for ArFi Mask Error Enhancement Factor (MEEF) is major contributor to ArFi CDU budget EUV MEEF ~ 1.5 (simulated) ArFi MEEF = 4.4-6.4 (measured) CO_set1 CO_set2 CO_set3 CO_set4 CO_between Ellips MEEF [-] 9.00 8.00 7.00 6.00 5.00 4.00 3.00 2.00 1.00 0.00 MEEF EUV (sim) MEEF ArFi (meas) MEEF ArFi (sim) EllipsX CO_between CO_set1 CO_set2 CO_set3 CO_set4 Feature Slide 27
Contact hole MEEF is ~1.5 for EUV and ~5 for ArFi Mask Error Enhancement Factor (MEEF) is major contributor to ArFi CDU budget EUV MEEF ~ 1.5 (simulated) ArFi MEEF = 4.4-6.4 (measured) Aerial image contrast shows: EUV: High contrast and steep slope => low MEEF ArFi: Low contrast and shallow slope => high MEEF + MSDxy sensitivity Aerial Image Intensity [-] MEEF [-] 9.00 8.00 7.00 6.00 5.00 4.00 3.00 2.00 1.00 0.00 Simulated Aerial Image contrast for CO between EllipsX CO_between CO_set1 0.7 0.6 0.5 0.4 0.3 0.2 0.1 CO_set2 Feature CO_set3 CO_set4 MEEF EUV (sim) MEEF ArFi (meas) MEEF ArFi (sim) 0-60 -40-20 0 20 40 60 Position [nm] EUV ArFi CO_set1 CO_set2 CO_set3 CO_set4 CO_between Ellips Slide 28
Presentation outline Introduction SRAM patterning Scaling Summary Slide 29
SRAM scaling down to 16nm node using 0.25 NA EUV Contact and M1 layer of aggressive 16nm node cell-size (0.038µm2) resolved at first try SEM-images show that OPC needs to be optimized further 60nm 64nm Full contact and Metal1 layer of 0.038 µm² SRAM Slide 30 64nm
Scaling SRAM cells with double patterning: 0.058 µm 2 5-track SRAM cell with local interconnect P78 x P74 bit-cell area 0.058 µm 2 PV bands after double patterning of CO and ME1, i.e. 4 litho layers: ME1 ME1 CO CO PV bands generated at ±28 nm defocus, ±2% dose error, ±1 nm mask bias EL (%) DOF@6 % EL (nm) Max. MEEF CO split1 9.8 110 3.9 CO split2 11.2 166 2.5 ME1 split1 9.8 170 3.5 ME1 split2 13.7 188 2.2 Slide 31 31
Presentation outline Introduction SRAM patterning Scaling Summary Slide 32
Summary Dark field back-end layers (as demonstrated here) show superior CDU performance with EUV lithography ArFi low k1 imaging gives less process latitude Main challenges for ArFi double patterning: Imaging at decreasing contrast levels => Stringent system specs, eg. on MSDxy, focus and overlay, to meet total CDU performance Tight specification on masks due to high MEEF and reduced tolerance for registration errors Scaling down to ~0.06µm 2 cell-size feasible for back-end layers using pattern split with local interconnect and SMO Masks designed for experimental verification (N)XT:1950Hi secures roadmap requirements while EUV matures Slide 33
Acknowledgements IMEC: Jan Hermans, Staf Verhagen, Mieke Goethals, Gian Lorusso, Kurt Ronse ASML ADT team at IMEC: Andre van Dijk, Charles Pigneret, Gert Bertels, Christophe Péry, Thomas Gregory, Tom Lathouwers, Arno van Limpt, Leon Romijn ASML ADT team in Vhv: Oleg Voznyi, Dragan Antunovic, Sjoerd Lok, Theo van den Akker Hitachi SEM group: Dorothe Oorschot,Yin Fong Choi, Mariette Berende, Jeroen Meessen XT4:1950Hi and ADT exposure support: Eddy van der Heijden, Kees Ricken Device requirements and layer stack options: Ewoud Vreugdenhil and Frank van Bilsen Tachyon OPC and flare maps: Peter Nikolsky, Natalia Davydova, Brion team ASML is grateful for the support of the EAGLE and EXEPT projects, as well as the MEDEA+ and CATRENE organizations of the European Union Slide 34
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