PRECISION VOLTAGE REGULATORS

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SLVS057B AUGUST 1972 RESED AUGUST 1995 150-mA Load Current Without External Power Transistor Typically 0.02% Input Regulation and 0.03% Load Regulation (µa723m) Adjustable Current Limiting Capability Input Voltages to 40 V Output Adjustable From 2 V to 37 V Direct Replacement for Fairchild µa723c and µa723m description The µa723c and µa723m are precision monolithic integrated circuit voltage regulators featuring high ripple rejection, excellent input and load regulation, excellent temperature stability, and low standby current. The circuit consists of a temperature-compensated reference voltage amplifier, an error amplifier, a 150-mA output transistor, and an adjustable output current limiter. The µa723c and µa723m are designed for use in positive or negative power supplies as a series, shunt, switching, or floating regulator. For output currents exceeding 150 ma, additional pass elements may be connected as shown in Figures 4 and 5. The µa723c is characterized for operation from 0 C to 70 C. The µa723m is characterized for operation over the full military temperature range of 55 C to 125 C. µa723c...d OR N PACKAGE µa723m...j PACKAGE (TOP EW) IN IN+ V CC IN IN+ V CC IN IN+ 1 2 3 4 5 6 7 14 13 12 11 10 9 8 µa723m...u PACKAGE (TOP EW) 10 9 8 7 6 µa723m...fk PACKAGE (TOP EW) 1 2 3 4 5 3 4 2 1 20 19 18 5 6 7 17 16 15 8 14 9 10 11 12 13 V CC + V C V Z V CC + V C V CC + V C V CC V Z No internal connection PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 1995, Texas Instruments Incorporated POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3 1

SLVS057B AUGUST 1972 RESED AUGUST 1995 functional block diagram VCC + Temperature- Compensated Reference Diode Current Source Ref Amp Error Amp + Current Limiter VC Series Pass Transistor Output CURR LIM CURR SENS D, FK, J, and N Packages Only schematic VCC + VC 500 Ω 25 kω 1 kω 1 kω 15 kω 15 kω 100 Ω 6.2 V D, FK, J, and N Packages Only 5 pf 30 kω 5 kω 300 Ω 20 kω 150 Ω Resistor and capacitor values shown are nominal. 3 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

SLVS057B AUGUST 1972 RESED AUGUST 1995 µa723y chip information This chip, when properly assembled, displays characteristics similar to the µa723c. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (2) (13) (3) (12) 52 (11) (4) (10) (5) (6) (7) (9) 47 IN+ (1) (2) (3) (4) (5) (6) (7) µa723y (14) (13) (12) (11) (10) (9) (8) VCC+ VC CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 4 MILS MINIMUM TJmax = 150 C TOLERAES ARE ±10%. ALL DIMENSIONS ARE IN MILS. TERMINALS 1, 8, AND 14 ARE NOT CONNECTED POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3 3

SLVS057B AUGUST 1972 RESED AUGUST 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Peak voltage from V CC+ to V CC (t w 50 ms)............................................... 50 V Continuous voltage from V CC+ to V CC..................................................... 40 V Input-to-output voltage differential........................................................... 40 V Differential input voltage to error amplifier.................................................... ± 5 V Voltage between noninverting input and V CC.................................................. 8 V Current from V Z......................................................................... 25 ma Current from........................................................................ 15 ma Continuous total dissipation (see Note 1)................................ See Dissipation Rating Table Operating free-air temperature range, T A : µa723c...................................... 0 C to 70 C µa723m................................. 55 C to 125 C Storage temperature range, T stg.................................................. 65 C to 150 C Case temperature for 60 seconds, T C : FK package.......................................... 260 C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or U package................. 300 C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package............... 260 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: Power dissipation = [I(standby) + I(ref)] VCC + [VC VO] IO. DISSIPATION RATING TABLE PACKAGE TA 25 C POWER DERATE DERATING FACTOR TA = 70 C TA = 125 C RATING ABOVE TA POWER RATING POWER RATING D 950 mw 7.6 mw/ C 25 C 608 mw FK and J 1000 mw 11.0 mw/ C 59 C 879 mw 274 mw N 1000 mw 9.2 mw/ C 41 C 733 mw U 675 mw 5.4 mw/ C 25 C 432 mw 135 mw recommended operating conditions MIN MAX UNIT Input voltage, 9.5 40 V Output voltage, VO 2 37 V Input-to-output voltage differential, VC VO 3 38 V Output current, IO 150 ma 3 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

SLVS057B AUGUST 1972 RESED AUGUST 1995 electrical characteristics at specified free-air temperature (see Notes 2 and 3) µa723c µa723m PARAMETER TEST CONDITIONS TA MIN TYP MAX MIN TYP MAX UNIT Input regulation Ripple rejection = 12 V to = 15 V 25 C 0.1 1 0.1 1 = 12 V to = 40 V 25 C 1 5 0.2 2 = 12 V to = 15 V Full 3 3 range f = 50 Hz to 10 khz, Cref = 0 25 C 74 74 f = 50 Hz to 10 khz, Cref = 5 µf 25 C 86 86 25 C 0.3 2 0.3 1.5 Output regulation Full 6 6 mv/v range Reference voltage, Vref 25 C 6.8 7.15 7.5 6.95 7.15 7.35 V Standby current = 30 V, IO = 0 25 C 2.3 4 2.3 3.5 ma Temperature coefficient of output voltage Full range mv/v db 0.003 0.015 0.002 0.015* %/ C Short-circuit output current RSC = 10 Ω, VO = 0 25 C 65 65 ma Output noise voltage BW = 100 Hz to 10 khz, Cref = 0 BW = 100 Hz to 10 khz, Cref = 5 µf 25 C 20 20 25 C 2.5 2.5 *On products compliant to MIL-STD-883, Class B, this parameter is not production tested. Full range for µa723c is 0 C to 70 C and for µa723m is 55 C to 125 C. NOTES: 2. For all values in this table, the device is connected as shown in Figure 1 with the divider resistance as seen by the error amplifier 10 kω. Unless otherwise specified, = VCC + = VC = 12 V, = 0, VO = 5 V, IO = 1 ma, RSC = 0, and Cref = 0. 3. Pulse-testing techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. µv POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3 5

SLVS057B AUGUST 1972 RESED AUGUST 1995 electrical characteristics, T A = 25 C (see Notes 2 and 3) Input regulation Ripple rejection PARAMETER TEST CONDITIONS µa723y MIN TYP MAX = 12 V to = 15 V 0.1 = 12 V to = 40 V 1 f = 50 Hz to 10 khz, Cref = 0 74 f = 50 Hz to 10 khz, Cref = 5 µf 86 Output regulation 0.3 mv/v Reference voltage, Vref 7.15 V Standby current = 30 V, IO = 0 2.3 ma Short-circuit output current RSC = 10 Ω, VO = 0 65 ma Output noise voltage BW = 100 Hz to 10 khz, Cref = 0 BW = 100 Hz to 10 khz, Cref = 5 µf NOTES: 2. For all values in this table, the device is connected as shown in Figure 1 with the divider resistance as seen by the error amplifier 10 kω. Unless otherwise specified, = VCC + = VC = 12 V, = 0, VO = 5 V, IO = 1 ma, RSC = 0, and Cref = 0. 3. Pulse-testing techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. 20 2.5 UNIT mv/v db µv 3 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

APPLICATION INFORMATION SLVS057B AUGUST 1972 RESED AUGUST 1995 VOLTAGE APPLICABLE FIGURES (V) (SEE NOTE 4) (kω) Table 1. Resistor Values (kω) for Standard Output Voltages FIXED ±5% (kω) ADJUSTABLE ±10% (SEE NOTE 5) (kω) P1 (kω ) P2 (kω ) VOLTAGE APPLICABLE FIGURES (V) (SEE NOTE 4) (kω) FIXED ±5% ADJUSTABLE ±10% (SEE NOTE 5) 3.0 1,5,6,9,11, 4.12 3.01 1.8 0.5 1.2 100 7 3.57 105 2.2 10 91 12 (4) 3.6 1,5,6,9,11, 3.57 3.65 1.5 0.5 1.5 250 7 3.57 255 2.2 10 240 12 (4) 5.0 1,5,6,9,11, 2.15 4.99 0.75 0.5 2.2 6 3, 10 3.57 2.43 1.2 0.5 0.75 12 (4) (Note 6) 6.0 1,5,6,9,11, 1.15 6.04 0.5 0.5 2.7 9 3, 10 3.48 5.36 1.2 0.5 2.0 12 (4) 9.0 2,4,(5,6, 1.87 7.15 0.75 1.0 2.7 12 3, 10 3.57 8.45 1.2 0.5 3.3 9,12) 12 2,4,(5,6, 4.87 7.15 2.0 1.0 3.0 15 3, 10 3.57 11.5 1.2 0.5 4.3 9,12) 15 2,4,(5,6, 7.87 7.15 3.3 1.0 3.0 28 3, 10 3.57 24.3 1.2 0.5 10 9,12) 28 2,4,(5,6, 21.0 7.15 5.6 1.0 2.0 45 8 3.57 41.2 2.2 10 33 9,12) 45 7 3.57 48.7 2.2 10 39 100 8 3.57 95.3 2.2 10 91 75 7 3.57 78.7 2.2 10 68 250 8 3.57 249 2.2 10 240 (kω) (kω) P1 (kω ) (kω ) NOTES: 4. 4The / divider may be across either VO or V(ref). If the divider is across V(ref), use the figure numbers without parentheses. If the divider is across VO, use the figure numbers in parentheses. 5. To make the voltage adjustable, the / divider shown in the figures must be replaced by the divider shown below. P1 Adjustable Output Circuit 6. For Figures 3, 8, and 10, the device requires a minimum of 9 V between VCC + and when VO is equal to or more positive than 9 V. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3 7

SLVS057B AUGUST 1972 RESED AUGUST 1995 APPLICATION INFORMATION Table 2. Formulas for Intermediate Output Voltages Outputs from 2 V to 7 V See Figures 1,5,6,9, 11, 12 (4) and Note 4 V O V (ref) Outputs from 4 V to 250 V See Figure 7 and Note 4 V O V (ref) 2 Current Limiting I (limit) 0.65 V R SC R3 Outputs from 7 V to 37 V See Figures 2,4,(5,6,9, 11, 12) and Note 4 Outputs from 6 V to 250 V See Figures 3, 8, 10 and Notes 4 and 6 Foldback Current Limiting See Figure 6 V O V (ref) V O V (ref) 2 I V O R3 (R3 ) 0.65 V (knee) R SC R3 I OS 0.65 V R SC R3 NOTES: 4. The / divider may be across either VO or V(ref). If the divider is across V(ref), use figure numbers without parentheses. If the divider is across VO, use the figure numbers in parentheses. 6. For Figures 3, 8, and 10, the device requires a minimum of 9 V between VCC + and when VO is equal to or more positive than 9 V. 3 8 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

APPLICATION INFORMATION SLVS057B AUGUST 1972 RESED AUGUST 1995 VCC+ VC VCC+ VC C(ref) µa723 µa723 RSC Output, R3 R3 VO (see Notes A and B) (see Notes A and B) RSC Output, VO 100 pf 100 pf NOTES: A. Figure 1. Basic Low-Voltage Regulator Figure 2. Basic High-Voltage Regulator (V O = 2 V to 7 V) (V O = 7 V to 37 V) R3 for minimum VO B. R3 may be eliminated for minimum component count. Use direct connection (i.e., R3 = 0). R3 = 2 kω (see Note C) µa723 2N5001 µa723 100 pf 500 pf RSC 2N3997 Figure 3. Negative-Voltage Regulator Figure 4. Positive-Voltage Regulator (External N-P-N Pass Terminator) NOTE C: When 10-lead µa723u devices are used in applications requiring, an external 6.2-V regulator diode must be connected in series with. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3 9

SLVS057B AUGUST 1972 RESED AUGUST 1995 APPLICATION INFORMATION 60 Ω µa723 1000 pf 2N5001 RSC µa723 1000 pf RSC R3 VO IOS lknee IO Figure 5. Positive-Voltage Regulator (External P-N-P Pass Transistor) Figure 6. Foldback Current Limiting 2 kω 10 kω 1N1826 R3 2N5241 (see Note A) 1N759 µa723 µa723 R3 RSC = 1 Ω 500 pf 500 pf 10 kω 2N5241 (see Note A) Figure 7. Positive Floating Regulator Figure 8. Negative Floating Regulator NOTE A: When 10-lead µa723u devices are used in applications requiring, an external 6.2-V regulator diode must be connected in series with. 3 10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

APPLICATION INFORMATION SLVS057B AUGUST 1972 RESED AUGUST 1995 2N5005 2N5153 0.1 µf 1 kω 1 MΩ µa723 51 Ω 1N4005 L = 1.2 mh (see Note C) Figure 9. Positive Switching Regulator (see Note A) R3 1 kω 2N3997 0.1 µf µa723 220 Ω (see Note B) 2N5004 1 kω 1 MΩ 15 pf 1N4005 100 µf L = 1.2 mh (see Note C) Figure 10. Negative Switching Regulator NOTES: A. The device requires a minimum of 9 V between VCC+ and when VO is equal to or more positive than 9 V. B. When 10-lead µa723u devices are used in applications requiring, an external 6.2-V regulator diode must be connected in series with. C. L is 40 turns of No. 20 enameled copper wire wound on Ferroxcube P36/22-3B7 potted core or equivalent, with a 0.009-inch air gap. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3 11

SLVS057B AUGUST 1972 RESED AUGUST 1995 APPLICATION INFORMATION µa723 2 kω 1000 pf RSC 2N4422 2 kω Input From Series 54/74 Logic NOTE A: A current-limit transistor may be used for shutdown if current limiting is not required. Figure 11. Remote Shutdown Regulator With Current Limiting 100 Ω µa723 5000 pf (see Note A) 1 kω 2N3997 NOTE A: When 10-lead µa723u devices are used in applications requiring, an external 6.2-V regulator diode must be connected in series with. Figure 12. Shunt Regulator 3 12 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ( Critical Applications ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DECES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 1995, Texas Instruments Incorporated