Data Sheet No. PD6263 Features Floating channel designed for bootstrap operation Fully operational to +6 V Tolerant to negative transient voltage, dv/dt immune Gate drive supply range from 1 V to 2 V Undervoltage lockout 3.3 V, V, and 1 V logic compatible Cross-conduction prevention logic Matched propagation delay for both channels Internal set deadtime High-side output in phase with HIN input Low-side output out of phase with input RoHS compliant Description The IRS213 is a high voltage, high speed power MOSFET and IGBT drivers with dependent high- and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down Typical Connection HALF-BRIDGE DRIVER Product Summary V OFFSET I O +/- V OUT t on/off (typ.) Deadtime (typ.) Packages 8-Lead PDIP IRS213 IRS213(S)PbF 6 V max. 13 ma/27 ma 1 V - 2 V 68 ns/1 ns 2 ns to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 6 V. 8-Lead SOIC IRS213S (Refer to Lead Assignments for correct configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1
IRS213(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Units V B High-side floating absolute voltage -.3 62 V S High-side floating supply offset voltage V B - 2 V B +.3 V HO High-side floating output voltage V S -.3 V B +.3 V CC Low-side and logic fixed supply voltage -.3 2 V LO Low-side output voltage -.3 V CC +.3 V IN Logic input voltage (HIN & ) -.3 V CC +.3 dvs/dt Allowable offset supply voltage transient V/ns P D Package power dissipation @ T A +2 C Rth JA Thermal resistance, junction to ambient (8 Lead PDIP) 1. (8 Lead SOIC).62 (8 Lead PDIP) 12 (8 Lead SOIC) 2 T J Junction temperature 1 T S Storage temperature - 1 T L Lead temperature (soldering, 1 seconds) 3 V W C/W C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The V S offset rating is tested with all supplies biased at a 1 V differential. Symbol Definition Units V B High-side floating supply absolute voltage V S + 1 V S + 2 V S High-side floating supply offset voltage Note 1 6 V HO High-side floating output voltage V S V B V CC Low-side and logic fixed supply voltage 1 2 V V LO Low-side output voltage V CC V IN Logic input voltage (HIN & ) V CC T A Ambient temperature - 12 C Note 1: Logic operational for V S of - V to +6 V. Logic state held for V S of - V to -V BS. (Please refer to the Design Tip DT97-3 for more details). www.irf.com 2
IRS213(S)PbF Dynamic Electrical Characteristics V BIAS (V CC, V BS ) = 1 V, C L = 1 pf and T A = 2 C unless otherwise specified. Symbol Definition Units Test Conditions ton Turn-on propagation delay 68 82 V S = V toff Turn-off propagation delay 1 22 V S = 6 V t r Turn-on rise time 7 17 tf Turn-off fall time 3 9 DT Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off 2 6 MT Delay matching, HS & LS turn-on/off 6 ns Static Electrical Characteristics V BIAS (V CC, V BS ) = 1 V and T A = 2 C unless otherwise specified. The V IN, V TH, and I IN parameters are referenced to COM. The V O and I O parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Units Test Conditions V IH Logic 1 (HIN) & Logic (LIN ) input voltage 2. V IL Logic (HIN) & Logic 1 (LIN ) input voltage.8 V OH High level output voltage, V BIAS - V O..2 V OL Low level output voltage, V O.2.1 I LK Offset supply leakage current V B = V S = 6 V I QBS Quiescent V BS supply current 3 I QCC Quiescent V CC supply current 1 27 I IN+ Logic 1 input bias current 3 1 HIN = V, LIN = V I IN- Logic input bias current HIN = V, LIN = V V CCUV+ V CCUV- V CC supply undervoltage positive going threshold V CC supply undervoltage negative going threshold 8 8.9 9.8 7. 8.2 9 V µa V V CC = 1 V to 2 V I O = 2 ma V IN = V or V I O+ Output high short circuit pulsed current 13 29 I O- Output low short circuit pulsed current 27 6 ma V O = V, V IN = V IH PW 1 µs V O = 1 V, V IN = V IL PW 1 µs www.irf.com 3
IRS213(S)PbF Functional Block Diagram VB HV LEVEL SHIFT PULSE FILTER R S Q HO IHN PULSE GEN VS DEAD TIME & SHOOT-THROUGH PREVENTION UV DETECT VCC VCC LIN LO COM Lead Definitions Symbol HIN V B HO V S V CC LO COM Description Logic input for high-side gate driver output (HO), in phase Logic input for low-side gate driver output (LO), out of phase High-side floating supply High-side gate drive output High-side floating supply return Low-side and logic fixed supply Low-side gate drive output Low-side return Lead Assignments 1 V CC V B 8 1 V CC V B 8 2 HIN HO 7 2 HIN HO 7 3 LIN V S 6 3 LIN V S 6 COM LO COM LO 8 Lead PDIP 8 Lead SOIC IRS213PbF IRS213SPbF www.irf.com
IRS213(S)PbF Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions Figure 3. Deadtime Waveform Definitions www.irf.com
IRS213(S)PbF 1 1 Turn-On Delay Time (ns) 12 1 8 6 2 - -2 2 7 1 12 Turn-On Delay Time (ns) 12 1 8 6 2 1 12 1 16 18 2 VBIAS Supply Voltage (V) Figure A. Turn-On Time Figure B. Turn-On Time vs. Supply Voltage Turn-On Delay Time (ns) 1 8 6 2 Turn-Off Delay Time (ns) 3 2 1 2 6 8 1 12 1 16 18 2 Input Voltage (V) Figure C. Turn-On Time vs. Input Voltage - -2 2 7 1 12 Figure A. Turn-Off Time 1 Turn-Off Delay Time (ns) 3 2 1 Turn-Off Delay Time (ns) Turn-Off Delay Time (ns) 8 6 2 1 12 1 16 18 2 VBIAS Supply Voltage (V) Figure B. Turn-Off Time vs. Supply Voltage 2 6 8 1 12 1 16 18 Input Voltage (V) Figure C. Turn-Off Time vs. Input Voltage www.irf.com 6
IRS213(S)PbF Turn-On Rise Time (ns) 3 2 1 - -2 2 7 1 12 Turn-On Rise Time (ns) 3 2 1 1 12 1 16 18 2 Figure 6A. Turn-On Rise Time VBIAS Supply Voltage (V) Figure 6B. Turn-On Rise Time vs. Voltage 2 2 Turn-Off Fall Time (ns) 1 1 - -2 2 7 1 12 Figure 7A. Turn-Off Fall Time Turn-Off Fall Time (ns) 1 1 1 12 1 16 18 2 Input Voltage (V) Figure 7B. Turn-Off Fall Time vs. Voltage 1 12 1 12 Deadtime (ns) 1 8 6 2 Deadtime (ns) 1 8 6 2 - -2 2 7 1 12 Figure 8A. Deadtime 1 12 1 16 18 2 VBIAS Supply Voltage (V) Figure 8B. Deadtime vs. Voltage www.irf.com 7
IRS213(S)PbF Input Voltage (V) 3 2 Input Voltage Voltage (V) (V) 3 2 1 - -2 2 7 1 12 Figure 9A. Logic "1" Input Voltage 1 1 12 1 16 18 2 V BAIS Supply Voltage (V) Figure 9B. Logic "1" Input Voltage vs. Supply Voltage Input Voltage (V) 3.2 2. 1.6.8 Input Voltage (V) 3.2 2. 1.6.8 - -2 2 7 1 12 Figure 1A. Logic ""(HIN) & Logic "1" ( LIN ) Input Voltage 1 12 1 16 18 2 Vcc Supply Voltage (V) Figure 1B. Logic ""(HIN) & Logic "1" ( LIN ) Input Voltage vs. Voltage High Level Output Voltage (V)...3.2.1. - -2 2 7 1 12 Figure 11A. High Level Output Voltage High Level Output Voltage (V)...3.2.1. 1 12 1 16 18 2 V BIAS Supply Voltage (V) Figure 11B. High Level Output Voltage vs. Supply Voltage www.irf.com 8
IRS213(S)PbF Low Level Output Voltage (V)...3.2.1. - -2 2 7 1 12 Figure 12A. Low Level Output Voltage Low Level Output Voltage (V)...3.2.1 1 12 1 16 18 2 V BIAS Supply Voltage (V) Figure 12B. Low Level Output Voltage vs. Supply Voltage Offset Supply Leakge Current (µa) 3 2 1 - -2 2 7 1 12 Offset Supply Leakge Current (µa) 3 2 1 2 6 8 VB Boost Voltage (V) Figure 13A. Offset Supply Current Figure 13B. Offset Supply Current vs. Voltage 1 1 VBS Supply Current (µa) 12 9 6 3 - -2 2 7 1 12 VBS Supply Current (µa) 12 9 6 3 1 12 1 16 18 2 VBS Floating Supply Voltage (V) Figure 1A. V BS Supply Current Figure 1B. V BS Supply Current vs. Voltage www.irf.com 9
IRS213(S)PbF V CC Supply Current (µa) 7 6 3 2 1 - -2 2 7 1 12 V CC Supply Current (µa) 7 6 3 2 1 1 12 1 16 18 2 Vcc Supply Voltage (V) Figure 1A. Vcc Supply Current Figure 1B. Vcc Supply Current vs. Voltage 3 3 Logic 1 Input Current (µa) 2 2 1 1 Max - -2 2 7 1 12 Logic 1 Input Current (µa) 2 2 1 1 1 12 1 16 18 2 Vcc Supply Voltage (V) Figure 16A. Logic "1" Input Current Figure 16B. Logic "1" Input Current vs. Voltage Lo gic "" Input Bia s Current (µa) 6 3 2 1 Max - -2 2 7 1 12 Temperature ( C) Figure 17A. Logic "" Input Current Logic Input Current (µa) Logic "" Input Bias Current (µa) 6 3 2 1 Max 1 12 1 16 18 2 Supply Voltage (V) Figure 17B. Logic "" Input Current vs. Voltage www.irf.com 1
IRS213(S)PbF V CC UVLO Threshold +(V) 11 1 9 8 7 6 - -2 2 7 1 12 V CC UVLO Threshold -(V) 11 1 9 8 7 6 - -2 2 7 1 12 Figure 18A. Vcc Undervoltage Threshold(+) Figure 18B. Vcc UndervoltageThreshold (-) Output Source Current (ma) 3 2 1 - -2 2 7 1 12 Output Source Current (ma) 3 2 1 1 12 1 16 18 2 V BIAS Supply Voltage (V) Figure 19A. Output Source Current Figure 19B. Output Source Current vs. Supply Voltage 1 1 Output Sink Current (ma) 8 6 2 - -2 2 7 1 12 Output Sink Current (ma) 8 6 2 1 12 1 16 18 2 V BIAS Supply Voltage (V) Figure 2A. Output Sink Current Figure 2B. Output Sink Current vs. Supply Voltage www.irf.com 11
IRS213(S)PbF Case Outlines 8-Lead PDIP 1-61 1-33 1 (MS-1AB) A E 6 6X D 8 7 6 1 2 3 e B H.2 [.1] A 6.6 [.2] 3X 1.27 [.] FOOTPRINT 8X.72 [.28] 8X 1.78 [.7] DIM INC HES MILLIMETERS MIN MAX MIN MAX A A1.32..688.98 1.3.1 1.7.2 b.13.2.33.1 c.7.98.19.2 D E.189.197.1968.17.8 3.8.. e. BASIC 1.27 BASIC e1.2 BASIC.63 BASIC H K L y.228.99.16.2.196. 8.8.2. 6.2. 1.27 8 e1 A C y K x 8X b A1.2 [.1] C A B.1 [.] 8X L 7 8X c NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y1.M-199. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].. OUTLINE CONFORMS TO JEDEC OUTLINE MS-12AA. 8-Lead SOIC DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.1 [.6]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.2 [.1]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 1-627 1-21 11 (MS-12AA) www.irf.com 12
IRS213(S)PbF Tape & Reel 8-lead SOIC LOADED TA PE FEED DIRECTION B A H D F C N OTE : CONTROLLING D IMENSION IN MM E G CARRIER TAPE DIMENSION FOR 8SOICN M etr ic Im p erial Code Min Max Min Max A 7.9 8.1.31 1.3 18 B 3.9.1.13.161 C 11.7 12.3.6.8 D...21.2 18 E 6.3 6..2 8.2 F.1.3.2.2 8 G 1. n/a.9 n/a H 1. 1.6. 9. 62 F D E C B A G H REEL DIMENSIONS FOR 8SOICN M etr ic Im p erial Code Min Max Min Max A 329.6 33.2 12.976 13.1 B 2.9 21..82.8 C 12.8 13.2.3.19 D 1.9 2..76 7. 96 E 98. 12. 3.88.1 F n/a 18. n/a.72 G 1. 17.1.7.673 H 12. 1..88.66 www.irf.com 13
IRS213(S)PbF LEADFREE PART MARKING INFORMATION Part number Date code IRxxxxxx S YWW? IR logo Pin 1 Identifier? MARKING CODE P Lead Free Released Non-Lead Free Released?XXXX Lot Code (Prod mode - digit SPN code) Assembly site code Per SCOP 2-2 ORDER INFORMATION 8-Lead PDIP IRS213PbF 8-Lead SOIC IRS213SPbF 8-Lead SOIC Tape & Reel IRS213STRPbF The SOIC-8 is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 92 Tel: (31) 22-71 Data and specifications subject to change without notice. 11/27/26 www.irf.com 1