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Transcription:

Chapter 5: Field Effect Transistors

Slide 1 FET FET s (Field Effect Transistors) are much like BJT s (Bipolar Junction Transistors). Similarities: Amplifiers Switching devices Impedance matching circuits Differences: FET s are voltage controlled devices whereas BJT s are current controlled devices. FET s also have a higher input impedance, but BJT s have higher gains. FET s are less sensitive to temperature variations and because of there construction they are more easily integrated on IC s. FET s are also generally more static sensitive than BJT s.

Slide 2 FET Types JFET ~ Junction Field-Effect Transistor MOSFET ~ Metal-Oxide Field-Effect Transistor -D-MOSFET~ Depletion MOSFET -E-MOSFET~ Enhancement MOSFET

Slide 3 JFET Construction There are two types of JFET s: n-channel and p-channel. The n-channel is more widely used. There are three terminals: Drain (D) and Source (S) are connected to n-channel Gate (G) is connected to the p-type material

Slide 4 Basic Operation of JFET JFET operation can be compared to a water spigot: The source of water pressure accumulated electrons at the negative pole of the applied voltage from Drain to Source The drain of water electron deficiency (or holes) at the positive pole of the applied voltage from Drain to Source. The control of flow of water Gate voltage that controls the width of the n-channel, which in turn controls the flow of electrons in the n-channel from source to drain.

Slide 5 JFET Operating Characteristics There are three basic operating conditions for a JFET: A. V GS = 0, V DS increasing i to some positive i value B. V GS < 0, V DS at some positive value C. Voltage-Controlled Resistor

Slide 6 A. V GS = 0, V DS increasing to some positive value Three things happen when V GS = 0 and V DS is increased from 0 to a more positive voltage: the depletion region between p-gate and n-channel increases as electrons from n-channel combine with holes from p-gate. increasing the depletion region, decreases the size of the n-channel which increases the resistance of the n-channel. But even though h the n-channel resistance is increasing, i the current (I D )f from Source to Drain through the n-channel is increasing. This is because V DS is increasing.

Slide 7 Pinch-off If V GS = 0 and V DS is further increased to a more positive voltage, then the depletion zone gets so large that it pinches off the n-channel. This suggests that the current in the n- channel (I D ) would drop to 0A, but it does just the opposite: as V DS increases, so does I D.

Slide 8 Saturation At the pinch-off point: any further increase in V GS does not produce any increase in I D. V GS at pinch-off is denoted as Vp. ID is at saturation or maximum. It is referred to as I DSS. The ohmic value of the channel is at maximum.

Slide 9 B. V GS < 0, V DS at some positive value As V GS becomes more negative the depletion region increases.

Slide 10 I D < I DSS As V GS becomes more negative: the JFET will pinch-off at a lower voltage (Vp). I D decreases (I D < I DSS ) even though V DS is increased. Eventually I D will reach 0A. V GS at this point is called Vp or V GS(off). Also note that at high levels of V DS the JFET reaches a breakdown situation. ID will increases uncontrollably if V DS > V DSmax.

Slide 11 C. Voltage-Controlled Resistor The region to the left of the pinch-off point is called the ohmic region. The JFET can be used as a variable resistor, where VGS controls the drain-source resistance (rd). As V GS becomes more negative, the resistance (rd) increases. r d r = (1 V o GS V P ) 2 [Formula 5.1]

Slide 12 p-channel JFETS p-channel JFET acts the same as the n-channel JFET, except the polarities i and currents are reversed.

Slide 13 P-Channel JFET Characteristics As VGS increases more positively: the depletion zone increases I D decreases (I D < I DSS ) eventually I D = 0A Also note that at high levels of VDS the JFET reaches a breakdown situation. ID increases uncontrollably if V DS > V DSmax.

Slide 14 JFET Symbols

Slide 15 Transfer Characteristics The transfer characteristic of input-to-output is not as straight forward in a JFET as it was in a BJT. In a BJT, β indicated the relationship between I B (input) and I C (output). In a JFET, the relationship of V GS (input) and I D (output) is a little more complicated: I V V GS 2 D = IDSS(1 ) P [Formula 5.3]

Slide 16 Transfer Curve From this graph it is easy to determine the value of I D for a given value of V GS.

Slide 17 Plotting the Transfer Curve Ui Using I DSS and dv Vp (V GS(off) ) values found in a specification sheet, the Transfer Curve can be plotted using these 3 steps: Step 1: I V V GS 2 D = IDSS(1 ) VP [Formula 5.3] Solving for V GS = 0V: ID = IDSS V 0V [Formula 5.4] GS= Step 2: I V V GS 2 D = IDSS(1 ) P [Formula 5.3] Solving for V GS = Vp (V GS(off) ): D [Formula 5.5] I = 0A V GS = V P Step 3: Solving for V GS = 0V to Vp: VGS 2 ID = IDSS(1 ) VP [Formula 5.3]

Slide 18 Specification Sheet (JFETs)

Slide 19 Case Construction and Terminal Identification This information is also available on the specification sheet.

Slide 20 Testing JFET a. Curve Tracer This will display the ID versus VDS graph for various levels of VGS. b. Specialized FET Testers These will indicate IDSS for JFETs.

Slide 21 MOSFETs MOSFETs have characteristics similar to JFETs and additional characteristics that make then very useful. There are 2 types: Depletion-Type MOSFET Enhancement-Type MOSFET

Slide 22 Depletion-Type MOSFET Construction The Drain (D) and Source (S) connect to the to n-doped regions. These N-doped regions are connected via an n-channel. This n-channel is connected to the Gate (G) via a thin insulating layer of SiO 2. The n-doped material lies on a p-doped substrate that may have an additional terminal connection called SS.

Slide 23 Basic Operation A Depletion MOSFET can operate in two modes: Depletion or Enhancement mode.

Slide 24 Depletion-type MOSFET in Depletion Mode Depletion mode The characteristics are similar to the JFET. When V GS = 0V, I D = I DSS When V GS < 0V, I D < I DSS The formula used to plot the Transfer Curve still applies: I V V GS 2 D = IDSS(1 ) P [Formula 5.3]

Slide 25 Depletion-type MOSFET in Enhancement Mode Enhancement mode V GS > 0V, I D increases above I DSS The formula used to plot the VGS 2 Transfer Curve still applies: ID = IDSS(1 ) [Formula 5.3] VP (note that VGS is now a positive polarity)

Slide 26 p-channel Depletion-Type MOSFET The p-channel Depletion-type MOSFET is similar il to the n-channel except that the voltage polarities and current directions are reversed.

Slide 27 Symbols

Slide 28 Specification Sheet

Slide 29 Enhancement-Type MOSFET Construction The Drain (D) and Source (S) connect to the to n-doped regions. These n-doped regions are connected via an n-channel. The Gate (G) connects to the p-doped substrate via a thin insulating i layer of SiO 2. There is no channel. The n-doped d material lies on a p-doped d substrate that may have an additional terminal connection called SS.

Slide 30 Basic Operation The Enhancement-type MOSFET only operates in the enhancement mode. V GS is always positive As V GS increases, I D increases But if V GS is kept constant and V DS is increased, then I D saturates (I DSS ) The saturation level, V DSsat is reached. V = V V [Formula 5.12] Dsat GS T

Slide 31 Transfer Curve 2 To determine I D given V GS : I D = k( VGS VT ) [Formula 5.13] where V T = threshold voltage or voltage at which the MOSFET turns on. k = constant t found in the specification sheet k can also be determined by using values at a specific point and the formula: ID(on) [Formula 5.14] V DSsat can also be calculated: k = (V V Dsat GS(ON) = V GS V T V T ) 2 [Formula 5.12]

Slide 32 p-channel Enhancement-Type MOSFETs The p-channel Enhancement-type MOSFET is similar to the n-channel except that the voltage polarities and current directions are reversed.

Slide 33 Symbols

Slide 34 Specification Sheet

Slide 35 MOSFET Handling MOSFETs are very static sensitive. Because of the very thin SiO 2 layer between the external terminals and the layers of the device, any small electrical discharge can stablish an unwanted conduction. Protection: Always transport in a static sensitive bag Always wear a static strap when handling MOSFETS Apply voltage limiting devices between the Gate and Source, such as back-toback Zeners to limit any transient voltage.

Slide 36 VMOS VMOS Vertical MOSFET increases the surface area of the device. Advantage: This allows the device to handle higher currents by providing it more surface area to dissipate the heat. VMOSs also have faster switching times.

Slide 37 CMOS CMOS Complementary MOSFET p-channel and n-channel MOSFET on the same substrate. Advantage: Useful in logic circuit designs Higher input impedance Faster switching speeds Lower operating power levels

Slide 38 Summary Table