America Joural of Applied cieces 4 (10): 79-799, 007 N 1546-99 007 ciece Publicatios orrespodig Author: A Bipolar ockcroft-walto Voltage Multiplier for Gas Lasers hahid qbal ad Rosli Besar Faculty of Egieerig ad Techology Multimedia Uiversity, Jala Ayer Keroh Lama, 75450 Melaka, Malaysia Abstract: A bipolar ockcroft-walto Voltage Multiplier (WVM) is proposed as a attractive alterative to the symmetrical ockcroft-walto voltage multiplier for cotiuous wave gas lasers (e.g. carbo dioxide gas laser). The proposed WVM formed by combiig positive ad egative voltage multipliers cosistig of equal umber of stages ad drivig i parallel by a ac voltage source. The proposed voltage multiplier eeds oly oe ac power source, therefore there was o eed of ceter taped high voltage trasformer, ulike symmetrical voltage multiplier which require ceter-tape trasformer. t possess iherit ability of cacellatio of fudametal ad higher order odd harmoics of ripple compoets, ulike the symmetrical WVM which may geerate odd harmoic of ripple i case of ay asymmetry of drivig voltage. additio to this the proposed voltage multiplier has faster trasiet rise ad less voltage drop as compared symmetrical WVM. The experimetal ad simulatio results are preseted to show the effectiveess of proposed voltage multiplier. Key words: Voltage multiplier, asymmetry of drivig voltage, fudametal harmoics, voltage ripple NTRODUTON Although ockcroft-walto voltage multiplier (WVM) circuit was developed log time ago i 19, it is still widely used i may high-voltage low-curret applicatios such as lasers, accelerators, ultra-high voltage electro microscopes, ad x-ray power geerators [1-6] etc. The origial WVM circuit was of half-wave (asymmetrical) type ad it has large output voltage ripple ad voltage drop [1-5]. A umber of modificatios of the origial WVM circuit have bee proposed ad applied to reduce steady state voltage drop ad voltage ripple [7-8]. A symmetrical WVM which is a improved form of origial WVM is presetly more popular ad is widely used i most of the above metioed applicatio. t has sigificatly smaller output voltage ripple ad voltage drop as compared to origial WVM [9-11]. This is because the symmetrical structure of symmetrical WVM cacels out the fudametal harmoic of ripples caused by drivig voltage ad stray capacitace. Thus the load geerated secod order harmoic is the major ripple compoet i the dc output of symmetrical WVM. The secod ad higher order eve harmoics of ripples are proportioal to load curret ad ca be miimized by choosig larger size of smoothig colum capacitors [9-1]. However the circuit asymmetry, especially the asymmetry of the drivig voltage may deteriorate the cacellatio effect ad give rise to geeratio of fudametal ad higher order odd harmoic of ripples [1-1]. The fudametal harmoic of ripples icreases with the icrease i the asymmetry of drivig voltage ad i case of low load curret it may domiate over the secod harmoic. This is due to reaso that at lower load curret the peak to peak value of load geerated secod harmoic of ripples would be smaller tha the fudametal harmoic. The fudametal harmoic compoet was foud to be domiat i some lower load curret applicatio such as i some electro microscopes ad accelerators where symmetrical WVM is used as high voltage geerator [1-1]. imilarly the fudametal harmoics also effects the quality of output laser beam of cotiuous wave carbo dioxide gas laser. To overcome this problem of asymmetry of drivig voltage ad to get output voltage free from fudametal ad higher order odd harmoics we have proposed a bipolar WVM. The proposed WVM has itrisic ability to cacel the fudametal ad odd harmoic of ripples caused by drivig voltage. additio to this the proposed voltage multiplier has may advatages over the symmetrical WVM. These iclude smaller size, light weight, less compoet couts, easier implemetatio, faster trasiet respose ad smaller voltage drop as compared to symmetrical WVM. hahid qbal, Faculty of Egieerig ad Techology, Multimedia Uiversity, Jala Ayer Keroh Lama, 75450 Melaka, Malaysia 79
Am. J. Applied ci., 4 (10): 79-799, 007 ircuit Descriptio ad Priciple of Operatio: Figure 1 shows the circuit diagram of proposed -stage bipolar ockcroft-walto voltage multiplier. t cosists of a p-stage positive ad q-stage egative ockcroft- Walto voltage multipliers, where as p = q = / ad p + q =, here is the total umber of stages of proposed bipolar WVM. The two voltage multipliers are coected i parallel to the secodary of high voltage trasformer whose primary is drive by a voltage source V ( t) = V si( ωt). The load is coected betwee the output termial of positive WVM ad egative WVM as show i the Fig. 1. Therefore voltage V across the load is sum of the output voltage of positive voltage multiplier ( V ab ) ad egative voltage multiplier ( V bc ). The operatio of proposed bipolar WVM ca be explaied as; whe the iput voltage V swigs positively, the diodes b b b D1 D D p, of positive voltage multiplier ad a a the diodes D1, D Dq of egative voltage multiplier turs o. Thus durig this iterval the smoothig colum ( 1,, p ) of positive voltage multiplier is charged ad smoothig colum is discharged. imilarly as the iput ac voltage swigs a a a egatively the the diodes D1, D D p of positive voltage multiplier ad diodes b b b D1 D Dq, of egative voltage multiplier turs ON. Durig this iterval smoothig colum of positive voltage multiplier is discharged ad that of positive voltage multiplier is charged. Now as the smoothig colums of two voltage multiplier charges i alterative cycles therefore the frequecy of ripple i the dc output V is twice the iput ac voltage frequecy. Output voltage ripple: There are two types of ripple compoets that exist i the idividual output of both positive ad egative voltage multiplier. The first type of ripple compoet is of siusoidal shape ad is produced by currets which circulate i the series-shut capacitors. This type of ripple compoet is completely cacelled as the output of positive ad egative voltage multiplier are added together. For aalytical proof let us suppose that is the capacitace across each rectifier ad all capacitors used i voltage multiplier are equal (i.e. ' s = ' s ). The ripple i the dc output of p q = a positive voltage multiplier due to circulatig currets i the series-shut capacitors is give by [1]; sih δ ab V ( p ) VF = cosh( p ) sih( ) (1) imilarly the ripple due to circulatig currets i the dc output of egative voltage multiplier is give by; sih bc V ( q ) δ VF = () cosh(q ) sih( ) Here egative sig is due to the reaso that there exists a phase differece of 180 betwee the output ripple compoets of positive ad egative voltage multiplier. Now summig equatio (1) ad () for fidig total ripple harmoic due to circulatig currets i the dc output V of the proposed bipolar voltage multiplier we have; F V = cosh( p V cosh(q sih sih ( q ) sih( Puttig p = q = / we have; F ( p ) sih( ) ) V sih ( = cosh( )sih( V sih ( cosh( )sih( ) ) ) ) ) = 0 ) () This proves that ripple compoet due circulatig currets are cacelled as the output of positive ad egative voltage multipliers are added together. The cacellatio of this kid of ripple compoet occurs because of the phase differece as the outputs of positive ad egative voltage multipliers are added together. Thus the output of proposed bipolar WVM is free from this kid of ripple compoet. Therefore the ripple due to circulatig currets are completely abset i the dc output of proposed voltage multiplier. The secod type of ripple compoet is due to periodic chargig ad dischargig of smoothig colum capacitors. The smoothig colum capacitors of both positive ad egative voltage multiplier are discharged by load curret ad are recharged to peak value oce every cycle. However as the chargig of smoothig colum of positive voltage multiplier occurs whe iput 794
Am. J. Applied ci., 4 (10): 79-799, 007 Fig. 1: Proposed -stage bipolar ockcroft-walto voltage multiplier Fig. : Typical steady state waveform of proposed bipolar WVM voltage V swigs positively ad that of egative voltage multiplier whe the iput voltage V swigs egatively as show i the key steady state waveform of the Fig.. Therefore the ripple i the resultig output V of proposed voltage multiplier is of secod order of the drive sigal frequecy. As a result the 795 fudametal ad higher order odd harmoic compoets of load curret geerated voltage ripple are also cacelled ad the dc output of proposed bipolar voltage multiplier cotais oly secod ad higher order eve harmoics with secod harmoic beig the most sigificat. To estimate the total output ripple voltage let us suppose that Q = T = f is the charge trasferred to load per cycle. This charge is supplied by the series coected capacitors of smoothig colum ( 1,, p ) ad ( 1,, q ) of positive ad egative voltage multipliers. The smoothig colum ( 1,, p ) is charged to peak value by respective oscillatig colums durig time iterval t 1 ad the smoothig colum ( 1,, q ) is charged to peak value durig time iterval t. Now to calculate the peak to peak voltage ripple let us cosider the chargig time iterval t 1. this iterval the capacitors of smoothig colum of positive voltage multiplier are charged. The chage or ripple δ Vab i the dc output of positive voltage multiplier due to chargig of smoothig colum capacitor after beig discharged by load curret is give by;
pq ( p 1) Q Q Q ab = + + + + p p 1 1 Now as i time iterval t 1 the capacitors of smoothig colum of egative voltage multiplier trasfer charge to oscillatig colum capacitors, therefore the output voltage of the egative voltage multiplier are reduced i the iterval. The ripple δ Vbc that results due to loss of charge i time iterval t 1 by smoothig colum capacitors of egative voltage multiplier is give by; q 1) Q ( q ) Q Q 0 bc = + + + + q q 1 1 The egative sig here idicates that the chage i output voltage is egative. Now summig δ Vab ad δ V bc for total ripple δ V i the dc output V we have; pq ( p 1) Q Q Q = + + + + p p 1 1 q 1) Q ( q ) Q Q 0 + + + + q q 1 1 As p = q = / ad assumig, ' s = ' s ; Am. J. Applied ci., 4 (10): 79-799, 007 p q = Q ( 1) Q Q Q = + + + + / 1) Q ( / ) Q Q 0 + + + + Or 1 Q ( 1) Q Q Q = + + + + / 1) Q ( / ) Q Q 0 + + + + After cacelig similar terms we have; Q δ V = = (4) f This result is similar to that of symmetrical ockcroft- Walto voltage multiplier. o the peak to peak output voltage ripple of proposed bipolar voltage multiplier is equal to symmetrical WVM. However as there is oly sigle drivig ac voltage, therefore there is o fudametal ripple compoet due to asymmetry of drivig voltage. This is the advatage over symmetrical WVM. Output voltage drop: The output voltage drop of proposed bipolar WVM is give by; 796 Vtotal = Vab + Vbc (5) Where, Vbc ad Vbc is the voltage drop o load of positive ad egative voltage multiplier respectively ad is give by; V ab = p p p + f 6 (6) ad V bc = q q q + f 6 (7) ubstitutig p = q = / i equatio (6) & (7), we get; V ab = + f 1 8 1 (8) V bc = + f 1 8 1 (9) Puttig equatios (8) ad (9) i (5), we have; V total = + f 6 4 6 (10) Equatio (10) shows that proposed bipolar WVM has slightly smaller curret depedet voltage drop, therefore it has better regulatio as compared to symmetrical WVM. Average output voltage: The average output voltage is calculated as; V ( av) = ( Vab + Vbc ) Vtotal V ( av) = ( V + V ) + f 6 4 6 f 4 ( ) = V av V + + (11) f 6 4 1 Equatio (10) ad (11) gives the voltage drop o load ad average output voltage of proposed bipolar WVM respectively. Table 1 compares the calculated voltage ripple δ V, average voltage-drop Vav ad mea output voltage V (av) of the proposed bipolar voltage multiplier with the correspodig values for the covetioal asymmetrical WVM ad symmetrical WVM. The compariso shows that the proposed WVM has smaller voltage drop ad voltage ripple tha the covetioal half-wave WVM. t has slightly
Am. J. Applied ci., 4 (10): 79-799, 007 Table 1: ompariso betwee various voltage multiplier circuits V (av) V ) (δ V) Asymmetrical WVM ymmetrical WVM Proposed bipolar WVM V (max) + + f V (max) + + f 6 4 V (max) + + f 6 4 1 ( av + + f + + f 6 4 + + f 6 4 1 ( + 1) f f f smaller voltage drop tha symmetrical WVM ad equal voltage ripple. additio to above advatage the proposed bipolar voltage multiplier also has faster trasiet respose. This is because the two voltage multipliers which cosist of half the total umber of stages are drive i parallel. The umber of stage coected i series is reduced to half ad therefore the time required to traverse the series coected capacitors is reduced. As trasiet rise time of the voltage multiplier circuit depeds upo the umber of stages coected i series. Features Of Proposed Bipolar WVM: The proposed bipolar voltage multiplier circuit has may advatages over the symmetrical voltage multiplier such as: 1. it require oly oe secodary widig of high voltage trasformer therefore the size ad weight of high voltage trasformer is reduced ad the costructio becomes easier. the umber of capacitor ad diodes required are approximately half to that of symmetrical voltage multiplier. For example to implemet a symmetrical WVM we eed 16 diodes ad 1 capacitors, where as we eed oly 8 diodes ad 8 capacitors to implemet a 4-stage proposed bipolar WVM.. it has faster trasiet respose as compared to symmetrical voltage multiplier 4. the fudametal ad higher order odd harmoic of ripple is ot preset i the output voltage ulike symmetrical whichmay geerate fudametal harmoic due to ay asymmetry of drivig voltage 5. the fudametal ad higher order odd harmoic of ripple is ot preset i the output voltage ulike 797 REULT AND DUON The effectiveess of the proposed techique is verified o laboratory prototype of Fig. 1. The specificatios of the experimetal prototypes are as follows: the umber of voltage multiplier stages: = 4, size of voltage multiplier capacitors: R = L = = 10F, output load resistace: R L = 68kΩ, operatig frequecy: f = 9kHz, iput drivig voltage: V (max) = 40V. order to compare the performace a laboratory prototype of symmetrical WVM was also built with same specificatios. Fig. shows the simulated iput ad output voltage waveforms of proposed bipolar WVM. These simulated waveforms are exactly similar to key steady state waveforms of Fig.. The ripples cotaied i the idividual dc outputs V ab of positive WVM ad V bc of egative WVM have same frequecy as that of the iput drivig voltage. However the frequecy of the ripples cotaied i the dc output V of proposed bipolar WVM is of the secod order of the iput drivig voltage frequecy. This cofirms that the fudametal ripple harmoics is abset i the dc output of proposed bipolar WVM. Fig. 4 ad 5 shows the experimetal ad simulated output voltage waveform of proposed bipolar WVM ad symmetrical WVM durig start up process for equal load resistace respectively. The trasiet rise time of output voltage of proposed bipolar WVM is small as compared to symmetrical WVM. The output voltage of proposed bipolar WVM is also larger tha symmetrical WVM. This proves that the proposed bipolar WVM has faster dyamic respose ad smaller curret depedet voltage drop as compared to symmetrical WVM. Figure 6 ad 7 shows the experimetal ad simulated waveforms of output
Am. J. Applied ci., 4 (10): 79-799, 007 voltage ripple of both proposed bipolar voltage multiplier ad symmetrical voltage multiplier. Both experimetal ad simulatio results are well i agreemet with each other. The frequecy of output voltage ripple of proposed bipolar WVM ad that of the symmetrical WVM is of the secod order of the drivig sigal frequecy. The peak to peak value of output ripple of proposed bipolar WVM is slightly larger tha the symmetrical WVM. This is due to reaso that the output voltage of proposed bipolar WVM is larger tha the symmetrical WVM. 194V 19V 190V 188V 186V 106V 10V 98V 94V 90V 86V 40V 0V EL>> -40V 1.95ms V ο V ab V 1.96ms V bc Time 1.98ms.00ms Fig. : imulated iput ad output voltage waveforms of proposed bipolar WVM i steady state 00V 100V 0V 00V 100V V o(proposed W V M ) 0V 0s 0.5ms 1.0ms V o(ym m etrical W V M ) Time Fig. 5: imulated output voltage waveforms of proposed WVM ad symmetrical WVM durig start-up process Fig. 6: Experimetal steady state waveforms of output voltage of proposed bipolar WVM ad symmetrical WVM Fig. 7: imulated steady state waveforms of output voltage of proposed bipolar ad symmetrical WVM Fig. 4: Experimetal output voltage waveforms of proposed WVM ad symmetrical WVM durig start-up process ONLUON A bipolar WVM as a attractive alterative to the symmetrical ockcroft-walto voltage multiplier 798
Am. J. Applied ci., 4 (10): 79-799, 007 for cotiuous wave gas lasers has bee proposed i this paper. The proposed bipolar WVM has bee show to have superior performace over symmetrical WVM. t require oly oe ac power source, therefore there is o eed of ceter taped high voltage trasformer, ulike symmetrical voltage multiplier which require ceter-tape trasformer. t possess iherit ability of cacellatio of fudametal ad higher order odd harmoics of ripple compoets, ulike the symmetrical WVM which may geerate odd harmoic of ripple i case of ay asymmetry of drivig voltage. additio to this the proposed voltage multiplier has faster trasiet rise ad less voltage drop as compared symmetrical WVM. The experimetal ad simulatio results are preseted to show the effectiveess of proposed voltage multiplier. REFERENE 1. M. M. Weier, 1968. Aalysis of ockcroft- Walto voltage multipliers with a arbitrary umber of stages. Joural of Review of cietific strumets, vol. 40: 0-.. M. D. Bellar, E. H. Wataabe, ad A.. Mesquita, 199. Aalysis of the dyamic ad steady-state performace of ockcroft-walto cascade rectifier. EEE Tras. Power Electroics, vol. 7: 56-54.. J.. Brugler, 1971. Theoretical performace of voltage multiplier circuits. EEE J. olid-tate ircuits, vol. -6, o. : 1-15. 4. P. M. Li, ad L. O. hua, 1977. Topological geeratio ad aalysis of voltage multiplier circuits. EEE Tras. o ircuits ad ystems, vol. A-4, o. 10: 517-50. 5. L. Malesai, ad R. Piova, 199. Theoretical performace of the capacitor diode voltage multiplier fed by a curret source. EEE Trasactio o Power Electroics, vol. 8: 147-155. 6. H. Zhag ad A. Takaoka, 1994. Efficiet compesatio method for reducig ripple of ockcroft-walto geerator i a ultrahigh-voltage electro microscope. Joural of Rev. ci. strum. vol. 65: 194-198. 7. E. Everhart ad P. Lorrai, 195. The ockcroft- Walto Voltage Multiplyig ircuit. Joural of Rev. ci. strum. vol. 4: 1-6. 8. W. Goebel, 1969. A ew modificatio of the ockcroft-walto voltage multiplier circuit. J. Nuclear strumets ad Methods, vol. 67, o.: 1-6. 9.. qbal, 005. A three-phase symmetrical multistage voltage multiplier. EEE Power Electro. Lett., vol., o. 1: 0-. 10. hahid qbal, G. K. igh, R. Besar ad G. Muhammad, 006. A cascaded three-phase symmetrical multistage voltage multiplier. Joural of strumetatio, vol. 1: T10001. 11. J. u, X. Dig, M. Nakaoka ad H. Takao, 000. eries resoat Z-PFM D-D coverter with multistage rectified voltage multiplier ad dualmode PFM cotrol scheme for medical use highvoltage X-ray power geerator. EE Proceedig of Electrical Power Applicatios, vol. 147, No. 6: 57-54. 1. H. Zhag ad A. Takaoka, 1996. Fudametal harmoic of ripples i symmetrical ockcroft- Walto cascade rectifyig circuit. Joural of Rev. ci. strum. vol. 67: 6-7. 1. H. Zhag ad A. Takaoka, 1994. Ripple due to asymmetry i symmetrical ockcroft-walto cascade rectifier circuit. Joural of Rev. ci. strum. vol. 65: 864-865. 799