OTA-output buffer 1
According to the types of loads, the driving capability of the output stages differs. For switched capacitor circuits which have high impedance capacitive loads, class A output stage isagood choice For other applications, especially when the amplifier needs to drive off chip low resistive or high capacitive load, like earphone, class B or class AB output stage has to be utilized to have a large driving capability, and at the same time, a small quiescent current to save power especially in battery operated equipment. The output stage usually consumes most of the power of the amplifier in such cases. For low voltage designs, a rail-to-rail output swing is desirable to efficiently utilize the power supply voltage. Common-drain voltage follower output stage (Fig. (a)) is rarely used in low voltage design due to its small output voltage swing as a result of stacking of V GS,P and V GS,N. Instead, we have to use common source class AB configurations (Fig. (b)). 2
CMOS inverter-common Source Output Stages For a low-resistor load, a low output impedance is required. The source follower is the only simple transistor t stage which h provides this output t resistance. However, its DC current handling is not sufficient. For higher output voltages, we would need higher biasing currents as well. This would lead to an excessive power consumption. We now need a transistor circuit which can deliver large currents only when needed, but with a low quiescent biasing current to lower the power consumption as much as possible. Simple CMOS class-ab amplifier: The main disadvantage of this circuit is that its two VGS s are between supply voltage and ground. As a consequence, the quiescent current depends on the supply voltage. 3
Large Output Current Buffer-Common Source class AB In the case where the load consists of a large capacitor, the ability to sink and source a large current is much more important than reducing the output resistance. Consequently, the common-source, push-pull is ideal if the quiescent current can be controlled. If W4/L4 = W9/L9 and W3/L3 = W8/L8, then the quiescent currents in M1 and M2 can be determined by the following relationship: W / L1 W / L2 I1 I2 Ib Ib W / L W / L 7 10 When Vin is increased, M6 turns off M2 and turns on M1 to source current. Similarly, when Vin is decreased, M5 turns off M1 and turns on M2 to sink current. 4
CMOS amplifier with a class AB input stage Using the square-law model for MOS devices in the saturation region, the drain currents are given by Applying Kirchhoff s voltage law on the left and right sides of the transconductor, we have The transfer characteristic ti of the differential stage is plotted in the next figure. The corresponding transconductance is The transistors remain in the saturation region provided that 5
Due to the biasing condition realized by source followers T5 T8, a current can flow through the input stage even for zero differential input. Given an increase in the voltage on the positive input and a corresponding decrease on the negative input, the drain currents of T1 and T4, and the ones of T2 and T3 increase and decrease from their initial values, as a result of a rise and reduction of their gate-source voltages, respectively. That is, the current in one side of the differential stage increases monotonically with the applied voltage and is limited by the power supply level, while the one in the otherside decreases until a transistor turns off. The input currents are then directed to the output branches by current mirrors. The cascode transistors, T17 T20, are used to increase the amplifier gain. The conflicting requirements of high output current during the slewing period and large output swing during the settling are met by dynamically biasing the gates of cascode transistors so that the common-source transistors T13 T16 remain in the saturation region. The common-mode feedback is realized by controlling the bias current of T29 and T30. Transistors T31 and T32 are connected to the bias voltage, VB, in order to deliver constant currents. 6
Cross-coupled transistor based Fully Differential Op amp 7
Complementary Common Source Output Stage Independent loop is used to set each floating voltage required for the biasing of the output transistor. In the class AB output stage implementation shown in Figure (b), the common-source connected output transistors, T1 and T2, are driven by in-phase input signals. The quiescent current flowing through the output transistors is determined by two independent translinear loops. Let the transistors of the same channel type be designed with identical threshold voltages and mobility parameters. Using Kirchhoff s voltage law for the loop including T1,T4, T7, and T8, we obtain 8
Based on the square law characteristic of transistors, the current I1 can be written as Considering the loop formed by T2, T3, T5, and T6, the voltage equation is of the form It can then be shown that To proceed further, we assume that When the output current I0 is set to zero, each of the currents I1 and I2 is reduced to the quiescent current, IQ, flowing through the transistors T1 and T2. Hence, The maximum value of the current I1 is obtained when T4 is forced to operate in the cutoff region, that is, V SG4 V Tp, and the overall current 2I B1 flows through T3. As a result, 9
The current I2 is reduced to the minimum value given by Similarly, when the current I1 becomes equal to its minimum value, due to the fact that T3 is forced to operate in the cutoff region, that is, V GS3 V Tn, the overall current 2I B1 flows through T4. The current I2 is then set to its maximum value. Frequency compensation by using C gs, C gd and C gb Similar to conventional two-stage operational amplifiers, Miller compensation capacitors are used to stabilize the operation of the op amp in closed loop operation. The compensation capacitor is placed across the complementary output gain stage, and the dominant pole frequency of the overall amplifier will then be g mi p gm0rlcc where g mi is the input device transconductance, MA3 or MA4, and g m0 is the output device transconductance MA1 or MA2. 10
Rail to rail operational amplifier schematic: 11
Low voltage class AB output stage In general, the minimum supply voltage is limited by the output stage, which uses transistors operating with sufficiently high gate-source voltages in order to drive high output currents. To reduce the minimum value of the supply voltage to the sum of one gate source voltage and two saturation voltages, the gate voltages of the output transistors T1 and T2aresetbythe folded mesh loop consisting of T3 T6, which, together with the minimum current selector realized by T7 T10, also regulates the minimum i current flowing throughh the output t transistors. 12
The transistors T12, T4, T6, and T11 form a translinear loop, which defines the current IREF. Applying Kirchhoff s voltage law around this loop gives Hence, When K n4 =K n6, the expression of the current I REF is reduced to 13
For the loop including transistors T1, T10, and T9, Kirchhoff s voltage law equation can be written as Because V GS2 = V GS7,wehave I D7 = I 2 = I D8. Using the fact thatt we obtain Assuming that I 1 =I 2 =I Q and K p1 =K p8, it can be deduced that where I Q is the quiescent current flowing through the output transistors. During normal operation, the transistor T9 operates in the linear region, where its drain current is a function of both the source-gate voltage set by the transistor t T8 and the sourcedrain voltage adjusted via the transistor T10. 14
The source-drain voltage of the transistor T9, or the source voltage of the transistor T10, can then be maintained sufficiently low such that the variations in the current I1 can be tracked by the transistor t T10. The transistor T7, which operates with the same gate-source voltage as the transistor T2, is used to detect the current I2. The minimum selector circuit T7 T10 then evaluates the magnitudes of the currents I1 and I2 to help set a minimum current flowing through each of the output transistorsasafunctionof the current I REF. However, as the drain current of the transistor T1 increases such that its source-gate voltage becomes sufficiently i highh to provide enough headroom for the operation of T9 in the saturation ti region, the transistors T8 T10 realize a cascoded current mirror. When the current I2 reaches its minimum value, I Q /2, the maximum value of the current I1 is 2I Q. With V SD9 =V SG9 V Tp and V SG9 =V SG10,V SG1 =2V SG9 and the drain current of T9 is equal to I Q /2. Because V SG8 =V SG9, the bias current of the transistor T7 is also set to I Q /2. On the other hand, an increase in the current I2 produces an augmentation ti of the current flowing throughh T7 and T8, and a decrease in the current I1 leading to a reduction in the source-gate voltage of the transistor T1. The source-gate voltage of the transistor T1 can then be reduced until the source-drain voltage of the transistor T9 becomes negligible. Hence, V SG1 V SG10 and the current I1 takes the minimum value I Q /2, while the current I2 is maximum. It should be noted that the stability can be affected by poles associated with the folded mesh loop, the current mirror T8 T9 and cascode transistor t T10. 15
Low-voltage compact op-amp with PMOS input stage and folded mesh with simple minimum selector (PMOS). 16
Use of the BJT in Buffered Op Amps Substrate BJTs Illustration of an NPN substrate BJT available in a p-well CMOS technology: Comments: gm of the BJT is larger than the FET so that the output resistance w/o feedback is lower Collector current will be flowing in the substrate Current is required to drive the BJT Only an NPN or a PNP bipolar transistor is available 17
A Lateral Bipolar Transistor n-well CMOS technology: It is desirable to have the lateral collector current much larger than the vertical collector current. Triple well technology allows the current of the vertical collector to avoid flowing in the substrate. Lateral BJT generally has good matching. A Field-Aided Lateral BJT: Use minimum channel length to enhance beta, ßF 50 to 100 depending on the process 18
Two-Stage Op Amp with a Class-A BJT Output Buffer Stage Purpose of the M8-M9 source follower: 1) Reduce the output t resistance (includes whatever is seen from the base to ground divided by 1+βF). 2) Reduces the output load at the drains of M6 and M7 Two-Stage Folded Casode Op Amp with a Class-A BJT Output Buffer Stage 19
TSMC180: npn 5x5 F f I C 20
TSMC130: npn 5x5 F f I C 21
TSMC90: npn 5x5 F f I C 22
TSMC130: pnp 2x2 F f I C 23