AMD ATI 7970 215-0821060 TSMC 28 nm Gate Last HKMG CMOS Process Package Analysis 3685 Richmond Road, Suite 500, Ottawa, ON K2H 5B7 Canada Tel: 613-829-0414 www.chipworks.com
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Package Analysis Table of Contents 1 Overview 1.1 List of Figures 1.2 List of Tables 1.3 Company Profile 1.4 Introduction 1.5 Device Summary 1.6 Package and Die Summary 2 Device Overview 2.1 Gigabyte Technology GV-R797D5-3GD-B 3 Device Identification 3.1 Package and Die 3.2 Die 3.3 Die Features 4 7970 215-0821060 Package and Die Cross-Sectional Analysis 4.1 Location of Cross Sections 4.2 Package Structure 4.3 Package Integrated Heat Spreader 4.4 Organic PWB Metal Layers and Vias 4.5 Solder Balls and Solder Bumps 5 Materials Analysis 5.1 SEM-EDS Analysis of Package Materials 6 References 7 Statement of Measurement Uncertainty and Scope Variation About Chipworks
Overview 1-1 1 Overview 1.1 List of Figures 2 Device Overview 2.1.1 GV-R797D5-3GD-B 2.1.2 GV-R797D5-3GD-B Connectors 2.1.3 GV-R797D5-3GD-B Top 2.1.4 GV-R797D5-3GD-B Case Removed 2.1.5 GV-R797D5-3GD-B Heat Sink Removed 2.1.6 GV-R797D5-3GD-B Bottom 3 Device Identification 3.1.1 Package Top 3.1.2 Package Bottom 3.1.3 Package X-Ray 3.2.1 Die Photograph 3.2.2 Die Markings 3.3.1 Die Corner 3.3.2 Flip-Chip Solder Pad Pitch 3.3.3 Flip-Chip Solder Bump Pad 4 7970 215-0821060 Package and Die Cross-Sectional Analysis 4.1.1 Cross Sections 4.2.1 Package Cross Section Overview 4.2.2 Package PWB Edge SEM 4.2.3 Die Edge Cross Section Left-Hand Edge 4.2.4 Underfill Cross Section Left-Hand Edge 4.2.5 Die Seal SEM 4.3.1 Package IHS Thickness 4.3.2 Package IHS Plating Thickness Top 4.3.3 Package IHS Plating Thickness Bottom 4.3.4 Package IHS Attach Thickness SEM 4.4.1 Organic PWB General Structure Optical 4.4.2 Discrete Capacitor on Organic PWB 4.4.3 Organic PWB Metals 9 11 4.4.4 Organic PWB Metals 6 8 4.4.5 Through Hole Vias 4.4.6 Through Hole Via Fill 4.4.7 Organic PWB Metals 3 5 4.4.8 Organic PWB Metals 1 3 4.4.9 Minimum Observed PWB Metal 4.4.10 Stacked Vias 4.5.1 Solder Ball 4.5.2 Solder Ball SEM 4.5.3 Solder Ball Cu Die Land SEM 4.5.4 Solder Bump
Overview 1-2 4.5.5 Solder Bump SEM 4.5.6 Solder Bump Cu Die Land SEM 4.5.7 Solder Bump Organic PWB UBM Detail SEM 5 Materials Analysis 5.1.1 IHS Top Plating 5.1.2 IHS Body 5.1.3 Lid Attach 5.1.4 IHS Bottom Plating 5.1.5 Die Coat 5.1.6 Solder Bump UBM Barrier 5.1.7 Solder Bump UBM 5.1.8 Solder Bump to UBM Interface Layer 5.1.9 Body of Solder Bump 5.1.10 Solder Bump to PWB Metal Interface 5.1.11 Organic PWB Metal Interconnect 5.1.12 Die Underfill 5.1.13 Organic PWB Solder Mask 5.1.14 Organic PWB Buildup Layer Dielectric 5.1.15 Organic PWB Fiberglass Core 5.1.16 Through Hole Via Fill 5.1.17 Body of Solder Ball 1.2 List of Tables 1 Overview 1.5.1 Device Summary 1.6.1 Package Summary 1.6.2 Observed Package Metallization Horizontal Dimensions 1.6.3 Package Vertical Dimensions and Materials
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