Theoretical Analysis: and In this Lab we will implement a simple nmos current mirror and then use it instead of an ideal current source in order to supply our with the required current. MOSfets (Metal Oxide Semiconductor Field Effect Transistors) will be used for both circuit topologies. For the given Transistor Specifications (CD4007) kn = 111 ua/v 2 VT = 2 V W = 30 um L = 10 um Calculate the following 1. For Rload = 5kΩ and Iref = 20uA, what is the nominal value for the resistor R1 in order to provide an equivalent current to flow through Rload? 2. Increase VDD = -VSS = 7V and keep Rload=5kΩ. If Iref=2mA what is the nominal value for resistor R1 in order to provide an equivalent current to flow through Rload? 3. Keep VDD = -VSS = 7V and increase Rload=10kΩ. If Iref=2mA what is the nominal value for resistor R1? What is the final Iout? 4. What happens when we increase Rload? Justify. 5. What happens when we increase the supplied voltage? Justify. Figure 1. Simple 1 of 5
For the following presented in Figure 2 1. What is the maximum value of the load resistors in order to remain in the saturation region? 2. What is the single ended voltage gain of the presented topology? 3. What happens if we increase the value of the load resistors? Justify. 4. What happens if we increase the supplied voltage? Justify. 5. What happens if we increase the tail current? Justify. Figure 2. with Ideal Current Source 2 of 5
Figure 3. with Software Aided Simulations using ADS: 1. Design the schematic presented in Figure 1. 2. Validate the theoretical results you calculated in the theoretical part. Simulate again the subqueries 1-3. 1. Design the schematic presented in Figure 2. Provide a sinusoidal input signal with 2. Present plots for the output signal and input signal. 3. Calculate the voltage gain. How does it compare to the theoretical one? 4. Validate question 3-5 of the theoretical analysis. 5. Design the schematic presented in Figure 3. Provide a sinusoidal input signal with 3 of 5
6. What are the voltages in each node? 7. What is the tail current provided by the current mirror? 8. Present plots of the input and output waveforms. 9. What is the new voltage gain of this with the current mirror? 10. What happens if we alter the value of resistor R1? Justify. Lab Experiment: 1. Build the schematic presented in Figure 1. 2. Perform the same measurements you conducted in the theoretical and simulation part of this exercise. 3. Do the previous results agree with the measured ones? Justify. 1. Build the circuit presented in Figure 2. Provide a sinusoidal input signal with 2. Present plots for the output signal and input signal. 3. Calculate the voltage gain. How does it compare to the theoretical/simulated ones? Justify. 4. Design the schematic presented in Figure 3. Provide a sinusoidal input signal with 5. Measure the voltages in each node? Do they agree with the simulated ones? 6. What is the measured current the mirror provides to the? 7. Present plots of the input and output waveforms. 8. What is the new voltage gain of this with the current mirror? Is it the same as the simulated one? Justify. 9. Suggest minor changes to the current implementation in order to increase the voltage gain. 4 of 5
The connection diagram of your CD4007 IC is as follows. Figure 4. Good Luck! 5 of 5