Quad Analog Switch/ Quad Multiplexer The MC406B quad bilateral switch is constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. Each MC406B consists of four independent switches capable of controlling either digital or analog signals. The quad bilateral switch is used in signal gating, chopper, modulator, demodulator and CMOS logic implementation. Features Diode Protection on All Inputs Supply Voltage Range = 3.0 Vdc to 8 Vdc Linearized Transfer Characteristics Low Noise 2 nv/ Cycle, f.0 khz typical PinforPin Replacements for CD406B, CD4066B (Note improved transfer characteristic design causes more parasitic coupling capacitance than CD406) For Lower R ON, Use The HC406 HighSpeed CMOS Device or The MC4066B This Device Has Inputs and Outputs Which Do Not Have ESD Protection. Antistatic Precautions Must Be Taken. PbFree Packages are Available MAXIMUM RATINGS oltages Referenced to ) Symbol Parameter Value Unit DC Supply Voltage Range 0.5 to +8.0 V, Input or Output Voltage Range (DC or Transient) 0.5 to + 0.5 V I in Input Current (DC or Transient) per Control Pin ± 0 ma I SW Switch Through Current ± 25 ma P D Power Dissipation, per Package 500 mw (Note ) T A Ambient Temperature Range 55 to +25 C T stg Storage Temperature Range 65 to +50 C T L Lead Temperature (8Second Soldering) 260 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/ C From 65 C To 25 C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, and should be constrained to the range in or ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). Unused outputs must be left open. A WL, L YY, Y WW, W G PDIP4 P SUFFIX CASE 646 SOIC4 D SUFFIX CASE 75A SOEIAJ4 F SUFFIX CASE 965 4 4 4 = Assembly Location = Wafer Lot = Year = Work Week = PbFree Indicator MARKING DIAGRAMS MC406BCP AWLYYWWG 406BG AWLYWW MC406B ALYWG ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Semiconductor Components Industries, LLC, 2006 October, 2006 Rev. 7 Publication Order Number: MC406B/D
PIN ASSIGNMENT BLOCK DIAGRAM IN OUT OUT 2 IN 2 CONTROL 2 CONTROL 3 2 3 4 5 6 7 4 3 2 0 LOGIC DIAGRAM (/4 OF DEVICE SHOWN) 9 8 CONTROL CONTROL 4 IN 4 OUT 4 OUT 3 IN 3 OUT 3 CONTROL IN 5 CONTROL 2 4 IN 2 6 CONTROL 3 8 IN 3 2 CONTROL 4 IN 4 = PIN 4 = PIN 7 2 OUT 3 OUT 2 9 OUT 3 0 OUT 4 CONTROL LOGIC DIAGRAM RESTRICTIONS IN Control Switch 0 = Off = On ORDERING INFORMATION MC406BCP MC406BCPG MC406BD MC406BDG MC406BDR2 MC406BDR2G MC406BFEL Device Package Shipping PDIP4 PDIP4 (PbFree) SOIC4 SOIC4 (PbFree) SOIC4 SOIC4 (PbFree) SOEIAJ4 25 / Tape & Ammo Box 55 Units / Rail 2500 / Tape & Reel SOEIAJ4 2000 / Tape & Reel MC406BFELG (PbFree) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. 2
Î ELECTRICAL CHARACTERISTICS oltages Referenced to ) ÎÎ Î 55 C ÎÎ 25 C Î 25 C Characteristic Figure Î Symbol Vdc Min Max MinÎ Typ (2) Max Min Max Unit Input Voltage Î V IL ÎÎ Î.5 0.9 ÎÎ Vdc Control Input 0.5 0.9 5 Î.5 0.9 V IH ÎÎ ÎÎ 0 ÎÎ 3.0 2.0 8.0 Î 6.0 ÎÎ Vdc 5 3 Î Input Current Control I in 5 ± 0. ± 0.0000 ± 0. ±.0 Adc Î Input Capacitance C Control in pf ÎÎ Î ÎÎ Switch Input ÎÎ ÎÎ Î ÎÎ Switch Output Feed Through ÎÎ ÎÎ Î 0.2 ÎÎ Quiescent Current (Per Package) (3) 2,3 I DD 0 ÎÎ 0.25 0.5 0.0005 0.25 Î 0.000 0.5 ÎÎ 7.5 5 Adc 5.0 0.005.0 30 Î ON Resistance 4,5,6 R C =, R L = 0 k ) ON Ohms ÎÎ Î ÎÎ in = + Vdc) 600 Î 300 660 ÎÎ 840 in = Vdc) = Vdc 300 660 in = ± 0.25 Vdc) ÎÎ ÎÎ 600 Î 280 660 ÎÎ 840 in = + 7.5 Vdc) in = 7.5 Vdc) = 7.5 Vdc in = ± 0.25 Vdc) 7.5 360 360 Î 240 400 ÎÎ 240 400 Î 520 520 360 80 400 520 in = + 0 Vdc) in = + 0.25 Vdc) = 0 Vdc 600 600 260 660 Î 30 660 ÎÎ 840 840 in = + 5.6 Vdc) 0 600 30 660 840 Î in = + 5 Vdc) 260 400 in = + 0.25 Vdc) = 0 Vdc 360 Î 260 400 ÎÎ 520 in = + 9.3 Vdc) 5 360 300 400 520 Î ON Resistance Î R ON ÎÎ Ohms Between any 2 circuits in a common package Î C = ) in = ± Vdc, Î = Vdc) in = ± 7.5 Vdc, = 7.5 Vdc) ÎÎ 7.5 ÎÎ 5 Î 0 ÎÎ Input/Output Leakage Current Î ÎÎ Adc C = ) in = + 7.5, Î = 7.5 Vdc) 7.5 in = 7.5, = + 7.5 Vdc) ÎÎ 7.5 ÎÎ ± 0. ± 0. ± 0.005 ± 0. Î ± 0.005 ± 0. ÎÎ ±.0 ±.0 NOTE: All unused inputs must be returned to or as appropriate for the circuit application. 2. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 3. For voltage drops across the switch ( V switch ) > 600 mv ( > 300 mv at high temperature), excessive current may be drawn; i.e., the current out of the switch may contain both and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See first page of this data sheet.) Reference Figure 4. 3
Î ELECTRICAL CHARACTERISTICS (4) (C L = 50 pf, T A = 25 C) Î Characteristic Figure Symbol Vdc Min Typ Î (5) Max Unit Propagation Delay Time SS = 0 Vdc) to 7 C =, R L = 0 k ) t PLH, 5 45 ns t PHL 0 7.0 5 5 Î 6.0 2 Î Control to Output 8 t PHZ Î, ns in 0 Vdc, R L = 0 k ) t PLZ, 34 90 t PZH Î, 0 Î 20 45 Î Î t PZL Î 5 Î 5 35 Î Crosstalk, Control to Output SS = 0 Vdc) 9 C =, R in = 0 k, R out = 0 k, f =.0 khz) Î Î 30 Î mv 0 50 5 Î 00 Î Crosstalk between any two switches SS = 0 Vdc) Î Î 80 Î db (R L =.0 k, f =.0 MHz, crosstalk 20log0 Vout2 ) Noise Voltage SS = 0 Vdc) 0, C =, f = 00 Hz) Î 0 24 25 nv/ Cycle Î 5 30 C =, f = 00 khz) Î 0 2 Î 2 Î 5 5 Î Second Harmonic Distortion SS = Vdc) 0.6 % in =.77 Vdc, RMS Centered @ 0.0 Vdc, R L = 0 k, f =.0 khz) Insertion Loss C =, =.77 Vdc, 2 V SS = Vdc, RMS centered = 0.0 Vdc, f =.0 MHz) Î db Iloss 20log0 Vin ) 2.3 (R L =.0 k ) 0.2 (R L = 0 k ) ÎÎ Î 0. Î (R L = 00 k ) 0.05 (R L =.0 M ) ÎÎ Bandwidth ( 3.0 db) C =, =.77 Vdc, = Vdc, 2,3 Î BW Î MHz RMS centered @ 0.0 Vdc) (R L =.0 k ) ÎÎ Î 54 Î (R L = 0 k ) ÎÎ Î 40 Î (R L = 00 k ) 38 (R L =.0 M ) ÎÎ Î 37 Î OFF Channel Feedthrough Attenuation Î khz SS = Vdc) Vout 50dB) C =, 20 log 0 Vin ÎÎ Î 250 Î (R L =.0 k ) (R L = 0 k ) ÎÎ Î 40 Î 8 (R L = 00 k ) ÎÎ Î 2.0 Î (R L =.0 M ) 4. The formulas given are for typical characteristics only at 25 C. 5. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 4
I S V IL : is raised from until = V IL. V IL : at = V IL : I S = ±0 A with =, = or =, =. V IH : When = V IH to, the switch is ON and the R ON specifications are met. Figure. Input Voltage Test Circuit 0,000 = 5 Vdc 0 Vdc PULSE GENERATOR TO ALL 4 CIRCUITS f c I D CONTROL INPUT 0 k PD, POWER DISSIPATION ( μw) 000 00 0 T A = 25 C Vdc P D = x I D Figure 2. Quiescent Power Dissipation Test Circuit.0 k 0 k 00 k.0 M f c, FREQUENCY (Hz) 0 M Figure 3. Typical Power Dissipation per Circuit (/4 of device shown) 50 M TYPICAL R ON versus INPUT VOLTAGE RON, ON" RESISTANCE (OHMS) 700 600 500 400 300 200 00 = = Vdc = Vdc R L = 0 k T A = 25 C = = 7.5 Vdc = 7.5 Vdc RON, ON" RESISTANCE (OHMS) 700 600 500 400 300 200 00 = = 0 Vdc = 0 Vdc R L = 0 k T A = 25 C = = 5 Vdc 0 0 8.0 4.0 0 4.0 8.0 0, INPUT VOLTAGE dc) Figure 4. = V and 7.5 V 0 0 2.0 6.0 0 4 8 20, INPUT VOLTAGE dc) Figure 5. = 0 V 5
R L C L R L 20 ns 20 ns V 90% in 50% 0% t PLH t PHL 50% Figure 6. R ON Characteristics Test Circuit Figure 7. Propagation Delay Test Circuit and Waveforms R L C L V X 20 ns t PZH 0% V 90% DD 50% 0% t PHZ = 90% V x = 0 k 5 pf t PZL 90% 0% t PLZ = V x = k Figure 8. TurnOn Delay Time Test Circuit and Waveforms Figure 9. Crosstalk Test Circuit 35 = OUT IN QUANTECH MODEL 2283 OR EQUIV NOISE VOLTAGE (nv/ CYCLE) 30 25 20 5 0 0 0 = 5 Vdc 0 Vdc Vdc 00.0 k f, FREQUENCY (Hz) 0 k 00 k Figure 0. Noise Voltage Test Circuit Figure. Typical Noise Characteristics 6
2.0 TYPICAL INSERTION LOSS (db) 0 2.0 4.0 6.0 8.0 0 2 0 k R L = M AND 00 k 00 k 0 k.0 k 3.0 db (RL =.0 M ) 3.0 db (R L = 0 k ).0 M 3.0 db (R L =.0 k ) f in, INPUT FREQUENCY (Hz) 0 M 00 M + 2.5 Vdc 0.0 Vdc 2.5 Vdc R L Figure 2. Typical Insertion Loss/Bandwidth Characteristics Figure 3. Frequency Response Test Circuit ON SWITCH CONTROL SECTION OF IC V LOAD SOURCE Figure 4. V Across Switch 7
APPLICATIONS INFORMATION Figure A illustrates use of the Analog Switch. The 0to5 V Digital Control signal is used to directly control a 5 V pp analog signal. The digital control logic levels are determined by and. The voltage is the logic high voltage; the voltage is logic low. For the example, = +5 V logic high at the control inputs; = GND = 0 V logic low. The maximum analog signal level is determined by and. The analog voltage must not swing higher than or lower than. The example shows a 5 V pp signal which allows no margin at either peak. If voltage transients above and/or below are anticipated on the analog channels, external diodes (D x ) are recommended as shown in Figure B. These diodes should be small signal types able to absorb the maximum anticipated current surges during clipping. The absolute maximum potential difference between and is 8.0 V. Most parameters are specified up to 5 V which is the recommended maximum difference between and. +5 V + V +5 V 5 V pp ANALOG SIGNAL SWITCH IN SWITCH OUT 5 V pp ANALOG SIGNAL + 2.5 V EXTERNAL CMOS DIGITAL CIRCUITRY 0TO5 V DIGITAL CONTROL SIGNALS MC406B GND Figure A. Application Example D x D x SWITCH IN SWITCH OUT D x D x Figure B. External Germanium or Schottky Clipping Diodes 8
PACKAGE DIMENSIONS PDIP4 CASE 64606 ISSUE P 4 8 7 B NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. T N SEATING PLANE A INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.75 0.770 8.6 9.56 B 0.240 0.260 6.0 6.60 F L C 0.45 0.85 3.69 4.69 D 0.05 0.02 0.38 0.53 C F 0.040 0.070.02.78 G 0.00 BSC 2.54 BSC H 0.052 0.095.32 2.4 J 0.008 0.05 0.20 0.38 K 0.5 0.35 2.92 3.43 K J L 0.290 0.30 7.37 7.87 M 0 0 H G D 4 PL M N 0.05 0.039 0.38.0 0.3 (0.005) M 9
PACKAGE DIMENSIONS SOIC4 CASE 75A03 ISSUE H T SEATING PLANE G A 4 8 D 4 PL 7 B K P 7 PL C 0.25 (0.00) M T B S A S 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES R X 45 F DIM MIN MAX MIN MAX A 8.55 8.75 0.337 0.344 B 3.80 4.00 0.50 0.57 C.35.75 0.054 0.068 D 0.35 0.49 0.04 0.09 M J F 0.40.25 0.06 0.049 G.27 BSC 0.050 BSC J 0.9 0.25 0.008 0.009 K 0.0 0.25 0.004 0.009 M 0 7 0 7 P 5.80 6.20 0.228 0.244 R 0.25 0.50 0.00 0.09 SOLDERING FOOTPRINT* 4X 0.58 7X 7.04 4X.52.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 0
PACKAGE DIMENSIONS SOEIAJ4 CASE 9650 ISSUE A L E 4 8 Q E H E M 7 L Z DETAIL P D VIEW P e A c b A 0.3 (0.005) M 0.0 (0.004) NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.08). MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.05 0.08 A 0.05 0.20 0.002 0.008 b 0.35 0.50 0.04 0.020 c 0.0 0.20 0.004 0.008 D 9.90 0.50 0.390 0.43 E 5.45 0.20 0.25 e.27 BSC 0.050 BSC H E 7.40 8.20 0.29 0.323 0.50 0.50 0.85 0.020 0.033 L E.0.50 0.043 0.059 M 0 0 0 0 Q 0.70 0.90 0.028 0.035 Z.42 0.056 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: 303675275 or 8003443860 Toll Free USA/Canada Fax: 303675276 or 8003443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8002829855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 42 33 790 290 Japan Customer Focus Center Phone: 8357733850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC406B/D