ASL 1 8. 1 GHz 1 Watt Power Amplifier Features Frequency Range : 8. 1GHz. dbm Psat 14 db Power gain 27% PAE High IP3 Input Return Loss > 1 db Output Return Loss > 9 db Dual bias operation DC decoupled input and output. µm InGaAs phemt Technology Chip dimension:.2 x. x.1 mm Vg1 RFIN Vg1 Functional Diagram Vd1 Vg2 Vd1 Vg2 Vd2 RFOUT Vd2 Typical Applications RADAR Military & space LMDS, VSAT Description The ASL1 is a X-band Power amplifier with.dbm saturated output power. The PA uses 2 stages of amplification and operates in 8. 1 GHz frequency range. The PA features 14dB of gain with input and output return losses of 1 db and 9 db respectively. The PA has a high IP3 of 47dBm and 27% PAE. This feature enables it to be used in the applications requiring efficiency along with linearity. The chip operates with dual bias supply voltage.the die is fabricated using a reliable.µm InGaAs phemt technology. The Circuit grounds are provided through vias to the backside metallization. Absolute Maximum Ratings (1) Parameter Absolute Maximum Units Drain bias voltage (Vd) +1 volts Drain current (Id) A RF input power (RFin at Vd=9V) 33 dbm Operating temperature to +8 o C Storage Temperature -6 to +1 o C 1. Operation beyond these limits may cause permanent damage to the component Fax: +6 636 Page 1 of 11
ASL 1 Electrical Specifications (1) @ TA = o C, Vd1 = Vd2 = 8V, Vg1 = Vg2 = -1.1V Zo = Parameter Typ. Units Frequency Range 8. 1 GHz Gain 14 db Gain Flatness +/-. db Output Power (P1 db).4 dbm Input Return Loss 1 db Output Return Loss 9 db Saturated output power (Psat). dbm Output Third Order Intercept (IP3) 47 dbm Power Added Efficiency (PAE) 27% -- Supply Current(Idq) 2.9 A Supply Current(Idsat 2 ) 4.3 A Note: 1. Electrical specifications as measured in test fixture. 2. Idsat is the drain current corresponding to saturated output power. Fax: +6 636 Page 2 of 11
ASL 1 Test fixture data V d1 = V d2 = V d, V g1 = V g2 = -1.1V, Total Current (Idq) =2.9A, T A = o C, Continuous DC Mode Output Power P1dB & Psat (dbm) P1dB Psat 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. Output power @ Vd = 8V Fax: +6 636 Page 3 of 11
ASL 1 Test fixture data V d1 = V d2 = V d, V g1 = V g2 = -1.1V, Total Current (Idq) =2.9A, T A = o C, Continuous DC Mode Output Power P1dB & Psat (dbm) P1dB Psat 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. Output power @ Vd = 9V Fax: +6 636 Page 4 of 11
ASL 1 Test fixture data V d1=v d2=v d, V g1=v g2=-1.1v, Total Current (Idq=2.9A, Idsat=4.3A); T A= o C, DC Pulsed Mode Output Power P1dB & Psat (dbm) P1dB Psat 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. Output power at Vd = 8V; Gate Pulsed @ 1% Duty Cycle Output Power Psat P1dB & Psat (dbm) P1dB 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. Output power at Vd = 9V; Gate Pulsed @ 1% Duty Cycle Fax: +6 636 Page of 11
ASL 1 Test fixture data V d1 = V d2 = 8V, V g1 = V g2 = -1.1V, Total Current (Idq) =2.9A, T A = o C, Continuous DC Mode Return Losses S22 S11 & S22 (db) -1-1 -2 S11 - - 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. S12 (db) -2 - - -3 - -4-6 -6-7 Isolation 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. Fax: +6 636 Page 6 of 11
ASL 1 Output Power Plots (Continuous DC Mode): Output power (dbm) Output power (dbm) 4 3 2 1 1 4 3 2 1 1-1 DB(PT(PORT_2))[*,X] (L, dbm) Pgain, Pt and P.A.E DB(PGain(PORT_1,PORT_2))[*,X] (L) DB(PAE(PORT_1,PORT_2))[*,X] (R) -1-4 2 8 14 2 26 Input Power (dbm) V d1 = V d2 = 8V, V g1 = V g2 = -1.1V, Total Current (Idsat) =4A, Freq = 9.GHz, T A = o C Output power (dbm) Output power (dbm) -1 Pgain, Pt Pt and P.A.E -1 4 4-1 -4 2 8 14 2 26 4 DB(PT(PORT_2))[*,X] (L, dbm) p3 Input Power (dbm) 3 DB(PGain(PORT_1,PORT_2))[*,X] (L) 3 3 2 1 1 2 1 1-1 DB(PAE(PORT_1,PORT_2))[*,X] (R) -1-4 2 8 14 2 26 Input Power (dbm) V d1 = V d2 = 9V, V g1 = V g2 = -1.1V, Total Current (Idsat) =4A, Freq = 9.GHz, T A = o C Aelius Semiconductors Input Power Pte. (dbm) Ltd., Singapore Fax: +6 636 Page 7 of 11 p3 4 3 2 1 p1 1 p2-1 2 1 p1 1-1 4 3 2 1 1 % P.A.E % P.A.E -1-1 -1-4 2 8 14 2 26 p2 3 2 1 1 % P.A.E % P.A.E
ASL 1 Temperature data: V d1 = V d2 = 8V, V g1 = V g2 = -1.1V, Total Current (Idq) =2.9A, T A = o C, Continuous DC Mode S21 (db) 24 22 2 18 16 14 12 1 8 6 4 2 - C Gain Over Temperature C 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. 7 C P1dB Over Temperature P1dB (dbm) C 7 C - C 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. Fax: +6 636 Page 8 of 11
ASL 1 Temperature data: V d1 = V d2 = 8V, V g1 = V g2 = -1.1V, Total Current (Idq) =2.9A, T A = o C, Continuous DC Mode Psat Over Temperature C - C Psat (dbm) 7 C 8. 8.7 8.9 9.1 9.3 9. 9.7 9.9 1.1 1.3 1. Fax: +6 636 Page 9 of 11
ASL 1 Bond Pad Locations 2 3 4 6 1 7 11 1 9 8 Units: millimeters (inches) Note: 1. All RF and DC bond pads are 1µm x 1µm 2. Pad no. 1 : RF IN 3. Pad no. 3,11 : 1st stage gate voltage(vg1) 4. Pad no. 7 : RF Output. Pad no. 4,1 : 1 st stage drain voltage(vd1) 6. Pad no.,9 : 2 nd stage gate voltage(vg2) 7. Pad no. 6,8 : 2 nd stage drain voltage (Vd2) 8. All the dimensions shown above are measured taking bottom left corner as reference. Fax: +6 636 Page 1 of 11
ASL 1 Recommended Assembly Diagram Vg = -1.1V Vd = 8V 1uF 1uF.1uF.1uF.1uF.1uF 1pF 1pF 1pF 47pF Open Stub ohm line 1 mil Allumina ASTRA 21111 ohm line 1 mil Allumina 1pF 1pF 1pF 47pF.1uF.1uF.1uF.1uF 1uF 1uF Vg = -1.1V Vd = 8V Note : 1. Open stub of 4mm length, 1mm width and.mm thickness to be placed at output immediate to the chip as shown above, so as to improve output power match. 2. Two 1 mil (.4mm) bond wires of minimum length should be used for RF input and output. 3. Two 1 mil (.4mm) bond wires of minimum length should be used from chip bond pad to 1pF capacitor. 4. Input and output ohm lines are on mil RT Duroid substrate.. 1pF (Single Layer),.1uF and 1uF bypass capacitors are used as shown above. 6. The RF input & output ports are DC decoupled on-chip. 7. Proper heat sink like Copper tungsten or copper molybdenum to be used for better reliability of chip. Die attach: For Epoxy attachment, use of a two-component conductive epoxy is recommended. An epoxy fillet should be visible around the total die periphery. If Eutectic attachment is preferred, use of fluxless AuSn (8/2) 1-2 mil thick preform solder is recommended. Use of AuGe preform should be strictly avoided. Wire bonding: For DC pad connections use either ball or wedge bonds. For best RF performance, use of 1-2µm length of wedge bonds is advised. Single Ball bonds of -µm though acceptable, may cause a deviation in RF performance. GaAs MMIC devices are susceptible to Electrostatic discharge. Proper precautions should be observed during handling, assembly & testing All information and Specifications are subject to change without prior notice Fax: +6 636 Page 11 of 11