, Silicon PNP Power Transistors These devices are designed for use in power amplifier and switching circuits; excellent safe area limits. Features Complement to NPN 2N5191, 2N5192 These Devices are PbFree and are RoHS Compliant* MAXIMUM RATINGS (Note 1) Rating Symbol Value Unit CollectorEmitter Voltage CollectorBase Voltage V CEO 60 V CB 60 EmitterBase Voltage V EB 5.0 Collector Current I C 4.0 Adc Base Current I B Adc Total Device Dissipation @ T C = 25 C Derate above 25 C Operating and Storage Junction Temperature Range P D 40 320 W W/ C T J, T stg 65 to +150 C/W Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Indicates JEDEC registered data. THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC 3.12 C/W 4 AMPERE POWER TRANSISTORS PNP SILICON 60 VOLTS 1 2 3 3 BASE COLLECTOR 2, 4 1 EMITTER TO225 CASE 7709 STYLE 1 MARKING DIAGRAM YWW 2 N519xG Y WW 2N519x G = Year = Work Week = Device Code x = 4 or 5 = PbFree Package *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Device Package Shipping ORDERING INFORMATION TO225 (PbFree) TO225 (PbFree) 500 Units / Bulk 500 Units / Bulk Semiconductor Components Industries, LLC, 2013 December, 2013 Rev. 15 1 Publication Order Number: 2N5194/D
, ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted) (Note 2) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS CollectorEmitter Sustaining Voltage (Note 3) (I C = Adc, I B = 0) V CEO(sus) 60 Collector Cutoff Current (V CE = 60, I B = 0) (V CE =, I B = 0) I CEO Collector Cutoff Current (V CE = 60, V BE(off) = 1.5 ) (V CE =, V BE(off) = 1.5 ) (V CE = 60, V BE(off) = 1.5, T C = 125 C) (V CE =, V BE(off) = 1.5, T C = 125 C) I CEX Collector Cutoff Current (V CB = 60, I E = 0) (V CB =, I E = 0) Emitter Cutoff Current (V BE = 5.0, I C = 0) I CBO I EBO ON CHARACTERISTICS DC Current Gain (Note 3) (I C = 1.5 Adc, V CE = ) (I C = 4.0 Adc, V CE = ) h FE 25 20 10 7.0 100 CollectorEmitter Saturation Voltage (Note 3) (I C = 1.5 Adc, I B = 5 Adc) (I C = 4.0 Adc, I B = Adc) BaseEmitter On Voltage (Note 3) (I C = 1.5 Adc, V CE = ) V CE(sat) 0.6 1.4 V BE(on) 1.2 DYNAMIC CHARACTERISTICS CurrentGain Bandwidth Product (I C = Adc, V CE = 10, f = MHz) f T Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Indicates JEDEC registered data. 3. Pulse Test: Pulse Width 300 s, Duty Cycle %. MHz 2
, h FE, DC CURRENT GAIN (NORMALIZED) 10 7.0 5.0 3.0 T J = 150 C 25 C - 55 C V CE = V V CE = 10 V 0.004 0.007 0.01 0.03 3.0 4.0 Figure 1. DC Current Gain V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) 1.6 1.2 I C = 10 ma 100 ma A 3.0 A 0.8 0.4 0 0.07 3.0 5.0 7.0 10 20 30 50 70 100 200 300 500 I B, BASE CURRENT (ma) Figure 2. Collector Saturation Region VOLTAGE (VOLTS) 1.6 1.2 0.8 0.4 0 0.005 V BE(sat) @ I C /I B = 10 V BE @ V CE = V V CE(sat) @ I C /I B = 10 0.01 0.03 3.0 4.0 Figure 3. On Voltage, TEMPERATURE COEFFICIENTS (mv/ C) V θ + 2.5 + + 1.5 + *APPLIES FOR I C /I B h FE @ V CE T J = - 65 C to +150 C + * V C for V CE(sat) 0 - - - 1.5 V B for V BE - - 2.5 0.005 0.01 0.03 3.0 4.0 Figure 4. Temperature Coefficients 3
,, COLLECTOR CURRENT ( A) μ IC 10 3 10 2 10 1 10 0 10-1 10-2 V CE = 30 T J = 150 C 100 C REVERSE 25 C I CES 10-3 + 0.4 + + + 0 - - - - 0.4 - - 0.6 V BE, BASE-EMITTER VOLTAGE (VOLTS) FORWARD Figure 5. Collector CutOff Region R BE, EXTERNAL BASE-EMITTER RESISTANCE (OHMS) 10 7 10 6 10 5 10 4 10 3 10 2 20 I C = 2 x I CES I C I CES I C = 10 x I CES (TYPICAL I CES VALUES OBTAINED FROM FIGURE 5) 40 60 100 120 140 160 T J, JUNCTION TEMPERATURE ( C) V CE = 30 V Figure 6. Effects of BaseEmitter Resistance V BE(off) V in 0 APPROX -11 V V in TURN-ON PULSE t 2 t 1 APPROX -11 V t 3 TURN-OFF PULSE APPROX + 9.0 V V CC Figure 7. Switching Time Equivalent Test Circuit V in R B R C C jd << C eb + 4.0 V t 1 7.0 ns 100 < t 2 < 500 s t 3 < 15 ns DUTY CYCLE % SCOPE R B AND R C VARIED TO OBTAIN DESIRED CURRENT LEVELS CAPACITANCE (pf) 500 300 200 100 70 50 C eb C cb 3.0 5.0 10 20 30 40 V R, REVERSE VOLTAGE (VOLTS) Figure 8. Capacitance t, TIME ( s) μ t r @ V CC = 30 V t r @ V CC = 10 V 0.07 0.03 t d @ V BE(off) = V 0.07 3.0 4.0 Figure 9. TurnOn Time I C /I B = 10 t, TIME ( s) μ 0.07 t s t f @ V CC = 10 V t f @ V CC = 30 V 0.03 0.07 3.0 4.0 Figure 10. TurnOff Time I B1 = I B2 I C /I B = 10 t s = t s - 1/8 t f 4
, IC, COLLECTOR CURRENT (AMP) 10 5.0 T J = 150 C 5.0 ms SECONDARY BREAKDOWN LIMIT THERMAL LIMIT @ T C = 25 C BONDING WIRE LIMIT CURVES APPLY BELOW RATED V CEO 2N5194 5.0 10 20 50 100 V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 11. Rating and Thermal Data ActiveRegion Safe Operating Area dc ms 2N5195 100 s Note 1: There are two limitations on the power handling ability of a transistor; average junction temperature and second breakdown. Safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 11 is based on T J(pk) = 150 C. T C is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided T J(pk) 150 C. At highcase temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 0.07 0.03 D = 0.01 SINGLE PULSE JC(max) = 3.12 C/W 0.01 0.01 0.03 3.0 5.0 10 20 30 50 100 200 300 500 1000 t, TIME OR PULSE WIDTH (ms) Figure 12. Thermal Response DESIGN NOTE: USE OF TRANSIENT THERMAL RESISTANCE DATA t 1 P P t P 1/f P P DUTY CYCLE, D = t 1 f = t 1 tp PEAK PULSE POWER = P P Figure 13. A train of periodical power pulses can be represented by the model shown in Figure 13. Using the model and the device thermal response, the normalized effective transient thermal resistance of Figure 12 was calculated for various duty cycles. To find JC (t), multiply the value obtained from Figure 12 by the steady state value JC. Example: The 2N5193 is dissipating 50 watts under the following conditions: t 1 = ms, t p = ms. (D = ). Using Figure 12, at a pulse width of ms and D =, the reading of r(t 1, D) is 7. The peak rise in junction temperature is therefore: T = r(t) x P P x JC = 7 x 50 x 3.12 = 42.2 C 5
, PACKAGE DIMENSIONS 4 TO225 CASE 7709 ISSUE AC 1 2 3 3 2 1 FRONT VIEW BACK VIEW P Q E 1 2 3 L1 D A1 A PIN 4 BACKSIDE TAB L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. NUMBER AND SHAPE OF LUGS OPTIONAL. MILLIMETERS DIM MIN MAX A 2.40 3.00 A1 0 1.50 b 0.60 0.90 b2 1 0.88 c 9 0.63 D 10.60 11.10 E 7.40 7. e 4 2.54 L 14.50 16.63 L1 1.27 2.54 P 2.90 3.30 Q 3. 4.20 STYLE 1: PIN 1. EMITTER 2., 4. COLLECTOR 3. BASE 2X b2 2X e b c FRONT VIEW SIDE VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patentmarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 217 USA Phone: 3036752175 or 03443860 Toll Free USA/Canada Fax: 3036752176 or 03443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 02829855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81358171050 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative 2N5194/D