Analog Devices Welcomes Hittite Microwave Corporation NO CONTENT ON THE ATTACHED DOCUMENT HAS CHANGED

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Transcription:

Analog Devices Welcomes Hittite Microwave Corporation NO CONTENT ON THE ATTACHED DOCUMENT HAS CHANGED www.analog.com www.hittite.com

HMC461* Product Page Quick Links Last Content Update: 8/3/216 Comparable Parts View a parametric search of comparable parts Evaluation Kits HMC461LP3 Evaluation Board Documentation Application Notes AN-1363: Meeting Biasing Requirements of Externally Biased RF/Microwave Amplifiers with Active Bias Controllers Broadband Biasing of Amplifiers General Application Note MMIC Amplifier Biasing Procedure Application Note Thermal Management for Surface Mount Components General Application Note Data Sheet HMC461 Data Sheet Tools and Simulations HMC461 S-Parameter Reference Materials Quality Documentation Package/Assembly Qualification Test Report: 16L 3x3mm QFN Package (QTR: 3 REV: 2) Package/Assembly Qualification Test Report: LP2, LP2C, LP3, LP3B, LP3C, LP3D, LP3F, LP3G (QTR: 214-364) Package/Assembly Qualification Test Report: Plastic Encapsulated QFN (QTR: 56 REV: 2) Semiconductor Qualification Test Report: GaAs HBT-B (QTR: 213-229) Design Resources HMC461 Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints Discussions View all HMC461 EngineerZone Discussions Sample and Buy Visit the product page to see pricing options Technical Support Submit a technical question or find your regional support number * This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page does not constitute a change to the revision number of the product data sheet. This content may be frequently modified.

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Typical Applications A high linearity 1 watt amplifi er for: Multi-Carrier Systems GSM, GPRS & EDGE CDMA & W-CDMA PHS Balanced or Push-Pull Confi gurable Functional Diagram Electrical Specifications*, T A = +25 C, Vs= +5V Features +45 dbm Output IP3 (Balanced Confi guration) 12 db Gain 48% PAE @ +3.5 dbm Pout +2 dbm W-CDMA Channel Power @ -45 dbc ACP 3x3 mm QFN SMT Package General Description The HMC461LP3 & HMC461LP3E are 1.7-2.2 GHz high output IP3 GaAs InGaP Heterojunction Bipolar Transistor (HBT) dual-channel MMIC amplifi ers. The linear performance of two HMC455LP3 high IP3 drivers is offered in this single IC which can be confi gured in a balanced or push-pull amplifi er circuit. The amplifi er provides 12 db of gain and +3.5 dbm of saturated power at 48% PAE from a single +5 Vdc supply while utilizing external baluns in a balanced confi guration. The high output IP3 of +45 dbm coupled with the low VSWR of 1.2:1 make the HMC461LP3 & HMC461LP3E ideal driver amplifi ers for PCS/3G wireless infrastructures. A low cost, leadless 3x3 mm QFN surface mount package (LP3) houses the dual MMIC amplifi er IC. The LP3 provides an exposed base for excellent RF and thermal performance. Parameter Min. Typ. Max. Min. Typ. Max. Units Frequency Range 1.7-1.9 1.9-2.2 GHz Gain 1 12.5 9 12 db Gain Variation Over Temperature.12.2.12.2 db / C Input Return Loss 17 18 db Output Return Loss 2 25 db Output Power for 1dB Compression (P1dB) 26 29 26.5 29.5 dbm Saturated Output Power (Psat) 29.5 3.5 dbm Output Third Order Intercept (IP3) 41 44 42 45 dbm Noise Figure 6.5 6 db Supply Current (Icq) 3 3 ma * Specifi cations and data refl ect HMC461LP3 measured with external baluns in a balanced amplifi er confi guration optimized for 1.85-2.2 GHz per application circuit herein. - 25

Broadband Gain & Return Loss 15 Gain vs. Temperature 2 GAIN & RETURN LOSS (db) 5-5 -15 S21 S S22 GAIN (db) 17 14 8-25 1 1.5 2 2.5 3 Input Return Loss vs. Temperature RETURN LOSS (db) -5-1 -15-2 -25 1.5 1.7 1.9 2.1 2.3 2.5 P1dB vs. Temperature 33 31 Output Return Loss vs. Temperature RETURN LOSS (db) 5 1.7 1.8 1.9 2 2.1 2.2 2.3-5 -1-15 -2-25 -3 1.5 1.7 1.9 2.1 2.3 2.5 Psat vs. Temperature 33 31 P1dB (dbm) 29 27 Psat (dbm) 29 27 25 25 23 1.7 1.8 1.9 2 2.1 2.2 2.3 23 1.7 1.8 1.9 2 2.1 2.2 2.3-251

Output IP3 vs. Temperature 5 Noise Figure vs. Temperature 1 47 8 IP3 (dbm) 44 41 38 NOISE FIGURE (db) 6 4 2 Power Compression @ 1.95 GHz Pout (dbm), GAIN (db), PAE (%) 54 48 42 36 3 24 18 12 6 Pout Gain PAE -1-4 2 8 14 2 26 INPUT POWER (dbm) Reverse Isolation vs. Temperature ISOLATION (db) 35 1.7 1.8 1.9 2 2.1 2.2 2.3-5 -1-15 -2-25 -3 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 Power Compression @ 2.15 GHz Pout (dbm), GAIN (db), PAE (%) 1.7 1.8 1.9 2 2.1 2.2 2.3 54 48 42 36 3 24 18 12 6 Pout Gain PAE -1-4 2 8 14 2 26 INPUT POWER (dbm) Gain & Power vs. Supply Voltage @ 2.15 GHz Gain (db), P1dB (dbm), Psat (dbm) 32 3 28 26 24 22 2 18 16 14 12 1 Gain P1dB Psat 8 4.5 4.75 5 5.25 5.5 SUPPLY VOLTAGE (Vdc) - 252

ACPR vs. Supply Voltage @ 1.96 GHz CDMA2, 9 Channels Forward -4 ACPR vs. Supply Voltage @ 2.14 GHz W-CDMA, 64 DCPH -35 ACPR (dbc) -45-5 -55 CDMA2 Rev. 8 Frequency: 1.96 GHz Integration BW: 1.228 MHz Forward Link, SR1, 9 Channels 4.5V 5V 5.5V ACPR (dbc) -4-45 -5-55 WCDMA Frequency : 2.14 GHz Integration BW: 3.84 MHz 64 DPCH -6 Source ACPR -6 4.5V 5V 5.5V Source ACPR -65 8 1 12 14 16 18 2 22 24 Channel Output Power (dbm) * Source ACPR: All data is RSS corrected for source ACPR. Dashed lines are shown where corrected data is below source ACPR. Output IP2 vs. Temperature IP2 (dbm) 8 75 7 65 6 55 5 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5-65 8 1 12 14 16 18 2 22 24 Channel Output Power (dbm) Absolute Maximum Ratings Collector Bias Voltage (Vcc1, Vcc2) +6 Vdc RF Input Power (RFIN)(Vs = +5Vdc) +3 dbm Junction Temperature 15 C Continuous Pdiss (T = 85 C) (derate 32 mw/ C above 85 C) 2.8 W Thermal Resistance (junction to ground paddle) 31 C/W Storage Temperature -65 to +15 C Operating Temperature -4 to +85 C ELECTROSTATIC SENSITIVE DEVICE OBSERVE HANDLING PRECAUTIONS - 253

Outline Drawing Package Information NOTES: 1. LEADFRAME MATERIAL: COPPER ALLOY 2. DIMENSIONS ARE IN INCHES [MILLIMETERS] 3. LEAD SPACING TOLERANCE IS NON-CUMULATIVE 4. PAD BURR LENGTH SHALL BE.15mm MAXIMUM. PAD BURR HEIGHT SHALL BE.5mm MAXIMUM. 5. PACKAGE WARP SHALL NOT EXCEED.5mm. 6. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND. 7. REFER TO HITTITE APPLICATION NOTE FOR SUGGESTED LAND PATTERN. Part Number Package Body Material Lead Finish MSL Rating Package Marking [3] [1] 461 HMC461LP3 Low Stress Injection Molded Plastic Sn/Pb Solder MSL1 XXXX [2] 461 HMC461LP3E RoHS-compliant Low Stress Injection Molded Plastic 1% matte Sn MSL1 XXXX [1] Max peak refl ow temperature of 235 C [2] Max peak refl ow temperature of 26 C [3] 4-Digit lot number XXXX - 254

Pin Descriptions Pin Number Function Description Interface Schematic 2, 3, 5-8, 1,, 13-16 N/C This pin may be connected to RF ground. 1, 4 IN1, IN2 RF Input. This pin is AC coupled. An off chip series matching capacitor is required. 9, 12 OUT1, OUT2 RF output and DC Bias for the output stage. GND Package bottom must be connected to RF/DC ground. Recommended Application Circuit for Balanced Amplifier Configuration Recommended Component Values L1, L2 8.2 nh C1, C2 2.2 μf C5, C6 5. pf C7, C8.9 pf TL1 TL2 C3, C4 1 pf Impedance 5 Ohm 5 Ohm C7, C8.8 pf Physical Length.9.18 C9, C1 4. pf Electrical Length 9.5 19 R1, R2 13 Ohm PCB Material: 1 mil Rogers 435, Er = 3.48-255

Evaluation PCB List of Materials for Evaluation PCB 16485 [1] Item Description J1, J2 PCB Mount SMA Connector J3, J4 2 mm DC Header C1, C2 2.2 μf Capacitor, Tantalum C3, C4 1 pf Capacitor, 42 Pkg. C5, C6 5 pf Capacitor, 42 Pkg. C7, C8.8 pf Capacitor, 42 Pkg. C9, C1 4 pf Capacitor, 42 Pkg. L1, L2 8.2 nh Inductor, 42 Pkg. HMC461LP3 / HMC461LP3E U1 Power Amplifi er U2, U3 Panasonic Balun, P/N EHFFD - 1619 PCB [2] 16483 Evaluation PCB, 1 mils [1] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: Rogers 435, Er = 3.48 J3, J4 Pin Number Description 1, 2, 3 GND 4, 5, 6 Vs The circuit board used in the fi nal application should use RF circuit design techniques. Signal lines should have 5 ohm impedance while the package ground leads and exposed paddle should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation board should be mounted to an appropriate heat sink. The evaluation circuit board shown is available from Hittite upon request. - 256

Notes: - 257