Hardware Implementaton of Fuzzy Logc Controller for Trple-Lft Luo Converter N. Dhanasekar, R. Kayalvzh Abstract: Postve output Luo converters are a seres of new DC- DC step-up (boost) converters, whch were developed from prototypes usng voltage lft technque. These converters perform postve to postve DC-DC voltage ncreasng converson wth hgh power densty, hgh effcency and cheap topology n smple structure. They are dfferent from other exstng DC-DC step-up converters wth a hgh output voltage and small rpples. Trple lft LUO crcut s derved from postve output elementary Luo converter by addng the lft crcut three tmes. Due to the tme varyng and swtchng nature of the Luo converters, ther dynamc behavor becomes hghly non-lnear.the classcal control methods employed to desgn the controllers for Luo converters depend on the operatng pont so that t s very dffcult to select control parameters because of the presence of parastc elements, tme varyng loads and varable supply voltages. Conventonal controllers requre a good knowledge of the system and accurate tunng n order to obtan the desred performances. A Fuzzy Logc Controller(FLC) s a soft computng technque whch nether requres a precse mathematcal model of the system nor complex computatons. Hence n ths research work, desgn and hardware mplementaton of fuzzy logc controller have been carred out usng TMS320C242 DSP for the Trple-lft Luo converter.the expermental results are presented and analyzed under lne and load dsturbances. Keywords: Fuzzy Logc Controller, Trple-lft Luo converter, Dgtal Sgnal Processor (DSP). I. INTRODUCTION DC to DC step-up converters are wdely used n computer hardware and ndustral applcatons such as computer perpherals power supples, car auxlary power supples, servo-motor drves and medcal equpments. Because of the effect of parastc elements, the output voltage and power transfer effcency of all DC-DC converters s restrcted. The voltage lft technque s a popular method that s wdely appled n electronc crcut desgn. It can lead to mprovement of DC-DC converter characterstcs. The elementary crcut whch can perform step-down and step-up DC-DC converson. Other postve output Luo converters are derved from ths elementary crcut; they are the self-lft crcut, re-lft crcut and multple-lft crcuts (e.g. trple-lft and quadruple-lft crcuts). Tradtonal controllers of DC-DC converters are based on small sgnal model. Frequency doman based controllers depend on the system operatng ponts, characterstcs of parastc elements and load and lne changes. Snce, the fuzzy logc controller work very well for nonlnear, Revsed Verson Manuscrpt Receved on Aprl 03, 2017. N. Dhanasekar, Assocate Professor, Department of Electrcal and Electroncs Engneerng, A.V.C College of Engneerng, Mayladuthura, Inda. E-mal: n_dhanasekar@yahoo.com Dr. R. Kayalvzh, Professor, Department of Electroncs and Instrumentaton Engneerng, Annamala Unversty, Inda, E-mal: mthuvg.knr@gmal.com Tme varant and complex systems, ths research work presents fuzzy control of a Trple- Lft Luo Converter for controllng the DC output voltage. Fuzzy logc control offer stablty, robustness to large lne and load varatons and good dynamc response. Fuzzy logc control s chosen to ensure fast dynamc response wth output voltage regulaton. Hence hardware mplementaton of fuzzy logc controller for Trple-lft LUO converter has been developed. II. ANALYSIS OF TRIPLE-LIFT LUO CONVERTER The Trple- lft LUO crcut s shown n Fg.1.Swtch S s a p-channel power MOSFET devce (PMOS), and S 1 s an n- channel power MOSFET devce (NMOS). They are drven by a pulse-wdth-modulated (PWM) swtchng sgnal wth repeatng frequency f and conducton duty k. The swtch repeatng perod s T = 1/f, so that the swtch-on perod s kt and swtch-off perod s (1-k) T. The load s resstve,.e. R = V 0 /I 0 ; the combned nductor L = L 1 L 2 / (L 1 + L 2 ); the normalzed load s Z N = R/fL. The converter conssts of a pump crcut S L 1 C D and a lowpass flter L 2- C o, and lft crcut. The pump nductor L 1 transfers the energy from the source to capactor C durng swtch-off and then the stored energy on the capactor C s delvered to load R durng swtch-on. Therefore, f the voltage V 0 should be correspondngly hgher. When the swtch S turned off, the current D flows through the freewheelng dode D. Ths current descends n whole swtchng-off perod (1 k) T. If current D does not become zero before swtch S turned on agan, ths workng state s defned as contnuous mode. If current D becomes zero before swtch S turned on agan, ths workng state s defned as dscontnuous mode. The trple-lft LUO crcut consst of two statc swtches S and S 1, four nductors L 1, L 2, L 3 and L 4, fve capactors C, C1, C2, C 3 and C 0, and fve dodes. Capactors C1, C2, and C 3 perform characterstc functons to lft the capactor voltage V C by three tmes of source voltage V 1, L 3 and L 4 perform the functon as ladder jonts to lnk the three capactors C1, C2, and C 3 and lft the capactor voltage V C up. Current C1 (t), C2 (t), C3 (t) are exponental functons. They have large values at the moment of power on, but they are small because V C1 = V C2 = V C3 = V 1 n steady state. The crcut parameters of the chosen Luo converter s lsted n Table.1 The output voltage and current are (1) and = (2) The voltage transfer gan n contnuous mode s Other average voltages: (3) 17
Hardware Implementaton of Fuzzy Logc Controller for Trple-Lft Luo Converter V C = V 0 ; V C1 = V C2 = V C3 = V I (4) ce = e k -e k-1 (8) (3) Other average currents: I L2 = I 0 ; (5) (6) where V o s the present output voltage, V ref s the reference or desred output voltage and subscrpt k denotes values at the samplng nstants. δd k s the change n duty cycle whch s the output of the fuzzy controller at the k th samplng nstant. The updated duty cycle s Table 1. Crcut Parameters of Trple Lft Luo Converter Parameters Symbol Values Input voltage V n 10 V Output voltage V o 60V Inductors L 1 -L 2 -L 3 -L 4 330µH Capactors C 0 -C1-C2-C3-C 22µf/60V Load resstance R 10Ω Swtchng f s 50KHZ frequency Duty rato d 0.5 III. FUZZY LOGIC CONTROL The control acton s determned n a fuzzy logc controller from the evaluaton of a set of smple lngustc rules. The development of the rules requres a thorough understandng of the process to be controlled but t does not requre a mathematcal model of the system. Fg. 2 Block Dagram of Fuzzy Logc Control for a Trple Lft Luo Converter The block dagram of the fuzzy logc control scheme for a Trple Lft Luo converter s shown n Fg.2. The fuzzy controller s dvded nto fve modules: fuzzfer, data base, rule base, decson maker and defuzzfer. Varous steps n the desgn of FLC for chosen Luo converter are stated below: A. Identfcaton of Inputs and Output The nputs to the fuzzy controller are the error n output voltage e and the change of error ce whch are defned as e = V ref -V o (7) d k = d k-1 + η d k (9) where η s the gan factor of the fuzzy controller. B. Fuzzfcaton of Inputs and Output Ths work, seven trangular fuzzy sets are chosen as shown n Fg. 3 and Fg. 4 and are defned by the followng lbrary of fuzzy set values for the error e, change n error ce and for the change n duty cycle δd k. Mamdan type nput and output membershp functons are used. The seven fuzzy varables for error, change n error and change n the duty cycle are Negatve Bg (NB), Negatve Medum (NM), Negatve Small (NS), Zero (Z), Postve Bg (PB), Postve Medum (PM) and Postve Small (PS). (e), (ce) (d k) Fg. 3 Membershp functons for e, ce C. Rule Base and Inference Mechansm The dervaton of the fuzzy control rules s heurstc n nature and based on the followng crtera: 1. When the output of the converter s far from the set pont, the change of duty cycle must be large so as to brng the output to the set pont quckly. 2. When the output of the converter s approachng the set pont, a small change of duty cycle s necessary. 3. When the output of the converter s near the set pont and s approachng t rapdly fuzzy logcdly, the duty cycle must be kept constant so as to prevent overshoot. 4. When the set pont s reached and the output s stll changng, the duty cycle must be changed a lttle bt to prevent the output from movng away. 5. When the set pont s reached and the output s steady, the duty cycle remans unchanged and when the output s above the set pont, the sgn of the change of duty cycle must be negatve and vce versa. Accordng to these crtera, a rule table s derved and s shown n Table 2. d k Fg. 4 Membershp functons for d k 18
ce c Table 2 Rule base for FLC NB NM NS ZE PS PM PB NB NB NB NB NB NM NS ZE NM NB NB NB NM NS ZE PS NS NB NB NM NS ZE PS PM ZE NB NM NS ZE PS PM PB PS NM NS ZE PS PM PB PB PM NS ZE PS PM PB PB PB PB ZE PS PM PB PB PB PB D. Defuzzfcaton A crsp value for the change n duty cycle s calculated n ths work usng the center of gravty method. The resultant change of duty cycle can therefore be represented by d k 4 Where W IV. 1 4 1 w m w - Weghtng factor, m - Centrod. (7) TMS320C242 DSP CONTROLLER The Texas Instruments TMS320C242 DSP s a programmable dgtal controller wth C2xx DSP as the core processor. The DSP core s a 16-bt fxed-pont processor. It contans on-chp memory and useful perpherals ntegrated onto a sngle pece of slcon. The speed of operaton s 20 Mllon Instructons Per Second (MIPS). Ths hgh processng speed of the C2xx CPU allows user to compute parameters n real tme. The followng characterstcs make ths DSP the rght choce for a wde range of applcatons: Very flexble nstructon set Inherent operatonal flexblty Hgh speed Innovatve parallel archtecture Compactness and cost effectveness 50 ns Instructon cycle tme Fg.5 shows the archtectural overvew of TMS320C242 DSP. The perpheral set ncludes: Event-Manager Module whch contans Eght Compare / Pulse-Wdth Modulaton (PWM) Channels, Two 16-Bt General-Purpose Tmers, Three 16-Bt Full Compare Unts, Three Capture Unts 10 bt Analog to dgtal converter wth converson tme of 1µs Control Area Network (CAN) nterface Seral Perpheral Interface (SPI) Seral Communcaton Interface (SCI) General Purpose b-drectonal dgtal I/O (GPIO) pns Watchdog tmer Fg. 5 Functonal Block Dagram of TMS320C242 DSP V. HARDWARE IMPLEMENTATION The block dagram for the TMS320C242 DSP based mplementaton of closed loop control of a trple-lft Luo converter s shown n Fg.6. The output voltage of the converter s scaled down to 0 5volts and read by the 10-bt ADC of DSP. The DSP executes 20 MIPS wth 50 ns nstructon cycle tme. The converson tme of the on-chp ADC s 1µs. The DSP takes an average of 500µs to execute the fuzzy logc control algorthm, whch nvolves samplng the output voltage, calculatng the new duty cycle and updatng the PWM output. The swtchng devce S 1 used s a N-channel MOSFET (enhancement type) IRF540N and S s a P-channel MOSFET IRF9630.In order to provde solaton between the Trple-Lft Luo converter crcut and the DSP, the solaton amplfer HCPL7840 s needed n the feedback path. The opt coupler MCT2E provdes the solaton between the DSP and MOSFET of the Trple-Lft Luo converter. The PWM sgnal from the DSP s not capable of drvng MOSFET. In order to strengthen the pulses, MOSFET drver IC IR2110 s used. VI. EXPERIMENTAL RESULTS AND DISCUSSION A snapshot of the expermental setup for a Luo converter s dsplayed n Fg. 7. Fg.8 shows the output voltage for the LUO converter wth a step change of ±25% of rated supply voltage at 0.02 sec and at 0.03 sec. The expermental results show that the output voltage s regulated wthn a maxmum of 4msec and the % peak overshoot s 8.33 after lne dsturbances of the converter. Fg. 9 shows the output voltage of the LUO converter wth a step change of ±20% of rated load at 0.02 sec and at 0.03 sec. It can be seen that the %peak overshoot s 8.33 and the settlng tme s 2msec for a step change of 10-12 Ω. The %peak overshoot s 6 and settlng tme s 1msec for a step change of 10 8 Ω. 19
Hardware Implementaton of Fuzzy Logc Controller for Trple-Lft Luo Converter Fg.6 Block Dagram of closed loop control for Trple Lft Luo converter Fg.7 Hardware set up for Trple Lft Luo converter Fg. 9 Closed loop response of Trple-Lft Luo converter wth fuzzy logc controller under sudden dsturbances of ±20% of rated load at 0.02 sec and 0.03 sec VII. CONCLUSION The performance of the fuzzy logc controlled Trple-Lft Luo converter has been presented. Fuzzy logc control gves output voltage regulaton for both lne and load dsturbances wth less settlng tme and less peak overshoot. The hardware model of the Luo converter wth ts control crcut was mplemented usng TMS320C242 DSP. REFERENCES 1. F.L, Luo Postve output Luo-converter lft technque, IEE- EPA/proceedngs, 146(4), pp.415-432, July 1999 2. F.L, Luo. Luo converters - Voltage lft technque Proceedngs of the IEEE Power Electroncs Specal Conference IEEE - PESC' 98. Fukuoka Japan, pp. 1783-1789, May 1998. 3. R. Kayalvzh, S.P. Natarajan, V. Kavtharajan and R.Vjayarajeswaran, TMS320F2407 DSP Based Fuzzy Logc Controller for Negatve Output Luo Re-Lft Converter: Desgn, Smulaton and Expermental Evaluaton IEEE Proceedngs of Power Electroncs and Drve systems, pp. 1228-1233. Dec 2005. 4. N.F.Nk Ismal, N. Hasm and R.Baharom, A comparatve study of proportonal ntegral dervatve controller and fuzzy logc controller on DC/DC Buck Boost converter, IEEE symposum on ndustral Electroncs and Applcatons(ISIEA), Langkw, pp.149-154, Sep.2011. 5. B.Achammal and R.Kayalvzh Hardware mplementaton of optmzed PI controller for LUO converter, Internatonal Journal of Appled Engneerng Research(IJAER),Volume 10, no 14,pp.34899-34905,2015. 6. Lpng Guo,John Y.Hung and R.M. Nelms, Evaluaton of DSP-based PID-Fuzzy controller for DC-DC converter, IEEE Transacton on Industral Electroncs, Vol 56,no.6,June 2009. Fg. 8 Closed loop response of Trple-Lft Luo converter wth fuzzy logc-controller under sudden dsturbances of ±25% of rated supply voltage at 0.02 sec and 0.03 sec N. Dhanasekar, receved hs B.E (Electroncs and Instrumentaton) from Annamala Unversty n 2002 and M.E (Electroncs and Control) from Sathyabhama Unversty n 2006. He s presently workng as an Assocate Professor n Department of Electrcal and Electroncs Engneerng, A.V.C College of Engneerng, Mayladuthura. He s presently pursung Ph.D n the Department of Electroncs and Instrumentaton Engneerng, Annamala Unversty. Hs area of nterest are modelng, smulaton and mplementaton of ntellgent controllers for power electroncs converters. He s a lfe member of Indan socety for Techncal Educaton. 20
Dr. R. Kayalvzh, has obtaned B.E (Electroncs and Instrumentaton), M.E (Power Systems) and PhD n Instrumentaton Engneerng from Annamala Unversty n 1984, 1988 and 2007 respectvely. She s currently workng as a Professor n the Department of Electroncs and Instrumentaton Engneerng at Annamala Unversty where she has put n 32 years of servce. She produced 5 PhDs and presently gudng 5 PhD scholars. Her research papers 25 has been presented n the Internatonal and Natonal conferences. She has 35 publcatons n Natonal Journals and 30 n Internatonal Journals. Her areas of research nterest nclude Power Electroncs, Power Systems and Dgtal Image Processng. She s a lfe member of Indan socety for Techncal Educaton. 21