Yu will learn the fllwing in this lab: The UNIVERSITY f NORTH CAROLINA at CHAPEL HILL Cmp 541 Digital Lgic and Cmputer Design Prf. Mntek Singh Fall 2016 Lab Prject (PART A): Attaching a Display t the Prcessr Issued Mn 11/7/16; Suggested cmpletin date 11/14/16 Designing a mdule with multiple memries Designing and using a bitmap fnt Designing a memry-mapped display Understanding initializatin f a memry unit using an external file Part 0: Thrughly test yur design f the MIPS CPU frm Lab 9 Befre yu prceed with the tasks belw, make sure that yur MIPS CPU frm Lab 9 is wrking crrectly. The testers prvided fr Lab 9 shuld result in all crrect utputs (i.e., all ERROR signals shuld be green). Part 1: Design a full display unit ( Terminal Display ) Yu will build upn yur VGA display driver frm Lab 7 t make it a full-fledged character-riented terminal display. The blck diagram belw shws yur design frm Lab 7: This earlier design simply generated a fixed pattern t shw n the display (e.g., lines, checkerbard pattern, etc.). In this assignment, yu will extend it t display a 2-D grid f characters (r sprites ), i.e., a character display, as shwn in the blck diagram belw. 1
The characters t display are assigned cdes (yur chice), and these cdes are stred in an array in a special memry called screen memry. The array is stred in rw-wise (rw 0 first, then rw 1, etc.), and left-t-right within each rw. If yur screen size is 640x480 pixels, and if yu decide n each character being 16x16 pixels, then each rw will have 40 characters, and there will be 30 rws. S, yur screen memry will need t have 1200 lcatins. There is als anther memry, a read-nly ne, called bitmap memry, which stres the pixel pattern fr each f the characters yu implement. S, fr example, if yur characters are blcks f 16x16 pixels, and if each pixel has a 12-bit RGB clr, then the bitmap memry will have 256 values (each 12-bit) stred fr each character yu chse t implement. If yur final applicatin needs 16 different characters, then yur bitmap memry will have 256 x 16 = 4096 values f 12 bits each. Nte: There is n CPU in this picture yet. Study the blck diagram carefully. Make a tp-level mdule called tp, which cntains vgadisplaydriver (in a file named vgadisplaydriver.sv) and screenmem (in file screenmem.sv). The VGA display driver in turn cntains tw submdules: VGA Timer and Bitmap Memry. Nte the fllwing: VGA timer: Yu designed this mdule in Lab 7. Use a reslutin that yu wuld like fr yur final dem. In class/lab discussins, I will assume a reslutin f 640x480. If yu deviate frm this reslutin, be sure t make crrespnding changes t yur Verilg descriptin thrughut. 2
Screen memry: This memry cntains a linear sequence f values, each representing the cde fr a character. These are cdes yu assign t sme special characters (e.g., different clred blcks, r different emji, etc.). It is sufficient t keep each cde 8-bits wide, althugh yu can use fewer bits if yu need fewer. Fr instance, if yu nly want t display 32 unique symbls, yu nly need a cde with 5 bits (yur cdes wuld run frm 5 b00000 t 5 b11111). The width f the screen address will depend n yur screen reslutin and character size. If, as in the text abve, yur screen has a ttal f 1200 characters, yu will need a screen address f 11 bits. Nte: Each lcatin in this memry shuld represent a single character s cde. Bitmap memry: This memry is indexed by the character cde, and stres the bitmap r fnt infrmatin fr that character. In particular, each character is a 2-dimensinal matrix f RGB values, stred in a linear sequence. S, fr example, if each character is a 16x16 square bx f pixels, yu will stre the 12-bit RGB value fr the (0,0) pixel fr that character first, then (0,1), and s n until the end f the tp rw, then the secnd rw, etc. Thus, there will be 256 clr values (each 12-bit in length) stred fr each character. Nte: Each lcatin in this memry shuld represent a single pixel s clr value. Keep the fllwing pints in mind as yu d this assignment: Start with nly a small number f characters (say, 2 r 4). If yur design wrks fine, increase the number f characters t a reasnable number (at least 8, but as many as yu think yu might need t d an interesting dem!). Yu may have t think a bit int yur final dem here, but dn t wrry, nce yu have the basic design wrking, it wn t be t hard t cme back and add mre characters and bitmaps t it! Initialize the screen memry frm a file using the $readmemh instructin. Yu shuld have the entire screen initialized in this file; therwise there may be junk character cdes in the part f the screen left uninitialized. This file will be lng (e.g., 1200 lines if yur screen has 40 clumns x 30 rws). Initialize the bitmap memry frm a file using the $readmemh (r perhaps $readmemb may be mre cnvenient here). If, fr example, characters are 16x16 pixels, then each will require 256 clr values t be stred in this memry. Start with nly a cuple f characters, then increase the number. This file can get lng! Fr example, it culd have 256 x 16 lines if yu are using 16 characters. The main challenge in this lab assignment is t instantiate the tw memry units, and t wire everything up tgether. This is a gd exercise in hierarchical design. That is the reasn I will nt be prviding a Verilg cde skeletn. The key challenge t designing this system is t figure ut the fllwing mappings: The mapping frm the (x,y) pixel crdinates generated by the VGA Timing Generatr, t the (J, K) character crdinates that that pixel maps t in Screen Memry. The mapping frm (J, K) character crdinates t the address in Screen Memry. The mapping frm the character cde that the Screen Memry gives yu, t the start lcatin f the bitmap stred fr that character in the Bitmap Memry. The mapping frm the (x,y) pixel crdinates generated by the VGA Timing Generatr, t the ffset within the bitmap fr that character in the Bitmap Memry. Start small s things are easier t debug. 3
Part 2: Integrate the CPU and the display unit using memry mapping As discussed in Lecture 16 (slides 3 and 5 [reprduced belw]), yu will integrate the CPU and the display using memry-mapped I/O. One pssible memry mapping scheme was discussed in class: Assigning the data memry t start at address 0x2000 allws yu t use the MARS assembler with the Cmpact, Text at 0 cnfiguratin, which places cde at 0x000 and data at 0x2000. T implement this memry map, use the blck diagram belw. Put the Memry and I/O unit in a mdule called memio, and name the file memio.sv. Fr nw, skip the jystick/keybard etc. We will discuss thse next week. 4
NOTE: The screen memry shwn in Part 1 has nw been placed inside the Memry and I/O unit. Therefre, the display driver nw utputs the address fr the screen memry, which ges int the memry-i/o unit thrugh a prt (shwn n the right side in the figure abve). This prt is distinct frm the prt used by the MIPS prcessr, and frm the prt that will be used by the keybard/jystick. Thus, the screen memry nw has separate interfaces t the display driver and t the MIPS CPU. Implement this part n the bards! Write a shrt prgram t have yur MIPS write characters t Screen Memry and see if they shw up n the mnitr! A sample prgram is prvided n the website; it waits fr an amunt f time that can be set in the assembly prgram, then write tw characters n the screen. If all ges well, yu will have a near-final full-functin cmputer. Gd luck! Start wrking n yur final prject dem idea. As explained in class, submit a shrt prpsal n what yu wuld like t implement fr yur final prject dem via Sakai by Friday, Nv 11, befre start f lab s we can give yu timely feedback. What t submit: [Part 1] The Verilg surce f yur tp-level display unit (vgadisplaydriver.sv). This file shuld cntain the Verilg descriptin f the three cmbinatinal lgic blcks fr generating RGB values fr each pixel. In a cuple f sentences, describe the set f characters yu have chsen t implement. [Part 2] The Verilg surce fr the memio mdule (memio.sv). In a cuple f sentences, state if everything wrks as yu expect, r if there are sme prblems yu still need t reslve. Shw a wrking dem f yur design fr Part 2 n 11/16 Hw t submit: Please submit yur wrk by email by end f day n 11/14: Send email t: cmp541-submit-f16@cs.unc.edu Use subject line: Prject PART A Include the Verilg files as attachments as specified abve, and the rest in plain text. 5