Triacs Silicon Bidirectional Thyristors Designed primarily for full-wave AC control applications, such as light dimmers, motor controls, heating controls and power supplies; or wherever fullwave silicon gate controlled solidstate devices are needed. Triac type thyristors switch from a blocking to a conducting state for either polarity of applied main terminal voltage with positive or negative gate triggering. Features Blocking Voltage to 2 Volts All Diffused and Glass Passivated Junctions for Greater Parameter Uniformity and Stability Small, Rugged, Thermowatt Construction for Low Thermal Resistance, High Heat Dissipation and Durability Gate Triggering Guaranteed in Four Modes (Quadrants) PbFree Packages are Available* MAXIMUM RATINGS (T J = 25 C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive OffState Voltage (Note 1) (T J = 4 to +125 C, Sine Wave to 6 Hz, Gate Open) OnState RMS Current (T C = +7 C) Full Cycle Sine Wave to 6 Hz Peak NonRepetitive Surge Current (One Full Cycle, Sine Wave 6 Hz, T C = +25 C) Preceded and followed by rated current V DRM, 2 V V RRM I T(RMS) 8. A I TSM A Circuit Fusing Considerations, (t = 8.3 ms) I 2 t 26 A 2 s Peak Gate Power (T C = +7 C, Pulse Width = 1 s) Average Gate Power (T C = +7 C, t = 8.3 ms) Peak Gate Current (T C = +7 C, Pulse Width = 1 s) P GM W P G(AV).35 W I GM A Operating Junction Temperature Range T J 4 to +125 C Storage Temperature Range T stg 4 to +1 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. V DRM and V RRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. 1 2 3 TRIACS 8. AMPERES RMS 2 VOLTS MT2 TO2AB CASE 221A7 STYLE 4 PIN ASSIGNMENT 1 Main Terminal 1 2 Main Terminal 2 3 Gate 4 Main Terminal 2 G MARKING DIAGRAM MAC338G AYWW = Standard Device Code MAC338G = PbFree Device Code A = Assembly Location Y = Year WW = Work Week ORDERING INFORMATION Device Package Shipping TO2AB Units/Box *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. G TO2AB (PbFree) Units/Box Semiconductor Components Industries, LLC, 6 May, 6 Rev. 1 Publication Order Number: /D
THERMAL CHARACTERISTICS Thermal Resistance JunctiontoCase JunctiontoAmbient Characteristic Symbol Value Unit R JC R JA 62.5 Maximum Lead Temperature for Soldering Purposes 1/8 from Case for 1 Seconds T L 26 C C/W ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Blocking Current (V D = Rated V DRM, V RRM ; Gate Open) T J = 25 C T J = +125 C ON CHARACTERISTICS Peak On-State Voltage (I TM = 11 A Peak; Pulse Width = 1 to 2 ms, Duty Cycle 2%) Gate Trigger Current (Continuous dc) (Main Terminal Voltage = 12 Vdc, R L = Ohms) MT2(+), G(+) MT2(+), G() MT2(), G() MT2(), G(+) Gate Trigger Voltage (Continuous dc) (Main Terminal Voltage = 12 Vdc, R L = ) MT2(+), G(+) MT2(+), G() MT2(), G() MT2(), G(+) Gate NonTrigger Voltage (Continuous dc) (Main Terminal Voltage = 12 V, R L =, T J = +125 C) All Four Quadrants Holding Current (Main Terminal Voltage = 12 Vdc, Gate Open, Initiating Current = ma, T C = +25 C) Turn-On Time (Rated V DRM, I TM = 11 A) (I GT = 1 ma, Rise Time =.1 s, Pulse Width = 2 s) I DRM, I RRM 1 A ma V TM 1.2 1.65 V I GT V GT 12 12 35.9.9 1.1 1.4 75 2.5 ma V GD.2 V I H 6. ma t gt 1.5 s V DYNAMIC CHARACTERISTICS Critical Rate of Rise of Commutation Voltage (V D = Rated V DRM, I TM = 14 A, Commutating di/dt = 5. A/ms, Gate Unenergized, T C = 7 C) Critical Rate of Rise of Off-State Voltage (V D = Rated V DRM, Exponential Voltage Rise, Gate Open, T C = +7 C) dv/dt(c) 5. V/ s dv/dt V/ s 2
Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Symbol V DRM I DRM V RRM I RRM Parameter Peak Repetitive Forward Off State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off State Voltage Peak Reverse Blocking Current I RRM at V RRM on state I H V TM Quadrant 1 MainTerminal 2 + V TM I H Maximum On State Voltage Holding Current I H off state + Voltage I DRM at V DRM Quadrant 3 MainTerminal 2 V TM Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 (+) MT2 Quadrant II () I GT (+) I GT Quadrant I I GT + I GT () MT2 () MT2 Quadrant III () I GT (+) I GT Quadrant IV MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to. With inphase signals (using standard AC lines) quadrants I and III are used. 3
T C, MAXIMUM ALLOWABLE CASE TEMPERATURE ( C) 13 1 11 9 7 6 CONDUCTION ANGLE = 36 1. 3. 4. 5. 6. 7. 8. 9. 1. 1. 3. 4. 5. 6. 7. 8. 9. I T(RMS), RMS ON-STATE CURRENT (AMPS) I T(RMS), RMS ON-STATE CURRENT (AMPS) Figure 1. Current Derating P (AV), AVERAGE POWER DISSIPATION 14. 1 1. 8. 6. 4. CONDUCTION ANGLE = 36 Figure 2. Power Dissipation 1. I T, INSTANTANEOUS ON-STATE CURRENT (AMPS) 1 5. 1..5.2 T J = 25 C T J = 125 C I TSM, PEAK SURGE CURRENT (AMP) 6 4 CYCLE T C = 7 C f = 6 Hz Surge is preceded and followed by rated current 1. 3. 5. 7. NUMBER OF CYCLES Figure 4. Maximum NonRepetitive Surge Current 1.1.4.8 1.2 1.6 2.4 2.8 3.2 3.6 4. 4.4 V T, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) Figure 3. Maximum OnState Characteristics V GT, TRIGGER VOLTAGE (NORMALIZED) 1.6 1.2.8.4 6 4 OFF-STATE VOLTAGE = 12 Vdc ALL MODES 4 T C, CASE TEMPERATURE ( C) 6 Figure 5. Typical Gate Trigger Voltage 4
I GT, TRIGGER CURRENT (NORMALIZED) 1.6 1.2.8.4 6 4 OFF-STATE VOLTAGE = 12 Vdc ALL MODES 4 6 I H, HOLDING CURRENT (NORMALIZED) 2.8 2.4 1.6 1.2.8.4 OFF-STATE VOLTAGE = 12 Vdc ALL MODES 6 4 4 6 T C, CASE TEMPERATURE ( C) T C, CASE TEMPERATURE ( C) Figure 6. Typical Gate Trigger Current Figure 7. Typical Holding Current r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1..5.2.1.5.2.1.1.2.5 1. 5. t, TIME (ms) Z JC(t) = r(t) R JC 1. k k 5. k 1 k Figure 8. Thermal Response 5
PACKAGE DIMENSIONS TO2AB CASE 221A7 ISSUE AA H Q Z L V G B 4 1 2 3 N D A K F T U C T SEATING PLANE S R J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A.57.6 14.48 15.75 B.3.45 9.66 1.28 C.16.19 4.7 4.82 D.25.35.64.88 F.142.147 3.61 3.73 G.95.15 2.42 2.66 H.11.155 2. 3.93 J.14.22.36.55 K..562 12.7 14.27 L.45.6 1.15 1.52 N.19.21 4.83 5.33 Q..1 2.54 3.4 R..11 4 2.79 S.45.55 1.15 1.39 T.235.255 5.97 6.47 U... 1.27 V.45 1.15 Z. 4 STYLE 4: PIN 1. MAIN TERMINAL 1 2. MAIN TERMINAL 2 3. 4. MAIN TERMINAL 2 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 217 USA Phone: 336752175 or 344386 Toll Free USA/Canada Fax: 336752176 or 3443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 2829855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 79 291 Japan Customer Focus Center Phone: 813577338 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative /D