A Novl Imrovd Soft Switching PWM DC-DC Convrtr Swanajit Pattnaik *, Anu Kumar Panda, Kamal Kanta Mahaatra * * National Institut of Tchnology, Dt. of Elctrical Enginring, Rourkla, India, swanajit.attnaik@gmail.com National Institut of Tchnology, Dartmnt of Elctrical Enginring, Rourkla, India, anuanda64@gmail.com * National Institut of Tchnology, Dartmnt of Elctrical Enginring, Rourkla, India, kmaha@rdiffmail.com Abstract: A nw zro-voltag switching (ZVS) uls width modulation (PWM) DC-DC convrtr using MOSFETs is roosd in this ar. Th roosd convrtr achivs ZVS with rduction in voltag and currnt strsss across switchs to imrov th fficincy by minimizing th switching and conduction losss. Th rdictd oration rincils and thortical analysis of th rsntd convrtr ar vrifid with a rototy of a 360 W, 50 V/6 V and 00 khz PWM half bridg buck convrtr. Additionally, at full outut owr in th roosd soft switching convrtr th ovrall fficincy, which is 80% in th hard switching cas, incrass to about 95%. transformr mak th switchs turnd on/off undr zro voltag switching (ZVS). It s siml configuration, mak as to control. With lss numbr of comonnts, this convrtr bcoms mor conomical and attractiv as comard to othr rviously rsarchd convrtr. In th rfrnc ars, diffrnt soft switching tchniqus ar usd to rduc switching Kywords: PWM, DC-DC convrtr, ZVS. I. INTRODUCTION With advanc in VLSI tchnology, smallr, mor owrful digital systm is availabl. It rquirs owr suly with highr owr dnsity, lowr rofil and highr fficincy. To furthr incras th rocssing sd and fficincy, orating voltag is continuously rducd With advanc in VLSI tchnology, smallr, mor owrful digital systm is availabl. It rquirs owr suly with highr owr dnsity, lowr rofil and highr fficincy. To furthr incras th rocssing sd and fficincy, orating voltag is continuously rducd with incras in orating currnt. Also fast transint rsons and smallr siz for a givn owr suly bcoms vry imortant [][]. PWM toologis hav bn widly usd for this alication. Unfortunatly, hold u tim rquirmnt ut hug naltis on th rformanc of ths toologis. Also, high switching loss limitd th owr dnsity achivabl for ths toologis. Excssiv switching loss rohibitd highr switching frquncy. Soft switching convrtrs mloying two transformrs hav bn rsarchd in rcnt yars for owr convrtrs to rduc switching losss [3]. High frquncy PWM DC-DC convrtrs hav bn widly usd in industry du to thir high owr dnsity, fast rsons and control simlicity [4]. Escially at high frquncis and high owr lvls, it is ncssary to us advancd soft switching tchniqus to rduc switching losss. In this ar, a siml and nw toology is introducd to achiv highr fficincy as comard to th convntional convrtr. This roosd convrtr utilizs thr clamd caacitors in th rimary sid of th transformr to rovid low outut voltag. Th caacitor usd in sris with th transformr rovids bttr dad tim control. Th rsonanc btwn two caacitors in arm of th bridg and th lakag inductanc of th Fig. Proosd soft switching dc-dc convrtr losss and th orations ar analysd rorly. But th duration of currnt flowing through th body diod of MOSFET switchs is not controlld in ast work. In th rfrnc ars, diffrnt soft switching tchniqus ar usd to rduc switching losss and th orations ar analysd rorly. But th duration of currnt flowing through th body diod of MOSFET switchs is not controlld in ast work. During transition riods, high inut currnt may flow through th switchs, in rsult conduction losss may occur. This roblm can b avoidd by using an inductor in sris with th suly. This roosd convrtr is dsignd to solv th abov roblms. Th following oints hav to follow in th ar: dscrition of toology usd and dsign rocss dsign of blocking caacitor for dad tim control dsign of transformr lakag inductanc so that th stord nrgy should transfr rorly to suly during off tim. II. OPERATION PRINCIPLES AND ANALYSIS Th following assumtions ar mad to simlify th circuit orations scondary sid lakag inductanc is nglctd; 978--444-746-8/08/$5.00 008 IEEE
caacitanc of th blocking caacitor is takn mor as comard to othr two caacitors usd in this circuit; caacitancs of othr two caacitors ar takn as sam valu; turn ratio of transformr is takn asymmtrical; to mak magntizing currnt ril fr, magntizing inductanc L m is chosn as high valu; currnt flowing through transformr is continuous; Th roosd convrtr schm is shown in Fig.. Th circuit schm includs two MOSFET switchs Q and Q. Two clam caacitors C and C. Th transformr Tx dnots th combination of th magntizing inductanc Lm, th lakag inductanc L lk and th idal transformr with transformr winding-ratio n:. Th roosd dc-dc convrtr is dsignd through AC link as nrgy transfr dvics. In stady-stat, th roosd convrtr has four oration stats during on switching cycl. Th ky wavforms and th quivalnt circuits of ach oration stat ar shown in Fig. and Fig.3, rsctivly. Mod ( t 0 -t ) : At t = t 0, MOSFET Q is turnd on by roviding ror gat uls. Now currnt starts to flow through th transformr. With th induction rorty, th diod D is comlld to conduct. Rsonant condition occurs by th magntizing inductanc L m and quivalnt caacitanc of C b and C. But th rsonant riod is lss, so high ak currnt and voltag strsss cannot aar across th switch Q. Th voltag and currnt xrssion will b as V il ( t t0) = Psin k ( t t0) Qsin k ( t t0) () L + V P vc( t t0) = cos k ( t t0) k V Q cos k ( t t0) ( ) k ( ) = ( ) ( ) ( ) v t t V v t t v t t 0 L 0 C 0 3 Whr P, Q, k and k ar function of L, L P, C, C, C b, which is a big xrssion. Th switch is turnd on undr ZVS du to caacitor C, and turnd off undr ZCS du to transformr lakag inductanc L. This mod is ndd whn caacitor C comltly discharg its nrgy to caacitor C b and L. At this momnt inut currnt comltly flow through caacitor C, roviding currnt through th switch qual to zro. So at this momnt switch Q can b turnd off undr ZCS. At nd of this mod, Cb chargd u to C b oosit to that of its initial valu. At t = t, i L (t ) = I L, v C = 0, v Cb = v Cb, v = v, Q Q Iq Iq Ic Ic Icb Vq Vq t 0 t t t 3 t 4 Fig.. Ky wavforms of th roosd convrtr Mod ( t -t ) : At t = t, stord nrgy of inductor is forcd th body diod of switch to conduct and inductor dischargd its stord nrgy through C -Dq -Cb. Rsonanc occur btwn lakag inductanc L P and caacitors C and C b. Howvr, th rsonant riod is not mor than th dad tim. Dad tim is controlld by caacitor C b. This mod nds at t, whn currnt through C b bcoms zro i.. this blocking caacitor is chargd uto its maximum valu. Th voltag and currnt xrssions for this mod ar givn blow.
Mod Mod Mod 3 Mod 4 Fig. 3 Mods of Oration V v Rcos k3 ( t t) Scos k4 ( t t ) vc ( t t) = V v k3 k4 il ( t t) = Rsin k3 ( t t) + Ssin k4 ( t t) L I Rsin k3 ( t t) Ssin k4 ( t t ) L + + + I L Rcos k3 ( t t) + Scos k4 ( t t) ( 7 ) ( 4 ) k3 k4 Now th voltag across caacitor C il ( t t) = ILcos ( t t) can b xrssd as v( t t) = V vl( t t) vc( t t ) ( 8 ) whr R, S, k 3, k 4, ar function of L, L P, C, C, C b, vcb+ vc sin ( t t ) ( 5) L CC b Z and Z =, C = C C + C I L C v t t t t Cb L ( ) = sin ( ) C b ( vcb vc ) C cos ( t t) ( 6) + + b Mod 3 ( t -t 3 ) : This mod starts with switch Q turnd-on undr ZVS, diod D on with D off. This mod will com to nd with caacitor C b chargd uto ak valu, but with oosit olarity as comard to rvious mod. This mod is ndd whn caacitor C comltly discharg its nrgy to caacitor C b and L. At this momnt inut currnt comltly
flow through caacitor C, roviding currnt through th switch Q qual to zro. So at this momnt switch Q can b turnd off undr ZCS. At nd of this mod, C b chargd u to C b oosit to that of its initial valu. Th voltag and currnt xrssion for this mod is givn as follows, il( t t) = I L Tcos k5 ( t t) + Ucos k6 ( t t) + + L L +... 9 V vc v Tsin k5 ( t t) Usin k6 ( t t) ( ) At th nd of this mod, currnt through transformr is zro. ( ) cos ( ) 5 6 ( ) sin ( ) Tsin k t t U k t t v( t t) = IL + k5 k6 V vc v + L L Tcos k t t U k t t + k5 k6 5 6 ( 0) ( ) = ( ) ( ) ( ) v t t V v t t v t t C L Whr T, U, k 5, k 6 ar function of L, L P, C, C, C b, Mod 4 ( t 3 -t 4 ) : Th transformr start to transfr stord nrgy to scondary sid as wll as to caacitor C, which nsur th continuous flow of currnt at th outut. Thn th rctifid diod D will start to conduct, whil diod D will b turnd off undr ZVS. Th body diod of th switch Q is turnd on du to th nrgy transfrring rorty of inductor in th sam dirction in which it gt chargd. Th mod nds at t 4, whn currnt through C b bcoms zro i.. this blocking caacitor is chargd uto its maximum valu. Th voltag and currnt xrssion for this mod is givn as follow: il ( t t3) = ILcos ( t t3) vcb + sin 3 Z V i t t t t L ( ) = sin ( ) 3 3 Z3 ( t t ) ( ) IL Asin k8 ( t t3) + Bsin k9 ( t t3) vcb + Ccos k8 t t3 + Dcos k9 t t3 3 Z ( ) ( ) ( ) I L C v t t t t Cb L ( ) = sin ( ) 3 3 Cb v L C Cb Z L Whr Z =, C sin 3 4 C CC ( t t ) ( ) CC =, C b = C+ Cb + C and L Z3 = C Th constants usd in th xrssions i.. A, B, C, and D ar functions of L, L P, C, C, C b, At th nd of this mod v Cb = - v Cbmax, IV. DESIGN PROCEDURE Th advnt of th switching rgulator has gratly rducd th siz, wight and volum of owr convrsion circuitry, whil imroving both th sd of rsons and fficincy. It is asy to minimiz rsistanc bcaus w hav availabl vry low ESR caacitors, low on-rsistanc MOSFETs and low srisrsistanc inductors.. Th dsign should tak into account th following considrations:. C b C and C : If this condition is satisfid, dad tim control can b don smoothly, so that turn-on and turn-off losss can b rducd i.. Cb( vcbmax vcb ) t ( 5) ICb. Th transformr lakag inductanc L should such a valu that it can discharg its nrgy comltly to C b, C, C and load: LI = Cv ( ) max 6 L b Cb + CvC + CvC Transformr Dsign: Th inductor- transformr should b dsignd to minimiz th lakag inductanc, ac winding losss, and cor losss. Whn th transformr is dsignd to orat in discontinuous mod th total inductanc is lowr than in continuous mod, and th siz of th transformr may b smallr. But th ak currnts will b at last twic th avrag currnt, thrfor ac winding losss and cor losss ar th rdominant factors rathr than th dc losss and cor saturation. Th total losss ar minimizd whn cor losss and winding losss ar aroximatly th sam valu. -Cor slction: To rduc th cor losss, frrit-p matrial is usually th rfrrd matrial for discontinuous transformrs with orating switching frquncis highr than 00Khz. Th window sha of th cor should b as wid as ossibl to minimiz th numbr of layrs and thrfor minimiz th ac winding losss and th lakag inductanc.e-ty cors with an intrnal air-ga ar th bst choic for low cost and lowr
lakag inductanc. Winding tchniqus to minimiz lakag inductanc, ac losss and EMI nois: To minimiz th ac losss, lakag inductanc and th EMI nois, articular attntion has to b aid to th dsign of th rimary and scondary windings of th transformr. Th rimary winding should b dsignd for lss than thr layrs, thus minimizing th winding caacitanc and th lakag inductanc of th transformr. In high switching frquncy alications an additional insulating layr btwn windings is usually usd. If th transformr has multil scondary windings, th highst owr scondary should b closst to th rimary of th transformr. For high owr alications, a slit rimary construction is tyically usd to rduc th lakag inductanc. To avoid high ac winding losss du to th skin ffct (at high frquncy currnts tnd to flow clos to th surfac of th conductor), Litz wir or Foil windings ar tyically usd. Litz wir for owr alications is usually mad with a fw small diamtr wirs twistd togthr in a strand, and fw of ths strands twistd into biggr strands. Shilding ta or an additional winding btwn rimary and scondaris is tyically usd to rduc th caacitiv couling of common mod nois btwn rimary and scondary. Th nd of this additional winding has to b connctd to ground or to th high inut voltag of th transformr. V. BASIC CONVERTER FEATURES Th faturs of th roosd soft switching convrtr ar brifly summarizd as follows:. Th roosd convrtr is configurd in a siml way.. It has low cost and as to control. 3. Th convrtr acts as a convntional PWM convrtr during most of th switching cycl. 4. All th switchs usd in this circuit ar switchd on and off undr ZVS and ZCS. 5. Th convrtr has highr ovrall fficincy and wid load rang control. 6. This convrtr has dad tim control caability. 7. Inut currnt is ril frd. III. SIMULATION AND EXPERIMENTAL RESULTS To dmonstrat th validity and rformanc of th roosd convrtr was tstd xrimntally and was simulatd. Th 360 W 50 V/6 V convrtr is chosn for th invstigations. Ro TABLE I COMPONETS USED IN THE PROPOSED CONVERTER Comonnt Valu/Modl Simulation Exrimnt MOSFET Switch, Q Idal IRFP50N MOSFET Switch, Q Idal IRFP50N Schottky Diod, D Idal MBR60L45CTG Schottky Diod, D Idal MBR60L45CTG Inut Inductor, L μh μh Caacitor, C 4μF 4μF Caacitor, C 4μF 4μF Blocking Caacitor, C b 6μF 6μF Outut Inductor, L o 3µH 3µH Outut Caacitor, C o 0μF 0μF = 0.Ω, Lm = 5μH, n:n = 4 :, switching frquncy = 00 khz. Simulatd wavforms and xrimntal rsults ar shown in th fig. 4 and fig.5. A. Simulation Rsults Th simulatd convrtr dlivrs a load of 360W with fficincy of 95. %. Th simulatd wavforms shown in th fig. 4(a) and 4(b), ar obtaind by using PSIM. From th simulatd wavform, it can b sn that both switchs ar turnd on and turnd off ZVS and ZCS. In fig. 6 grah btwn fficincy and load currnt is shown. Th xrimntal oscillograms shown in fig. 5(a) and 5(b) ar obtaind from orating soft switching convrtr with a camra. All aramtrs dtails ar givn in Tabl I and II. (a) (b) Fig. 4(a & b) Simulatd currnt and voltag wavforms of switch Q and Q. B. Exrimntal Rsults Th xrimntal rsult shows that th roosd convrtr is rorly dsignd with ZVS for th 00 khz undr full load condition. TABLE TRANSFORMER DESIGN FOR EXPERIMENTAL CONVERTER Paramtr Nam Valu Unit Cor RM0 8 mm Transformr Inductanc L M 5 μh Trans Ratio N :N s :N t 4:: Lakag Inductanc L lk 0. μh
V Q V Q I Q I Q Fig. 5(a). Exrimntal voltag and currnt wavforms of switch Q (V Q: 0V/div, I Q : 0A/div), 5(b) Exrimntal voltag and currnt wavforms of switch Q (V Q: 0V/div, I Q : 0A/div C. Conclusion: Th roosd convrtr dsignd has svral faturs and advantags: high fficincy, high owr dnsity, last siz du to smallr comonnts usd, char and fastr switching frquncy of 00 khz. It rovids bttr fficincy by rducing switching and conduction losss. Our Toology Rf [4] Rf [3] With ZVS Without ZVS Fig 7 Efficincy Vs Load Currnt (Comarison of our toology with toology usd in rf [3] and [4]). REFERENCES Fig.6 Grah btwn fficincy and load currnt [] M. Zhang, M. Jovanic and F. C. L, Dsign considrations for Low- Voltag On-Board DC-DC Moduls for Nxt Gnration of Data Procssing Circuit, IEEE Transaction on Powr Elctronics, volum, issu, March 996, 38-337. [] Y. Panov and M. M. Jovanic, Dsign and Prformanc Evolution of low- Voltag/High-Currnt DC-DC On-Board Moduls, IEEE APEC 99, PP 545-55. [3] Darlwoo L, Tayoung Abu, Byungcho Choi. A nw soft switching dc-to-dc convrtr mloying two transformr, PESC,. -7, Jun 006. [4] Xinyu Xu, Ashwin M. Khambadkon, Toh Mng Long, Ramsh Oruganti, A MHz zro-voltag switching asymmtrical half bridg dc/dc convrtr: analysis and dsign IEEE Trans. Powr Elctron., vol., no.,. 05-3, Jan. 006. [5] Junsok Cho, Joonggi Kown, Sangyoung Han, Asymmtrical ZVS PWM flyback convrtr with synchronous rctification for Ink-jt rintr, PESC,. -7, Jun 006. [6] Jinbin Zhao, Masaoki Skina, Shuuichi Ushiki, Trukazu Sato, Takashi Nabshima, Tadao Nakano, An imrovd intrlavd forward convrtr, PESC,. -5, Jun 006.