SLRS8D SEPTEMBER 8 REVISED JANUARY Lx Quadruple Half-H Drivers Features Description Wide Supply-Voltage Range: 4.5 V to V The L and LD devices are quadruple highcurrent half-h drivers. The L is designed to Separate Input-Logic Supply provide bidirectional drive currents of up to A at Internal ESD Protection voltages from 4.5 V to V. The LD is designed High-Noise-Immunity Inputs to provide bidirectional drive currents of up to -ma Output Current A Per Channel ( ma for at voltages from 4.5 V to V. Both devices are designed to drive inductive loads such as relays, LD) solenoids, DC and bipolar stepping motors, as well as Peak Output Current A Per Channel (. A for other high-current/high-voltage loads in positive- LD) supply applications. Output Clamp Diodes for Inductive Transient Each output is a complete totem-pole drive circuit, Suppression (LD) with a Darlington transistor sink and a pseudo- Darlington source. Drivers are enabled in pairs, with Applications drivers and enabled by,en and drivers and 4 Stepper Motor Drivers enabled by,4en. DC Motor Drivers The L and LD are characterized for operation Latching Relay Drivers from C to C. Logic Diagram Device Information () PART NUMBER PACKAGE BODY SIZE (NOM) LNE PDIP ().8 mm.5 mm LDNE PDIP ().8 mm.5 mm () For all available packages, see the orderable addendum at the end of the data sheet. A,EN A Y Y A,4EN 4A 5 4 Y 4Y
SLRS8D SEPTEMBER 8 REVISED JANUARY 5 Pin Configuration and Functions NE Package -Pin PDIP Top View HEAT SINK AND GROUND,EN A Y Y A V CC 4 5 8 5 4 V CC 4A 4Y Y A,4EN HEAT SINK AND GROUND Pin Functions PIN NAME NO. TYPE DESCRIPTION,EN I Enable driver channels and (active high input) <:4>A,,, 5 I Driver inputs, noninverting <:4>Y,,, 4 O Driver outputs,4en I Enable driver channels and 4 (active high input) GROUND 4, 5,, Device ground and heat sink pin. Connect to printed-circuit-board ground plane with multiple solid vias V CC 5-V supply for internal logic translation V CC 8 Power VCC for drivers 4.5 V to V
over operating free-air temperature range (unless otherwise noted) () MIN MAX UNIT SLRS8D SEPTEMBER 8 REVISED JANUARY Specifications. Absolute Maximum Ratings Supply voltage, V CC () V Output supply voltage, V CC V Input voltage, V I V Output voltage, V O V CC + V Peak output current, I O (nonrepetitive, t 5 ms): L A Peak output current, I O (nonrepetitive, t µs): LD.. A Continuous output current, I O : L A Continuous output current, I O : LD ma Maximum junction temperature, T J 5 C Storage temperature, T stg 5 5 C () Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. () All voltage values are with respect to the network ground terminal.. ESD Ratings VALUE Electrostatic Human-body model (HBM), per ANSI/ESDA/JEDEC JS- () ± V (ESD) discharge Charged-device model (CDM), per JEDEC specification JESD-C () ± UNIT V () JEDEC document JEP55 states that 5-V HBM allows safe manufacturing with a standard ESD control process. () JEDEC document JEP5 states that 5-V CDM allows safe manufacturing with a standard ESD control process.. Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) V IH Supply voltage High-level input voltage MIN NOM MAX UNIT V CC 4.5 V CC V CC V CC V. V CC V V CC V. V V IL Low-level output voltage. ().5 V T A Operating free-air temperature C () The algebraic convention, in which the least positive (most negative) designated minimum, is used in this data sheet for logic voltage levels..4 Thermal Information THERMAL METRIC () NE (PDIP) UNIT PINS R θja Junction-to-ambient thermal resistance ().4 C/W R θjc(top) Junction-to-case (top) thermal resistance.5 C/W R θjb Junction-to-board thermal resistance.5 C/W ψ JT Junction-to-top characterization parameter. C/W ψ JB Junction-to-board characterization parameter. C/W () For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA5. () The package thermal impedance is calculated in accordance with JESD 5-. V 4
.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) SLRS8D SEPTEMBER 8 REVISED JANUARY PARAMETER TEST CONDITIONS MIN TYP MAX UNIT L: I OH = A V OH High-level output voltage V CC.8 V CC.4 V LD: I OH =. A L: I OL = A V OL Low-level output voltage..8 V LD: I OL =. A V OKH High-level output clamp voltage LD: I OK =. A V CC +. V V OKL Low-level output clamp voltage LD: I OK =. A. V A. I IH High-level input current V I = V µa EN. A I IL Low-level input current V I = µa EN All outputs at high level I CC Logic supply current I O = All outputs at low level 5 ma All outputs at high impedance 8 4 All outputs at high level 4 4 I CC Output supply current I O = All outputs at low level ma All outputs at high impedance 4. Switching Characteristics over operating free-air temperature range (unless otherwise noted) V CC = 5 V, V CC = 4 V, T A = 5 C Propagation delay time, low-to- LNE, LDNE 8 high-level output from A input LDWP, LN LDN 5 t PLH PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ns Propagation delay time, high-to- LNE, LDNE 4 low-level output from A input LDWP, LN LDN C L = pf, Transition time, low-to-high-level LNE, LDNE See Figure output LDWP, LN LDN t PHL t TLH t THL Transition time, high-to-low-level LNE, LDNE output LDWP, LN LDN 5 ns ns ns. Typical Characteristics PTOT Power Dissipation W 5 4 Heat Sink With θ JA = 5 C/W With Infinite Heat Sink Free Air 5 5 5 T A Ambient Temperature C Figure. Maximum Power Dissipation vs Ambient Temperature 5
SLRS8D SEPTEMBER 8 REVISED JANUARY Parameter Measurement Information tf tr % % V Input 5 V 4 V Input 5% 5% Pulse Generator (see Note B) V V CC A EN V CC Y Output C L = pf (see Note A) Output t PHL % % t w t PLH % VOH % 5% 5% % % V OL t THL t TLH TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. C L includes probe and jig capacitance. B. The pulse generator has the following characteristics: t r ns, t f ns, t w = µs, PRR = 5 khz, Z O = 5 Ω. Figure. Test Circuit and Voltage Waveforms
SLRS8D SEPTEMBER 8 REVISED JANUARY 8 Detailed Description 8. Overview The L and LD are quadruple high-current half-h drivers. These devices are designed to drive a wide array of inductive loads such as relays, solenoids, DC and bipolar stepping motors, as well as other high-current and high-voltage loads. All inputs are TTL compatible and tolerant up to V. Each output is a complete totem-pole drive circuit, with a Darlington transistor sink and a pseudo-darlington source. Drivers are enabled in pairs, with drivers and enabled by,en and drivers and 4 enabled by,4en. When an enable input is high, the associated drivers are enabled, and their outputs are active and in phase with their inputs. When the enable input is low, those drivers are disabled, and their outputs are off and in the high-impedance state. With the proper data inputs, each pair of drivers forms a full-h (or bridge) reversible drive suitable for solenoid or motor applications. On the L, external high-speed output clamp diodes should be used for inductive transient suppression. On the LD, these diodes are integrated to reduce system complexity and overall system size. A V CC terminal, separate from V CC, is provided for the logic inputs to minimize device power dissipation. The L and LD are characterized for operation from C to C. 8. Functional Block Diagram V CC 4 5 4 M 4 M 5 8 M V CC Output diodes are internal in LD. 8. Feature Description The Lx has TTL-compatible inputs and high voltage outputs for inductive load driving. Current outputs can get up to A using the L.
SLRS8D SEPTEMBER 8 REVISED JANUARY 8.4 Device Functional Modes Table lists the fuctional modes of the Lx. Table. Function Table (Each Driver) () A INPUTS () EN OUTPUT (Y) H H H L H L X L Z () H = high level, L = low level, X = irrelevant, Z = high impedance (off) () In the thermal shutdown mode, the output is in the high-impedance state, regardless of the input levels. V CC Current Source Input Figure. Schematic of Inputs for the Lx V CC V CC Output Output Figure 4. Schematic of Outputs for the L Figure 5. Schematic of Outputs for the LD 8
SLRS8D SEPTEMBER 8 REVISED JANUARY Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.. Application Information A typical application for the L device is driving a two-phase motor. Below is an example schematic displaying how to properly connect a two-phase motor to the L device. Provide a 5-V supply to V CC and valid logic input levels to data and enable inputs. V CC must be connected to a power supply capable of supplying the needed current and voltage demand for the loads connected to the outputs.. Typical Application 5 V 4 V kω V CC 8 V CC,EN Control A A Y Motor A Y,4EN Control B A Y 4A 5 4Y 4 Thermal Shutdown 4, 5,, Figure. Two-Phase Motor Driver (L).. Design Requirements The design techniques in the application above as well as the applications below should fall within the following design requirements.. V CC should fall within the limits described in the Recommended Operating Conditions.. V CC should fall within the limits described in the Recommended Operating Conditions.. The current per channel should not exceed A for the L (ma for the LD)... Detailed Design Procedure When designing with the L or LD, careful consideration should be made to ensure the device does not exceed the operating temperature of the device. Proper heatsinking will allow for operation over a larger range of current per channel. Refer to the Power Supply Recommendations as well as the Layout Example.
SLRS8D SEPTEMBER 8 REVISED JANUARY Typical Application (continued).. Application Curve Refer to Power Supply Recommendations for additional information with regards to appropriate power dissipation. Figure describes thermal dissipation based on Figure 4. 4 8 TOT Power Dissipation W P θ JA P TOT (T A = C) 4 4 5 θja Thermal Resistance C/W. System Examples.. LD as a Two-Phase Motor Driver Side mm Figure. Maximum Power and Junction vs Thermal Resistance Figure 8 below depicts a typical setup for using the LD as a two-phase motor driver. Refer to the Recommended Operating Conditions when considering the appropriate input high and input low voltage levels to enable each channel of the device. 5 V 4 V kω V CC 8 VCC,EN Control A A Y Motor A Y,4EN Control B A Y 4A 5 4Y 4 Thermal Shutdown 4, 5,, Figure 8. Two-Phase Motor Driver (LD)
System Examples (continued).. DC Motor Controls SLRS8D SEPTEMBER 8 REVISED JANUARY Figure and Figure below depict a typical setup for using the L device as a controller for DC motors. Note that the L device can be used as a simple driver for a motor to turn on and off in one direction, and can also be used to drive a motor in both directions. Refer to the function tables below to understand unidirectional vs bidirectional motor control. Refer to the Recommended Operating Conditions when considering the appropriate input high and input low voltage levels to enable each channel of the device. V CC SES5 M SES5 M 8 A 4A 5 4 V CC / L 4, 5,, Connections to ground and to supply voltage Figure. DC Motor Controls EN Table. Unidirectional DC Motor Control EN A M () 4A M H H Fast motor stop H Run H L run L Fast motor stop L X Free-running motor stop X Free-running motor stop () L = low, H = high, X = don t care V CC SES5 M SES5 8 A A V CC / L EN 4, 5,, Figure. Bidirectional DC Motor Control Table. Bidrectional DC Motor Control EN A A FUNCTION () H L H Turn right H H L Turn left () L = low, H = high, X = don t care
SLRS8D SEPTEMBER 8 REVISED JANUARY Table. Bidrectional DC Motor Control (continued) EN A A FUNCTION () H L L Fast motor stop H H H Fast motor stop L X X Free-running motor stop.. Bipolar Stepping-Motor Control Figure below depicts a typical setup for using the LD as a two-phase motor driver. Refer to the Recommended Operating Conditions when considering the appropriate input high and input low voltage levels to enable each channel of the device. IL/IL = ma C. µf L 5 V CC D5 D + + D8 D4 4 4 V CC L IL 5 L IL D D 8 + + D D D D8 = SES5 Figure. Bipolar Stepping-Motor Control Incorporated
SLRS8D SEPTEMBER 8 REVISED JANUARY Power Supply Recommendations V CC is 5 V ±.5 V and V CC can be same supply as V CC or a higher voltage supply with peak voltage up to V. Bypass capacitors of. uf or greater should be used at V CC and V CC pins. There are no power up or power down supply sequence order requirements. Properly heatsinking the L when driving high-current is critical to design. The Rthj-amp of the L can be reduced by soldering the pins to a suitable copper area of the printed circuit board or to an external heat sink. Figure 4 shows the maximum package power PTOT and the θja as a function of the side of two equal square copper areas having a thickness of 5 μm (see Figure 4). In addition, an external heat sink can be used (see Figure ). During soldering, the pin temperature must not exceed C, and the soldering time must not exceed seconds. The external heatsink or printed circuit copper area must be connected to electrical ground.. mm. mm 8. mm Figure. External Heat Sink Mounting Example (θ JA = 5 C/W)
SLRS8D SEPTEMBER 8 REVISED JANUARY Layout. Layout Guidelines Place the device near the load to keep output traces short to reduce EMI. Use solid vias to transfer heat from ground pins to ground plane of the printed-circuit-board.. Layout Example TTL Logic,EN VCC. μf 5V TTL Logic A 4A 5 TTL Logic Ampere Y 4Y 4 Ampere VIAS 4 5 Ampere Y Y Ampere TTL Logic A A TTL Logic 5V to V 8 VCC,4EN TTL Logic μf Figure. Layout Diagram Copper Area 5-µm Thickness Printed Circuit Board Figure 4. Example of Printed-Circuit-Board Copper Area (Used as Heat Sink) 4