MADR V to 250V Driver for High Power PIN Diode Switches Rev. V1. Functional Schematic. Features. Description. Pin Configuration 1

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Features 20 V to 250 V Back Bias in Off State 200 ma Series Diode Bias Current at +25 C 50 ma Shunt Diode Bias Current at +25 C Propagation Delay less than 8 µs Low Quiescent Current Consumption 3 V or 5 V CMOS Logic Control 7 mm QFN-16LD Package Tape and Reel Packaging Available RoHS* Compliant and 260 C Reflow Compatible Functional Schematic Description The switch driver is designed to work with M/A-COM Technology Solutions high power and high voltage PIN diodes. This driver consists of two independently controlled drivers which are able to provide 200 ma series / 50 ma shunt current to a series/shunt, series/shunt SPDT PIN diode switch. The back bias voltage is configurable from 20 V to 250 V. High voltage level shifters are integrated so that it can be easily controlled by 3 V or 5 V CMOS logic. While consuming low quiescent current, this driver has a typical delay of less than 8 µs when driving 220 pf capacitor load. If needed, the switching speed can be improved by consuming more quiescent power. This driver is packaged in a lead free 7 mm PQFN- 16LD package and is available in tape and reel packaging for high volume applications. Ordering Information Part Number -000100-0001TR -001SMB Package Bulk Packaging 1000 piece Reel Sample Board with Driver & MA4P504-1072T Diodes Pin Configuration 1 Pin No. Pin Name Description 1 SH1 Shunt1 2 C1 Control Logic 1 3 I BIAS Bias Voltage 4 SER1 Series1 5 N/C 2 No Connection 6 GND Ground 7 GND Ground 8 N/C 2 No Connection 9 SH2 Shunt2 10 V CC Control Voltage 11 C2 Control Logic 2 12 SER2 Series2 13 GND Ground 14 N/C 2 No Connection 15 N/C 2 No Connection 16 V DD Drain Voltage 17 Paddle Ground 1. The paddle of the QFN package should be tied to ground. 2. N/C pins (except Pin 15) can be grounded. The clearance from high voltage pins should be at least 0.8 mm. Pin 15 must be left open. 1 * Restrictions on Hazardous Substances, European Union Directive 2002/95/EC.

Recommended Operating Conditions Parameter Test Conditions Unit Min. Typ. Max. V CC Nominal V CC = 3.3 V Nominal V CC = 5.0 V V DD V 20 250 3 Logic 0 Control1, Control2 Logic 1 V V 3.0 4.5 0.0 0.7 V CC 3.3 5.0 0.0 V CC 3.6 5.5 0.3 V CC V CC Series1/Series2 Sinking Current 4-40 C +25 C +85 C ma 300 200 150 Shunt1/Shunt2 Sinking Current 4-40 C +25 C +85 C ma 65 55 50 I BIAS 5,6 +25 C μa 2 6 150 Operating Temperature C -40 +25 +85 3. Unused Controls should be either grounded or connected to V CC. They should never be left open. 4. Refer to Application Circuit: Driving SPDT Switch with MA4P504-1072T Pin Diodes for configuration of diode bias currents. 5. This sinking bias current is necessary for normal driver operation. The easiest way is to connect a 0402 resistor R BIAS between Pin V CC and Pin I BIAS. Then I BIAS can be calculated by: I BIAS = (V CC -0.6)/(500+R BIAS ) 6. Refer to graph Typ. Ton Driving 220 pf Caps vs. IBIAS on page 3 and the chart Typ. IDD vs. IBIAS at 25 C on page 4 for the tradeoff between switching speed and power consumption. Absolute Maximum Ratings 7,8 Truth Table 9 2 Parameter Absolute Maximum V CC -0.5 V to +7 V V DD -0.5 V to 275 V C1, C2 (Logic) -0.5 V to 7 V Series1/Series2 Sinking Current -40 C +25 C +85 C Shunt1/Shunt2 Sinking Current -40 C +25 C +85 C Series/Shunt Outputs Sourcing Current I BIAS ESD HBM Rating Operating Temperature Storage Temperature 550 ma 450 ma 350 ma 150 ma 150 ma 100 ma 25 ma 500 μa >1kV -40 to +125 C -55 to +150 C 7. M/A-COM Technology Solutions does not recommend sustained operation near these survivability limits. 8. Exceeding any one or combination of these limits may cause permanent damage to this device. C1 0 1 C2 Series1 Shunt1 Series2 Shunt2 0 Low High Low High 0 1 Low High High Low 1 0 High Low Low High 1 High Low High Low 9. The actual voltage levels for Low and High are dependent on the current load to the driver. They can be estimated from the driver on resistance. Powering On/Off Sequence: V DD should be turned on after V CC, and the rise time of V DD should be slower than 2.5 µs. When powering off, V DD should be turned off before V CC.

Electrical Specifications: T A = +25 C, V CC = 3.3 V, V DD = 250 V, I BIAS = 6 μa 10 Parameter Test Conditions Unit Min. Typ. Max. Quiescent Supply Currents V CC (3.3 V) 11 V DD (250 V) μa 6 25 10 37 Control Input Leakage Current μa 1 Series Pull-down FET On Resistance 200 ma Load Ω 9 11.4 Shunt Pull-down FET On Resistance 50 ma Load Ω 26 30 Switching Speed Driving 220pF Caps: Series 12 T ON T OFF Tr Tf 50% CTL to 95% Voltage 50% CTL to 5% Voltage 10% - 90% 90% - 10% μs 6.2 0.22 5.1 0.1 Switching Speed Driving 220pF Caps: Shunt 12 T ON T OFF Tr Tf 50% CTL to 95% Voltage 50% CTL to 5% Voltage 10% - 90% 90% - 10% μs 3.1 0.2 2.6 0.08 10. The parameters were measured with 500 kω R BIAS connecting between pin V CC and pin I BIAS. 11. I BIAS is included in the quiescent V CC current due to the bias configuration. 12. Switching parameters were measured driving 220 pf capacitors with no current load. Controls C1 and C2 were tied together. It will be faster when C2 is inverted from C1, which is case driving a SPDT switch. 3

Performance Driving M/A-COM MA4P504-1072T PIN Diode SPDT Switch 13 13. The switch is a series/shunt, series/shunt SPDT switch using four M/A-COM MA4P504-1072T PIN diodes. Schematic is on next page. Switching parameters were measured with 500 MHz 20W CW RF signal. 4

Application Circuit: Driving SPDT Switch with MA4P504-1072T PIN Diodes 14 N/C GND GND N/C TP2 PADDLE VDD N/C N/C GND 14. This is the schematic of MADR-010547-001SMB. The frequency range for this application circuit is 200 MHz to 500 MHz. The bias current for the series diodes is 200 ma. The bias current for the shunt diodes is 50 ma. The recommended inductors are Coil Craft 0603LS-181XJLB for both current and frequency considerations. For different frequency applications, both capacitors and inductors should be adjusted accordingly. 5

Recommended PCB Parts List Footprint Part Value Size C5 0.01 µf, 500 V 0805 C6 - C12 100 pf, 500 V 0805 C13 - C15 0.1 µf, 16 V 0402 L1 - L8 180 nh 0603 R1 1.5 Ω, 1 W 2512 R2 15 Ω, 0.5 W 1206 R3 499 KΩ, 1/16 W 0402 D1 - D4 MA4P504-1072 6

Lead Free 7mm PQFN-16LD ALL DIMENSIONS SHOWN AS in[mm] This is not a JEDEC standard package. Please refer to Application Note for footprint and lead-free solder reflow recommendations. Handling Procedures Please observe the following precautions to avoid damage: Static Sensitivity Silicon Circuits are sensitive to electrostatic discharge (ESD) and can be damaged by static electricity. Proper ESD control techniques should be used when handling these devices. 7

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