ALM-2712 Ultra Low-Noise GPS Amplifier with Pre- and Post-Filter Application Note 548 Introduction The ALM-2712 is a GPS front-end module which consists of a low noise amplifier with pre- and post-filters. The module has very low noise figure of approximately 1.3 db even with the integration of a pre-filter inside the module. This is the lowest noise figure among all the GPS modules in the market with a pre-filter. All three components are housed in a 12-lead MCOB (multiple-chips-on-board) package with small dimensions, 3(L) x2.5 (W) x1(h) mm. The dimensions and the PCB footprint are in ALM-2712 datasheet. Figure 1 shows the simplified internal circuitry. The low noise amplifier inside the module uses Avago Technologies proprietary GaAs Enhancement mode phemt process to achieve low noise, high gain and high linearity. The pre- and post-filters are use FBAR (film bulk acoustic resonator) technology for very low insertion loss and good out-of-band rejection. Integration of these three components produces a GPS front end module with extremely low noise figure and high rejection of out-ofband signals. This helps ensure the receiver s performance in concurrent or simultaneous GPS (S-GPS) operation 1, 2. Operating at 2.7 V and 7.5 ma, the measured performance of the ALM-2712 on the demonstration board shown in figure 6 was: 1.3 db Noise Figure, 14 db gain, +5.3 dbm Vsd Vdd RFin Bias Control LNA Figure 1. Simplified ALM-2712 internal circuitry Module Outline RFout input IP3, 2.3 dbm input P1dB, 8 db IRL and greater than 1 db ORL. By integrating the FBAR filter, the module achieved excellent out-of-band rejection that was greater than 9 dbc over 8-9 MHz, greater than 78 dbc over 162-21 MHz and greater than 68 dbc over 23-27 MHz relative to the 1575 MHz GPS frequency. By using Avago Technologies proprietary GaAs E-pHEMT technology (enhancement-mode pseudomorphic high electron mobility transistor), the ALM-2712 operates with a supply voltage down to 1.8 V. ALM-2712 performance at 1.8 V is shown in Table 2. Along with the exceptional RF performance, the LNA and filters integrated solution requires a mimumum number of external components, which simplifies PCB design and the manufacturing process. In addition, A CMOS-compatible shutdown pin is included either for turning the LNA on/off or for bias current adjustment. Integrated FBAR Filter A simplified block diagram of a GPS mobile phone receiver is shown in the Figure 2. During transmit, part of the transmitted signal may leak into the GPS receiver path. Thus, a good rejection to the transmitting signal band (interferer) is required at the GPS receiver path to avoid the GPS chipset from being overloaded by the strong interference power. The ALM-2712 module includes an integrated input FBAR filter and an output FBAR filter. FBAR is a breakthrough resonator technology developed by Avago Technologies. This technology produces small size filters with excellent Q. The excellent Q translates into a very steep filter roll-off and superb out-of-band rejection. With the integrated filters, the module has exceptional out-of-band rejection to the interferer signal. This excellent out-of-band rejection ensures that the receiver s sensitivity does not degrade in the presence of strong interferers.
Band Select GPS Rx GPS Chipset Tx Signal leak to GPS Rx Path ALM-2712 (Filter + LNA + Filter) PCS AWS Cellular Tx Chipset WLAN Mobile Satellite Figure 2. Rx Front end simplified block diagram Vdd (Pin 9) RF Out (Pin 8) (Pin 7) (Pin 1) (Pin 6) Figure 3. Pin configuration Vsd (Pin 11) (Pin 5) TOP VIEW (Pin 12) (Pin 4) RF in (Pin 1) (Pin 2) (Pin 3) between the Vsd pin and the 2.7 V voltage supply to drop the voltage and set the bias current at 7.5 ma. The current drawn by the Vsd pin is in the range of a few hundred microamperes. The bias current can be reduced by increasing the value of R2 to save power consumption. Increasing the bias current by reducing the resistor will improve linearity. Alternatively, the voltage supply to the Vsd pin can be varied to set the appropriate operating current. The adjustable current allows a designer to make a tradeoff between gain, noise figure, and linearity with current consumption. Performance over different bias current levels can be found in ALM-2712 datasheet along with appropriate voltage levels and resistor values. The LNA module also features a shutdown circuitry that is beneficial for portable devices that have limited battery life. When the module is in the shutdown mode, the current consumption is.5 μa, and the forward isolation is ~14 db. The LNA module can be easily turned off by applying V to.3 V to Vsd (pin 11), which is CMOS-compatible. The Vsd pin can be connected to a microcontroller to switch the LNA module to shutdown mode when it is not needed to extend the battery life. Figure 4 shows the Gain versus Vsd plots with different biasing resistor, R2, values. Pin configuration, Biasing, Variable Bias Current and Shutdown Function Figure 3 shows the pin configuration of the ALM-2712. The bias circuitry is integrated internally to simplify the external biasing circuitry of the module. Pin 2 (Ground) is connect to the center paddle with a thin line to make it symmetrical to the RF Out pin for good solderability of the module on PCB. Unlike the typical depletion-mode phemt LNA, Avago s enhancement-mode phemt LNA in the ALM-2712 requires only one positive voltage supply to bias the LNA. In this design, Vdd (pin 9) and Vsd (pin 11) are supplied with 2.7 V. A 6.8 kω resistor ( R2 in Figure 5 and Figure 6) is Gain, db 15 1 5-5 -1-15 Gain versus Vsd.5 1 1.5 2 2.5 3 Vsd, volts Figure 4. Gain vs. Vsd. Vdd=2.7V, Rbias=6.8kohm Vdd=1.8V, Rbias=2.7kohm 2
Application Circuit for ALM-2712 in GPS Receiver Application Figure 5 shows the ALM-2712 GPS receiver application circuit. A DC blocking capacitor is not needed externally at the device output. The ALM-2712 s input matching and RF chokes are integrated internally. Thus, only two bypass capacitors are required on the power supply (Vdd line). Ultimately, the external components crucial for the actual application are just two bypass capacitors (C1 and C2) and one bias resistor (R2). Capacitor C3 is optional as this component is a supply decoupling capacitor and doesn t significantly affect RF performance of the GPS module. The component placement on the demonstration board is shown in Figure 6. The bill of material is shown in Table 1. Performance measured on the demonstration board is summarized in Table 2. RFin C3 R2/Rbias Vsd Bias Control LNA Vdd ALM-2712 RFout Module Outline Figure 5. GPS LNA application circuit schematic C1 C2 Component Placement, Bill of Material and PCB Layout Table 1. Bill of Material Size Low Noise Manufacturer & Part Number Description C1 42.1 μf Murata GRM1555R Bypass Capacitor C2 42 47 pf Murata GRM1555C Bypass Capacitor/Output Matching C3 42 6.8 pf Murata GRM1555C Bypass Capacitor R2 42 2.7 kω Biasing at 5 ma (Vsd=1.8 V) 42 6.8 kω Biasing at 7.5 ma (Vsd=2.7 V) Vsd Vdd zero ohm jumper RFin C 3 R 2/Rbias ALM - 2712 C 1 C 2 RFout Figure 6. Demonstration board component placement 3
Figure 7a and 7b show the layout of each PCB layer and the stacking structure of the demonstration board. Top view (Top ground metal) Top view (Inner transmission line/ Inner 2) Top view (Bottom inner ground metal/inner 1) Top view (Bottom ground metal) Figure 7a. Demonstration board Layout The demonstration board uses stripline to maximize module performance. The stripline design has the transmission line/trace sandwiched between two substrate planes that are adjacent to ground planes. As shown in Figure 7a, the stripline is on the Inner 2 layer. The stripline is sandwiched between two Rogers 435 substrates (2 mil and 18 mil). Each substrate has a ground plane at the side opposite to the stripline the Inner 1 layer and the bottom layer are the ground planes. These ground planes shield the transmission line, reducing coupling to adjacent traces, packaging material and shielding. A comparison between a stripline design and a CPWG (Coplanar Waveguide with Ground) transmission line design that discusses the shielding effect is available in the Avago Technologies Application Note 5414. 3 4
Top.5 oz copper Inner 1 Inner 2 Bottom Total Thickness 62 mils Stacking Structure Top.5 oz Metal/ Ground FR4 ~21mils Support Material, for mechanical strength (adjust to achieve total board thickness of 62 mils) Inner 1.5 oz Metal/ Ground Substrate 1 2 mils Rogers RO435 Inner 2.5 oz Metal/ Transmission Line Substrate 2 18 mils Rogers RO435 Bottom.5 oz Metal/ Ground Figure 7b. PCB stacking structure The ALM-2712 has exceptionally good out-of-band rejection, with attenuation greater than 6 db. To achieve high attenuation, proper PCB layout is mandatory. One factor that could limit the out-of-band rejection performance is RF feedthrough between the input port and output port. It is recommended that the PCB layout has plated through via holes connect to the common ground layer surrounding the input and output ports. This will help minimize the RF feedthrough and increase the isolation between the input port and output port. Figure 7c shows some DO s and DON Ts for the PCB layout. DON'T 1. Ground surrounding the input port and output port is separated. 2. No via holes on the ground surrounding input port and output port. DO's 1. Ground surrounding the input port and output port connected completely. 2. Via holes on the ground surrounding input port and output port. Figure 7c. PCB layout recommendations. 5
Product Performance Table 1 summarizes the performance of the ALM-2712. All the parameters are measured on the demonstration board using the test setup shown in Figure 1. Table 2. RF Performance for the ALM-2712 at 1.575 GHz. Supply Voltage, Vdd Volts 2.7 1.8 Shutdown Voltage, Vsd Volts 2.7 1.8 Current, Id ma 7.5 5 Stability Factor, k (3 khz 2 GHz) >1 >1 Gain, S21 db 14 12.9 Noise Figure, NF db 1.3 1.4 Input Return Loss, IRL db 8 7.4 Output Return Loss, ORL db >1 >1 Reverse Isolation db 23 21 Input 3 rd order Intercept Point, IIP3 * dbm +5.3 +3.6 Out of band Input 2 nd order Intercept Point, IIP2 ** dbm 72 69.9 Input P1dB, IP1dB dbm 2.3 * Test condition: F RF1 = 1.5725 GHz, F RF2 = 1.5775 GHz with input power of -2 dbm per tone measured at the worst case side band. ** Test condition: F RF1 = 824.6MHz and input power level of -17 dbm, F RF2 = 24 MHz and input power level of -4 dbm. IIP2= Pin RF2 + [Pin RF1 (Pout RF2-RF1 GPS_Gain)] Figures 8 and 9 show the gain, return loss, reverse isolation, out-of-band rejection and stability of the ALM-2712 on the demonstration board. Input Return Loss, db -5-1 -15-2 Input Return Loss versus Frequency -25 154 155 156 157 158 159 16 161 Gain, db 16 14 12 1 8 6 4 2 Gain versus Frequency 154 155 156 157 158 159 16 161 Output Return Loss versus Frequency -2 Reverse Isolation versus Frequency -5-3 Output Return Loss, db -1-15 -2 Reverse Isolation, db -4-5 -6-7 -25 154 155 156 157 158 159 16 161 Vdd/Idd=2.7 V/7.5 ma -8 154 155 156 157 158 159 16 161 Vdd/Idd=1.8 V/5 ma Figure 8a. Gain, return loss, and reverse isolation vs. frequency. 6
Attenuation, db -74-75 -76-77 -78-79 -8-81 -82 Attenuation Versus Frequency -83-84 8 85 9 95 1 Attenuation, db -1-2 -3-4 -5-6 -7-8 Attenuation Versus Frequency -9 16 165 17 175 18 185 19 195 2 Attenuation, db -1-2 -3-4 -5-6 -7 Attenuation Versus Frequency -8 2 21 22 23 24 25 26 27 Vdd/Idd=2.7 V/7.5 ma Vdd/Idd=1.8 V/5 ma Figure 8b. Out-of-band rejection vs. frequency. K factor K factor Versus Frequency 1 9 8 7 6 5 4 3 2 1 154 155 156 157 158 159 16 161 Vdd/Idd=2.7 V/7.5 ma K factor 3 25 2 15 1 5 Vdd/Idd=1.8 V/5 ma K factor Versus Frequency 4 8 12 16 2 Figure 8c. K factor vs. frequency. 7
Following plots show the degradation of the module s noise figure at the presence of strong interferer/jamming signal. The degradation is with reference to the module s noise figure when there is no interferer/jamming signal presence. Each plot on the graph represents interferer with different frequency as show by the label on the graph. The plots show that the degradation is insignificant with interferer strength up to 2 dbm. The test setup for the measurement is illustrated in Figure 1. Noise Figure Degradation, db.2.18.16.14.12.1.8.6.4.2 Noise Figure Degradation Versus Jamming Signal Strength 85 MHz 89 MHz 915 MHz 162 MHz 171 MHz 1885 MHz 191 MHz -5-4 -3-2 -1 1 2 Jamming Signal Strength, dbm Figure 9a. Noise Figure degradation versus jamming signal strength at Vdd/Idd = 2.7 V/7.5 ma. Noise Figure Degradation, db.2.18.16.14.12.1.8.6.4.2 Noise Figure Degradation Versus Jamming Signal Strength 85 MHz 89 MHz 915 MHz 162 MHz 171 MHz 1885 MHz 191 MHz -5-4 -3-2 -1 1 2 Jamming Signal Strength, dbm Figure 9b. Noise Figure degradation versus jamming signal strength at Vdd/Idd = 1.8 V/5 ma. NF Meter Calibration at this point Input Power Reference Point Use power meter to read input Noise Source Agilent N4A Signal Generator Agilent MXG N5182A Jamming Signal Isolator PA Jammer Frequency Tunable Bandpass Filter K&L Microwave Power Amplifier Mini Circuits ZHL-42 Power Combiner 1.575 GHz 1.575 GHz Tunable Notch Filter K&L Microwave Coaxial Cable DUT GPS Bandpass Filter NF Analyzer Agilent N8975A Bandpass Filter will filter the noise generated by the pre-amplifier. Notch Filter provides a clean signal at the jammer frequency (The cascaded notch filter gives greater than 1 db of rejection @1.575 GHz) Figure 1. Test setup for Noise Figure degradation with presence of jamming signal. The noise source at the GPS frequency is integrated together with the jamming signal using a power combiner before the signal is delivered to the device under test. At the jamming signal source, a power amplifier is used to boost the power level of the jamming signal. An isolator and filters are placed in the jamming signal path to attenuate the noise (at GPS frequency) generated by the signal generator and power the amplifier from leaking into the noise figure analyzer, which could cause an inaccurate noise figure measurement. A GPS bandpass filter is inserted before the noise figure analyzer to prevent the analyzer from being overloaded by the strong jamming signal. 8
Voltage Supply from RF Output Line Some applications may require the Vdd voltage supply to come from the RF output line. The schematic in Figure 11 shows such a circuit implemented with an additional inductor at the RF output. In order to minimize the effect on RF performance, the RF choke should have impedance ten times higher than the RF output trace, or the inductor series resonant frequency should be close to or higher than the operating frequency. Vsd Vdd DC Voltage C 3 C 1 R 2/Rbias C 2 RFin Bias Control LNA RFout ALM-2712 Figure 11. Voltage Supply from RF Output Line Module Outline Conclusion This application note demonstrates the performance of the ALM-2712 a GPS LNA module with very low noise figure, high linearity and good blocking to the interferer signal, even when operating at low voltage and current. The ALM-2712 needs very few external components and includes a power shutdown circuit and adjustable current capability in a compact MCOB package. Note: 1. S. Spiegel et al, Improving the Isolation of GPS Receivers for Integration with Wireless Communication Systems, Proc. IEEE RFIC Symposium, pp563-566, 23. 2. Yut H. Chow et al, A 1V,.9dB Noise-Figure High Linearity LNA MMIC for Concurrent GPS Handset application, Proc Asia Pacific Microwave Conference, 26 3. Application Note: Application Note 5414 GPS Low Noise Amplifier Front-end Module with Integrated Pre and Post Filter and Variable Current/Shutdown Function (http://www.avagotech.com/docs/av2-2412en) For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 25-21 Avago Technologies. All rights reserved. AV2-2474EN - July 13, 21