Future of Superconductivity Trends, Certainties and Uncertainties II. Electronics and its Applications Alex I. Braginski Research Center Juelich, PGI-8 D-52428 Juelich, Germany Future of S/C Electronics: Eur. Superconductivity Summer School 1
Superconducting Electronics Essential Components: Josephson junctions (JJ, nonlinear devices, no power amplification) Linear devices (resonators, filters, transmission lines) Circuit components, LRCJ, integrated in multi-level planar technology Wire 3 Example: schematic cross-section of simple integrated LRJ circuit Wire 2 Wire 1 Wire 2 Silicon Wafer Josephson Junction Ground Plane MoN x 5 /sq. Resistor Mo/Al 0.15Ω/sq. Resistor Legend: Nb SiO 2 Nb 2 O 5 Junction Anodization Roadmap: see S. Anders et al, Physica C, 470, 2079-2126 (2010) Future of S/C Electronics: Eur. Superconductivity Summer School 2
Josephson Tunnel Junction q Insulator (~1 nm) Magnetic field J J h V f 2e 1 dq f 2 dt h 2e C sin q 0 2.07mv ps Damping Parameter 2 bc 0 I R R C C d d b c > 1 b c < 1 I C I C Future of S/C Electronics: Eur. Superconductivity Summer School 3
The Superconducting QUantum Interference Device Two Josephson junctions in a superconducting ring (dc SQUID): I Input V The current-voltage (I-V) characteristic is modulated by magnetic flux Φ with a period of one flux quantum o = h/2e 2 x 10-15 T m 2 I V n o Ib (n+1/2) o DV V dv d 0 1 2 o (Clarke group slide) Future of S/C Electronics: Eur. Superconductivity Summer School 4
SQUID Sensors & Flux Transformer Josephson junction DC SQUID Magnetometer substrate I DC counter electrode barrier base electrode Flux transformer JJ L SQUID JJ feedback and modulation to amplifier Magnetometer 2nd order gradiometer 3rd order gradiometer 1st order gradiometer Future of S/C Electronics: Eur. Superconductivity Summer School 5
Low-T c SQUID Operating temperature = 4.2 K Multilayer device: niobium - aluminum oxide - niobium 20 m 500 m Josephson junctions Nb-AlO x -Nb SQUID with input coil (Clarke group slide) Future of S/C Electronics: Eur. Superconductivity Summer School 6
Sensitivity of SQUIDs Magnetic field resolutions of < 1 10 ft/hz 1/2 at frequencies above 1 to 10 Hz, up to low MHz (to compare: 1 ft = 10-15 tesla = 10-11 gauss is 5x10 8 weaker than the Earth s magnetic field) Magnetic flux resolutions of 10-6 0 /Hz 1/2 in the frequency range above: 0 2.068 x 10-15 Wb Below the corner frequency of 1 10 Hz, the resolution deteriorates (increases) usually as 1/f HTS SQUID an order of magnitude less sensitive (white noise), even worse at low f Future of S/C Electronics: Eur. Superconductivity Summer School 7
Applications of S/C Electronics Mostly Analog (today in use): Sensing & readout many fields of application Metrology (quantum standards) Mostly Digital (uncertain future): Communication Data processors and computers Quantum computing(?) Future of S/C Electronics: Eur. Superconductivity Summer School 8
Cryocooler Efficiency Comparison (Risto Mikkonen slide) Also: lower ratings, lesser efficiency & reliability! Future of S/C Electronics: Eur. Superconductivity Summer School 9
Uses of Sensing and Readout Commercial laboratory instrumentation Astronomy, cosmology, physics (previous lecture) Material analysis and test (previous lecture) Security, imaging (partly previous lecture) Medical diagnostics (covered in Part I) Geophysical prospecting Detection of faults (NDE of materials, structures, one example in Part I, more here) Future of S/C Electronics: Eur. Superconductivity Summer School 10
Laboratory Instruments LTS SQUID is the enabling component Well-established, > $ 200 M/year industry (QD lead) Prime example: laboratory magnetometers QD Double-balanced SQUID QD MPMS (1985 present) Future of S/C Electronics: Eur. Superconductivity Summer School QD SQUID-VSM (2010) (Courtesy, R. Sager, QD) 11
NDE of Food Products Operator console Conveyor belt SQUID system used in Japan for routine detection of ferromagnetic contaminants in thick cheese blocks ; growing use. Future of S/C Electronics: Eur. Superconductivity Summer School (Courtesy S. Tanaka, Toyohashi Univ. Techn.) 12
NDE of Electronic Circuits MAGMA SQUID microscope for chip and package failure analysis AMD processor chip failure image Present: 15 systems in the field (USA), mostly for short detection Possible future: wide use for multilayered chips & packages Future of S/C Electronics: Eur. Superconductivity Summer School (Courtesy A. Orozco, Neocera) 13
Package Die Wire connecting to I/O pin (V+) Aprox. Die area C4 bump (interconnect package/die for flip-chip devices) Short Wire connecting to ground (Courtesy A. Orozco, Neocera) Future of S/C Electronics: Eur. Superconductivity Summer Solder ball (replaced by pins in land-grid-array devices like the AMD) School 14
Geomagnetic Prospecting Two methods using SQUID now in field use: Transient ElectroMagnetics (TEM) ground Tensor magnetometry (TM) airborne TEM uses LTS and HTS SQUIDS, TM only LTS. Both methods generated US$ billions in newly discovered ore deposits. Mining companies advertise SQUID use to enhance stock value! Trend for more general adoption/use in the future. Major activity in China (plan to prospect the whole land 600 m underground) TM prospecting in Africa (Courtesy R. Stoltz, IPHT) Future of S/C Electronics: Eur. Superconductivity Summer School 15
Metrology: DC Voltage Standard (I) AC Josephson effect: V = nhf/2e EM irradiation of JJ results in constant voltage steps on I-V Historical recording of Shapiro steps on the I-V curve (courtesy: Harris, NIST) Modern 10 V chip: 70,000 JJs Future of S/C Electronics: Eur. Superconductivity Summer School Level of agreement between V standards 16
Metrology: DC Volt Standard (II) Automated 10 V standard (IPHT) SupraVOLTControl 1 Pulse-tube cooler with JJ array (LTS) 2 Control electronics 3 Source locking counter (EIP-578B) 4 Nanovoltmeter (Keithley 2182A) 5 Channel polarity reversal switch 6 Sensors for T, p and humidity 7 Operator s laptop 8 Compressor unit, 2.5 KW (for PT cooler) (M. Starkloff & al, QM 2011) Agreement within 2-x10-10 HTS entering: now 100 mv Solution for poor countries, agreement now < 10-7 Future: programmable AC standard Long term: metrological triangle: V,f,I Future of S/C Electronics: Eur. Superconductivity Summer School 17
Digital Technology: Today SFQ High speed and ultra-low on-chip power dissipation Fastest, lowest power digital logic Clock 100 GHz expected ~ nw/gate/ghz expected Wideband communication on-chip and inter-chip Low-loss, low-dispersion, impedance matched superconducting transmission lines 60 GHz data transfer demonstrated with negligible cross-talk Comparison of a 12 hypothetical GFLOPS SFQ and CMOS chip 40 kgate SFQ chip 50 GHz clock 2 mw Plus 0.8 W cooling power 2 Mgate CMOS chip 1 GHz clock 80 W Also requires cooling (courtesy A. Silver) Future of S/C Electronics: Eur. Superconductivity Summer School 18
SQUIDs Are Basic SFQ Elements Combine flux quantization with the non-linear Josephson effects Store flux quantum or transmit SFQ pulse Licirc 2 q JJ 2 k ; k =integer o junctions Inductor Flux 0 JJ JJ 0 Input Double JJ (DC) SQUID Future of S/C Electronics: Eur. Superconductivity Summer School 19
SFQ: a Current-based Technology I bias ~1mV Input JJ ~2ps When (Input + I bias ) exceeds JJ critical current I c, JJ flips, producing an SFQ pulse. Area of the pulse is: 0 =2.067 mv-ps Pulse width shrinks as J C increases SFQ logic is based on counting single flux quanta SFQ pulses propagate along impedance-matched passive transmission line (PTL) at the speed of light in the line. Multiple pulses can propagate in PTL simultaneously. Future of S/C Electronics: Eur. Superconductivity Summer School 20
SFQ Gates Clock Data Data Latch (DFF) SFQ pulse is stored in a larger-inductance loop Clock pulse reads out stored SFQ If no data is stored, clock pulse escapes through the top junction OR Gate (merger) Pulses from both inputs propagate to the output PTLs transmit clock and data signals AND Gate Two pulses arriving simultaneously switch output junction DFF in each input produces clocked AND gate Typical number of junctions per gate is 5-10 Future of S/C Electronics: Eur. Superconductivity Summer School 21
SFQ: The Lowest Power Digital Technology One SFQ pulse dissipates I C 0 in shunt resistor For I C = 100 A 2 x10-19 Joule (~ 1eV) ~ 5 junctions switch in single logic operation 1 nw/gate/ghz 100 nw/gate at 100 GHz V bias I bias Static power dissipation in bias resistors: I 2 R For I C = 100 A biased at 0.7 I C Typical V bias = 2 mv (to maximize bias margin) 140 nw/jj, 1400 nw/gate is 23 X the dynamic power Voltage-biased SFQ gates may eliminate bias resistors and static power dissipation Self-clocked complementary logic Incorporates clock distribution circuitry V bias = 0 f Clock ; also see O. Mukhanov, ASC 2010 Data V bias Future of S/C Electronics: Eur. Superconductivity Summer School 22
SFQ Limitations JJ features no power amplification, therefore: difficult VLSI, narrow margins (element tolerances) Also, mv level I/O; low fan-out pulse splitting; No really viable memory concept memory hybrids Cross-talk; need for intensive magnetic shielding Status: 10 4 JJs on chip integration level (10 5 certainly viable, demonstrated in 2005 partly tested). Typical J c level 10 3 10 4 A/cm 2 level, need 10 5 A/cm 2 level for very high speed 100 GHz; low gate density. Antiquated IC technology (lithography linewidth) limits speed. No funding by IC industry, low-level by govts (mostly Japan). Successful demos, e.g., in telecommunication; military (USA). Future of S/C Electronics: Eur. Superconductivity Summer School 23
Comparison of SFQ - CMOS Functions Function CMOS SFQ Basic Switch Transistor Josephson tunnel junction (a 2 terminal device) Data Format Voltage level Identical picosecond (current) pulses Speed Test Data Transfer Clock Distribution Ring oscillator Voltage data bus RC delay with power dissipation Voltage clock bus Asynchronous flip-flop, static divider 770 GHz achieved 1,000 GHz expected Ballistic transfer at ~ 100 m/ps in nearly lossless and dispersion-free passive transmission lines (PTL) Clock pulse regeneration and ballistic transfer at ~ 100 m/ps in nearly lossless and dispersion-free PTLs Logic Switch Complementary transistor pair Two-junction comparator Bit Storage Charge on a capacitor Current in a lossless inductor Fan-In, Fan-Out Large Small Power Volt levels Millivolt levels Power Distribution Ohmic power bus Lossless superconducting wiring Noise 300 K thermal noise 4 K thermal noise that enables low power operation Future of S/C Electronics: Eur. Superconductivity Summer School 24 (Courtesy A. Silver, 2006)
X-band Single-Chip All-Digital-RF Receiver (XADR) Output Amplifiers Digital Mixer Digital Decimation Filter (I) Bandpass Delta- Sigma ADC Modulator Digital Decimation Filter (Q) Clock Divider dk32100ch1xbadr Bandpass Second-order Continuous-time Delta-Sigma ADC Modulator Two LC resonators (f 1 ~7.4 GHz and f 2 ~7.6 GHz) Dual-J c Design (4.5 ka/cm 2, f clk =4f 0 ~30 GHz) Future of S/C Electronics: Eur. Superconductivity Summer School 25 (Courtesy O: Mukhanov, HYPRES)
XTAR Satellite X-band Transmitter Data: PRBS test signal and Video were transmitted over satellite and received by HYPRES XADR system in real time X-band Digital-RF Receiver COTS Digital Modem COTS Digital Modem (Courtesy O. Mukhanov, HYPRES) Future of S/C Electronics: Eur. 26 Superconductivity Summer School
Latest Version of All-Digital Receiver (ADR-7) temp and vacuum gauges (optional) dc current source cryopackaged ADR chip output amplifiers and signal post processing Now, regular HYPRES product Future of S/C Electronics: Eur. Superconductivity Summer School (Courtesy O. Mukhanov, Hypres) 27
Telecommunication Project Japanese NEDO project: Development of Next Generation High-efficiency Network Device Technology, 2007-2011 Goal: establishing enabling technologies for the next generation high-efficiency networks Develop highly efficient large-scale edge routers, ultra high-speed local area networks and related telecommunication systems LTS devices included (ISTEC only) SFQ-based LTS technology Also, in quantum communication, single-photon superconducting detectors see R.H. Hadfield, Nature Photonics 3, 696 (2009) Future of S/C Electronics: Eur. Superconductivity Summer School 28
Dream: Petaflop Computing 4 K 40-70 K The past large project (USA) migh still be revived! Future of S/C Electronics: Eur. Superconductivity Summer School (Courtesy A. Silver, 2006) 29
Notional Diagram of a S/C Processor Ambient Electronics 4 Kelvin Wideband I/O Cryogenic RAM Superconductor Processors High Speed Cryogenic Switch Network Superconductor processors communicate with local cryogenic RAM and with the cryogenic switch network. Cryogenic RAM communicates via wideband I/O with ambient electronics. Future of S/C Electronics: Eur. Superconductivity Summer School (Courtesy A. Silver, 2006) 30
Quantum Computing (at millikelvin temperatures) Quantum computing is being investigated using superconducting qubits. Flux-based superconducting qubits are physically similar to SFQ devices. SFQ circuits are best candidates to control/read superconducting qubits at millikelvin temperatures. Presently the only scalable approach 8-qubit processor reported (D-Wave; ASC 2010) Major problem: short quantum decoherence time Future of S/C Electronics: Eur. Superconductivity Summer School 31
Current-biased JJ: Macroscopic Quantum Effect WASHBOARD POTENTIAL vs I BIAS Metastability increases for higher I Oscillation f decreases for higher I Evidence for quantized oscillations: escape rate resonances with external RF (J. Clarke et al., Science 239 (1988) 992) Future of S/C Electronics: Eur. Superconductivity Summer School 32
Flux Qubit Excited state Ground state Circulating currents Classical states with lowest energy have persistent currents with opposite sign. Future of S/C Electronics: Eur. Superconductivity Summer School (Courtesy H. Mooij, Delft Kavli Inst.) 33
Summary Laboratory SQUID instruments: established industry Of analog applications, superconducting detector arrays exhibit the fastest growth (present 10 3 pixels, towards > 10 4 pixels & beyond) NDE has future for most critical tasks, now minor impact Geomagnetic prospecting increasing field use with very high economic impact Metrology: slow growth, chances for HTS Digital processors exist, computers are feasible, advantages major, but future is highly uncertain; niche! Quantum computing with superconducting qubits is the most active research area; but.. highest uncertainty! Future of S/C Electronics: Eur. Superconductivity Summer School 34