Typical Applications The is ideal for: Telecom Infrastructure Microwave Radio & VSAT Military EW, ECM & C 3 I Test Instrumentation Fiber Optics Functional Diagram Features P1dB Output Power: + dbm Gain: db Output IP3: +3 dbm Supply Voltage: +V @ 29 ma Ohm Matched Input/Output 2 mm 2 Leadless SMT Package General Description The is a GaAs MMIC PHEMT Distributed Power Amplifiers in leadless x mm surface mount packages which operate between 2 and GHz. The amplifier provides db of gain, +3 dbm output IP3 and + dbm of output power at 1 db gain compression while requiring 29 ma from a +V supply. Gain flatness is good from 2 - GHz making the ideal for EW, ECM and radar driver amplifiers as well as test equipment applications. The wideband amplifier I/O s are internally matched to Ohms. Electrical Specifications, T A = +2 C, Vdd= V, Vgg2= 3V, Idd= 29 ma [1] Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Units Frequency Range 2. - 6. 6. -.. -. GHz Gain 11. 13. 11 db Gain Flatness ±. ±. ±1. db Gain Variation Over Temperature.2.3.3.4..6 db/ C Input Return Loss 7 db Output Return Loss 9 11 db Output Power for 1 db Compression (P1dB) 23.. 2 21 dbm Saturated Output Power (Psat) 27.. dbm Output Third Order Intercept (IP3) 32 dbm Noise Figure 4. 4. 6. db Supply Current (Idd) (Vdd= V, Vgg= -.V Typ.) [1] Adjust Vgg1 between -2 to V to achieve Idd = 29 ma typical. 29 29 29 ma 1 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96
Gain & Return Loss RESPONSE (db) - - - - -2 S21 S11 S -3 2 4 6 Input Return Loss vs. Temperature RETURN LOSS (db) - - - - -2 +2C +C -4C -3 2 4 6 Gain vs. Temperature GAIN (db) 6 4 2 +2C +C -4C 2 4 6 Output Return Loss vs. Temperature RETURN LOSS (db) - - - - +2C +C -4C -2 2 4 6 Gain & Return Loss @ Vdd= V, Vgg2= 2V, Idd= ma RESPONSE (db) - - - - -2 S21 S11 S -3 2 4 6 Gain & Return Loss @ Vdd= V, Vgg2= 2V, Idd= ma RESPONSE (db) - - - - -2 S21 S11 S -3 2 4 6 For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96 2
Gain & Return Loss @ Vdd= V, Vgg2= 2V, Idd= ma RESPONSE (db) - - - - -2-3 2 4 6 P1dB vs. Temperature 3 2 S21 S11 S +2C +C -4C 2 4 6 Reverse Isolation vs. Temperature REVERSE ISOLATION (db) - - -3-4 - -6 +2C +C -4C -7 2 4 6 Noise Figure vs. Temperature NOISE FIGURE (db) 11 9 7 6 4 3 2 1 +2C +C -4C 2 4 6 P1dB vs. Iddq @ Vdd=V, Vgg2=2V 3 2 ma ma ma 2 4 6 P1dB vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA 3 2 +2C +C -4C 2 4 6 3 For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96
P1dB vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA Power Compression at.9 GHz Pout(dBm), GAIN(dB), PAE(%) 3 2 3 2 6 4 2 +2C +C -4C 2 4 6 - - -9-6 -3 3 6 9 INPUT POWER (dbm) Pout Gain PAE 37 3 32 3 27 2 17 7 2 Idd (ma) P1dB vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA Psat vs. Temperature 3 2 2 4 6 3 2 +2C +C -4C +2C +C -4C 2 4 6 Idd Psat vs. Iddq @ Vdd=V, Vgg2=2V 3 2 ma ma ma 29mA 2 4 6 Vdd (V) Psat vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA 3 2 +2C +C -4C 2 4 6 For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96 4
Psat vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA Output IP3 vs. Temperature 3 2 36 34 32 3 2 +2C +C -4C 2 4 6 +2C +C -4C 2 4 6 Psat vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA 3 2 +2C +C -4C 2 4 6 Output IP3 vs. Iddq @ Vdd=V, Vgg2=2V 4 3 36 34 32 3 2 ma ma ma 2 4 6 Output IP3 vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA 4 4 3 Output IP3 vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA 4 4 3 3 2 3 2 +2C +C -4C +2C +C -4C 2 4 6 2 4 6 For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96
Output IP3 vs. Temperature @ Vdd=V, Vgg2=2V, Iddq=mA 4 4 3 3 2 Absolute Maximum Ratings Drain Bias Voltage (Vdd) Gate Bias Voltage (Vgg1) Gate Bias Voltage (Vgg2) +2C +C -4C 2 4 6 RF Input Power (RFIN)(Vdd = + Vdc) +9 Vdc -2 to Vdc (Vdd -.) Vdc to Vdd + dbm Channel Temperature C Gain, Power & Output IP3 vs. Supply Voltage @ GHz, Fixed Vgg1 Gain (db),,, 32 3 2 7.. Typical Supply Current vs. Vdd Vdd (V) Vdd (V) Gain P1dB Psat IP3 Idd (ma) +7. 292 +. 29 +. 2 Continuous Pdiss (T= C) (derate 1. mw/ C above C) Thermal Resistance (channel to ground paddle) 3.3 W 19.4 C/W ELECTROSTATIC SENSITIVE DEVICE OBSERVE HANDLING PRECAUTIONS Storage Temperature -6 to + C Operating Temperature -4 to + C ESD Sensitivity (HBM) Class 1A For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96 6
Outline Drawing DETAIL A (JEDEC 9) Package Information PKG-49 PIN 1 INDICATOR.9.. SEATING PLANE Part Number Package Body Material Lead Finish MSL Rating Package Marking [2] [1] H464 RoHS-compliant Low Stress Injection Molded Plastic % matte Sn MSL1 XXXX [1] Max peak reflow temperature of C [2] 4-Digit lot number XXXX.. SQ 4.9 TOP VIEW. BSC.4.4.3.3.2. 17 2. MAX.2 NOM COPLANARITY.. REF EXPOSED PAD BOTTOM VIEW 3. REF COMPLIANT TO JEDEC STANDARDS MO-2-VHHD-4. 32-Lead Lead Frame Chip Scale Package [LFCSP] mm mm Body and. mm Package Height (HCP-32-1) Dimensions shown in millimeters. 32 9 1 PIN 1 INDICATOR AREA OPTIONS (SEE DETAIL A) 3. 3.7 SQ 3.6. MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 3-9-17-B 7 For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96
Pin Descriptions Pin Number Function Description Interface Schematic RFIN Vgg1 21 RFOUT & Vdd 3 Vgg2 Application Circuit This pin is AC coupled and matched to Ohms. Gate Control for amplifier. Adjust between -2 to V to achieve Idd= 29 ma. RF output for amplifier. Connect the DC bias (Vdd) network to provide drain current (Idd). See application circuit herein. Control voltage for amplifier. +3V should be applied to Vgg2 for nominal operation. Ground Paddle GND Ground paddle must be connected to RF/DC ground. 1-4, 6 -, -, - 29, 31, 32 N/C No connection. These pins may be connected to RF ground. Performance will not be affected. NOTE 1: Drain Bias (Vdd) must be applied through a broadband bias tee or external bias network. For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96
Evaluation PCB List of Materials for Evaluation PCB 344 [1] Item Description J1, J2 PCB Mount SMA Connector J3, J4 2 mm Molex Header C1, C2 pf Capacitor, 42 Pkg. C3, C4 pf Capacitor, 63 Pkg. C, C6 4.7 µf Capacitor, Tantalum U1 PCB [2] 9762 Evaluation PCB [1] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: Rogers 43 The circuit board used in the final application should use RF circuit design techniques. Signal lines should have Ohm impedance while the package ground leads and package bottom should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation board should be mounted to an appropriate heat sink. The evaluation circuit board shown is available from Analog Devices upon request. 9 For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 96, Norwood, MA 62-96