Lecture 3 Adder Comparator 7 segment display Decoder for 7 segment display D flip flop Analysis of sequential circuits Counter Sequence detector TNGE11 Digitalteknik, Lecture 3 1
Adder TNGE11 Digitalteknik, Lecture 3 2
An n bit adder built with n Full Adders (FA) TNGE11 Digitalteknik, Lecture 3 3
Full adder TNGE11 Digitalteknik, Lecture 3 4
FA realized with NAND gates TNGE11 Digitalteknik, Lecture 3 5
Carry propagation delay and carry accelerator TNGE11 Digitalteknik, Lecture 3 6
Comparator TNGE11 Digitalteknik, Lecture 3 7
7 segment display, HDSP 5553 (package drawing N) TNGE11 Digitalteknik, Lecture 3 8
HDSP 5553 7 Light Emitting Diodes (LED) with a common cathode TNGE11 Digitalteknik, Lecture 3 9
7 segment decoder, DM9368 The DM9368 is a 7 segment decoder driver incorporating input latches and constant current output circuits to drive common cathode type LED displays directly. Pin Name Description A0 A3 A3 Address (Data) Inputs RBO Ripple Blanking Output (Active LOW) RBI Ripple Blanking Input (Active LOW) a g Segment Drivers Outputs LE Latch Enable Input (Active LOW) TNGE11 Digitalteknik, Lecture 3 10
DM9368 Truth Table *The RBI will blank the display only if a binary zero is stored in the latches. TNGE11 Digitalteknik, Lecture 3 11
Logic diagram of DM9368 TNGE11 Digitalteknik, Lecture 3 12
Display values of counters TNGE11 Digitalteknik, Lecture 3 13
D flip flopflop TNGE11 Digitalteknik, Lecture 3 14
Timing diagram of D flip flop flop Positive edge triggered D flip flop TNGE11 Digitalteknik, Lecture 3 15
Negative edge triggered D flip flop TNGE11 Digitalteknik, Lecture 3 16
State diagram and state table of D flip flopflop TNGE11 Digitalteknik, Lecture 3 17
Register TNGE11 Digitalteknik, Lecture 3 18
Shift register TNGE11 Digitalteknik, Lecture 3 19
2 bit Counter (Cnt2b) State table State diagram TNGE11 Digitalteknik, Lecture 3 20
Time diagram of 2 bit counter TNGE11 Digitalteknik, Lecture 3 21
Analysis of sequential circuit Step 1: Write logic expressions q0+ = q0 q1+ = q1*q0 + q1 *q0 Step 2: Draw a state table q1 q0 q1+ q0+ 0 0 0 1 0 1 1 0 1 1 1 0 1 1 0 0 Step 3: Draw a state diagram Schematic diagram of 2 bit Counter TNGE11 Digitalteknik, Lecture 3 22
D flip flop with Clear (Cl) and Preset (Pr) signals TNGE11 Digitalteknik, Lecture 3 23
Time diagram of D flip flop flop with Cl and Pr signals TNGE11 Digitalteknik, Lecture 3 24
2 bit counter with asynchronous reset signal TNGE11 Digitalteknik, Lecture 3 25
2 bit counter with synchronous reset signal TNGE11 Digitalteknik, Lecture 3 26
2 bit counter with enable signal TNGE11 Digitalteknik, Lecture 3 27
Time diagram of 2 bit counter with enable signal TNGE11 Digitalteknik, Lecture 3 28
Schematic diagram of 2 bit counter with enable signal TNGE11 Digitalteknik, Lecture 3 29
Sequence detector, Sdet1_ mo The type Moore sequence detector detects 3 consecutive 1 s 1s in the input data. TNGE11 Digitalteknik, Lecture 3 30
Time diagram of Sdet1_mo TNGE11 Digitalteknik, Lecture 3 31
Schematic diagram of Sdet1_mo TNGE11 Digitalteknik, Lecture 3 32