FDFMA2P857. Integrated P-Channel PowerTrench MOSFET and Schottky Diode. FDFMA2P857 Integrated P-Channel PowerTrench MOSFET and Schottky Diode

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FDFMAP87 Integrated P-Channel PowerTrench MOSFET and Schottky Diode 0V,.0A, 0mΩ Features MOSFET: Max r DS(on) = 0mΩ at V GS =.V, I D =.0A Max r DS(on) = 60mΩ at V GS =.V, I D =.A Max r DS(on) = 0mΩ at V GS =.8V, I D =.0A Schottky: V F < 0.V @ A Low profile - 0.8 mm maximum - in the new package MicroFET x mm RoHS Compliant MicroFET x MOSFET Maximum Ratings T A = C unless otherwise noted Thermal Characteristics Pin A NC D C G S General Description This device is designed specifically as a single package solution for the battery charge switch in cellular handset and other ultraportable applications. It features a MOSFET with low on-state resistance and an independently connected low forward voltage schottky diode for minimum conduction losses. The MicroFET x package offers exceptional thermal performance for it s physical size and is well suited to linear mode applications. Symbol Parameter Ratings Units V DSS Drain to Source Voltage 0 V V GSS Gate to Source Voltage ±8 V Drain Current -Continuous (Note a) I D -Pulsed 6 Power Dissipation (Note a). P D Power Dissipation (Note b) 0.7 T J, T STG Operating and Storage Junction Temperature Range to +0 C V RRM Schottky Repetitive Peak Reverse Voltage 0 V I O Schottky Average Forward Current A A NC D July 0 6 C G S A W FDFMAP87 Integrated P-Channel PowerTrench MOSFET and Schottky Diode R θja Thermal Resistance, Junction to Ambient (Note a) 86 R θja Thermal Resistance, Junction to Ambient (Note b) 7 R θja Thermal Resistance, Junction to Ambient (Note c) 86 R θja Thermal Resistance, Junction to Ambient (Note d) 0 Package Marking and Ordering Information C/W Device Marking Device Package Reel Size Tape Width Quantity.87 FDFMAP87 MicroFET x 7 8mm 000 units 008 Fairchild Semiconductor Corporation FDFMAP87 Rev.B

Electrical Characteristics T J = C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV DSS Drain to Source Breakdown Voltage I D = 0μA, V GS = 0V 0 V ΔBV DSS Breakdown Voltage Temperature I ΔT J Coefficient D = 0μA, referenced to C mv/ C I DSS Zero Gate Voltage Drain Current V DS = 6V, V GS = 0V μa I GSS Gate to Source Leakage Current V GS = ±8V, V DS = 0V ±00 na On Characteristics V GS(th) Gate to Source Threshold Voltage V GS = V DS, I D = 0μA 0. 0.7. V ΔV GS(th) ΔT J r DS(on) Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance I D = 0μA, referenced to C mv/ C V GS =.V, I D =.0A 90 0 V GS =.V, I D =.A 0 60 V GS =.8V, I D =.0A 7 0 V GS =.V, I D =.0A, T J = C 8 60 g FS Forward Transconductance V DS = V, I D =.0A 7 S Dynamic Characteristics C iss Input Capacitance pf V DS = 0V, V GS = 0V, C oss Output Capacitance 80 pf f =.0MHz C rss Reverse Transfer Capacitance pf Switching Characteristics t d(on) Turn-On Delay Time 9 8 ns V DD = 0V, I D = A t r Rise Time 9 ns V GS =.V, R GEN = 6Ω t d(off) Turn-Off Delay Time 7 ns t f Fall Time 6 ns Q g(tot) Total Gate Charge V DS = 0V I D =.0A 6 nc Q gs Gate to Source Gate Charge V GS =.V 0.8 nc Q gd Gate to Drain Miller Charge 0.9 nc Drain-Source Diode Characteristics I S Maximum Continuous Drain-Source Diode Forward Current. A V SD Source to Drain Diode Forward Voltage V GS = 0V, I S =.A (Note ) 0.8. V t rr Reverse Recovery Time 7 ns I F =.0A, di/dt = 00A/μs Q rr Reverse Recovery Charge 6 nc mω FDFMAP87 Integrated P-Channel PowerTrench MOSFET and Schottky Diode Schottky Diode Characteristics I R Reverse Leakage I R Reverse Leakage V F Forward Voltage V F Forward Voltage FDFMAP87 Rev.B V R = 0V V R = 0V I F = 00mA I F = A T J = C 0.. μa T J = 8 C 0.0.0 ma T J = C 0.6 8. ma T J = C. 8.0 μa T J = 8 C 0.09.6 ma T J = C 0.9 0 ma T J = C 0.7 0.0 V T J = 8 C 0.9 0. V T J = C 0. 0.9 V T J = C 0. 0. V T J = 8 C 0.6 0. V T J = C 0. 0.8 V

Electrical Characteristics T A = C unless otherwise noted Notes: : R θja is determined with the device mounted on a in oz. copper pad on a. x. in. board of FR- material. R θjc is guaranteed by design while R θja is determined by the user's board design. (a) MOSFET R θja = 86 o C/W when mounted on a in pad of oz copper,. x. x 0.06 thick PCB. (b) MOSFET R θja = 7 o C/W when mounted on a minimum pad of oz copper. (c) Schottky R θja = 86 o C/W when mounted on a in pad of oz copper,. x. x 0.06 thick PCB. (d) Schottky R θja = 0 o C/W when mounted on a minimum pad of oz copper. a)86 o C/W when mounted on a in pad of oz copper. : Pulse Test: Pulse Width < 00μs, Duty cycle <.0%. b)7 o C/W when mounted on a minimum pad of oz copper. c)86 o C/W when mounted on a in pad of oz copper. d)0 o C/W when mounted on a minimum pad of oz copper. FDFMAP87 Integrated P-Channel PowerTrench MOSFET and Schottky Diode FDFMAP87 Rev.B

Typical Characteristics T A = C unless otherwise noted R DS(ON), NORMALIZED -ID, DRAIN CURRENT (A) DRAIN TO SOURCE ON-RESISTANCE -I D, DRAIN CURRENT (A) 6 VGS =-.V -.V 0 0.0 0..0..0......0 0.9 Figure. -V -.V -V -.8V -.V -VDS, DRAIN TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 0. 0 6 On-Region Characteristics Figure. Normalized On-Resistance vs Drain Current and Gate Voltage 0.8-0 - 0 0 7 00 0 T J, JUNCTION TEMPERATURE ( o C) Figure. Normalized On- Resistance vs Junction Temperature 6 I D =-A V GS = -.V V DS = -V T A = o C - o C o C 0 0.0 0..0..0. -V GS, GATE TO SOURCE VOLTAGE (V) rds(on), DRAIN TO -IS, REVERSE DRAIN CURRENT (A) SOURCE ON-RESISTANCE (OHM).0..0..0 0.8 0. 0.6 0.0 Figure. V GS =-.V -.8V T A = o C -.0V -.V -.0V -ID, DRAIN CURRENT(A) T A = o C -.V -.V I D =-.A 0.0 0 6 8 0 -V GS, GATE TO SOURCE VOLTAGE (V) 0 0. 0.0 0.00 V GS = 0V On-Resistance vs Gate to Source Voltage T A = o C - o C o C 0.000 0.0 0. 0. 0.6 0.8.0. -V SD, BODY DIODE FORWARD VOLTAGE (V) FDFMAP87 Integrated P-Channel PowerTrench MOSFET and Schottky Diode Figure. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDFMAP87 Rev.B

Typical Characteristics T A = C unless otherwise noted -VGS, GATE TO SOURCE VOLTAGE(V) ID, DRAIN CURRENT (A) IF, FORWARD CURRENT(A) I D = -A V DS = -V -0V -V 0 0 Q g, GATE CHARGE(nC) CAPACITANCE (pf) 700 600 00 00 00 Ciss f = MHz V GS = 0V 00 Coss 00 C rss 0 0 8 6 0 -V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics 00 0. RDS(ON) LIMITED V GS = -.V SINGLE PULSE R θja = 7 o C/W T A = o C 0.0 0. 0 00 0. 0.0 Figure 9. Forward Bias Safe Operating Area 00us ms 0ms 00ms s 0s DC VDS, DRAIN to SOURCE VOLTAGE (V) T J = o C o C 8 o C 0.00 0 00 00 00 00 00 600 V F, FORWARD VOLTAGE(mV) P(PK), PEAK TRANSIENT POWER (W) IR, REVERSE LEAKAGE CURRENT (ma) 00 00 0 SINGLE PULSE R θja = 7 o C/W 0. 0-0 - 0-0 - 0 0 0 0 0 0 t, PULSE WIDTH (s) Figure 0. Single Pulse Maximum Power Dissipation 0. 0.0 0.00 T J = o C T J = 8 o C T J = o C 0.000 0 0 0 0 V R, REVERSE VOLTAGE (V) FDFMAP87 Integrated P-Channel PowerTrench MOSFET and Schottky Diode Figure. Schottky Diode Forward Current Figure. Schottky Diode Reverse Current FDFMAP87 Rev.B

Typical Characteristics T A = C unless otherwise noted NORMALIZED THERMAL IMPEDANCE, Z θja 0. DUTY CYCLE-DESCENDING ORDER D = 0. 0. 0. 0.0 0.0 0.0 SINGLE PULSE R θja = 7 o C/W 0.0 0-0 - 0-0 - 0 0 0 0 0 t, RECTANGULAR PULSE DURATION (s) Figure. Transient Thermal Response Curve P DM t t NOTES: DUTY FACTOR: D = t /t PEAK T J = P DM x Z θja x R θja + T A FDFMAP87 Integrated P-Channel PowerTrench MOSFET and Schottky Diode FDFMAP87 Rev.B 6

Dimensional Outline and Pad Layout FDFMAP87 Integrated P-Channel PowerTrench MOSFET and Schottky Diode Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http:///package/packagedetails.html?id=pn_mldeb-x06 FDFMAP87 Rev.B 7

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Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. 8 Rev. I68