Novel Isolaed Bidirecional Inegraed Dual Three-Phase Acive Bridge D3AB) PFC Recifier Absrac This Paper proposes a novel Dual Three-Phase Acive Bridge D3AB) PFC recifier opology for a V dc disribuion sysem, which feaures galvanic isolaion, bidirecional power conversion capabiliy, a high level of componen inegraion, and can be dimensioned wih respec o high efficiency. In he course of a comprehensive and in-deph analyical invesigaion, he working principle of he D3AB PFC recifier is described in order o enable converer modelling and he derivaion of mahemaical expressions and limiaions needed for converer design and opimizaion. The developed converer models are verified by means of circui simulaions. An overall opimizaion of a sysem wih V line-o-line inpu volage, V dc oupu, and P ou = 8 kw raed power wih respec o efficiency and power densiy reveals he feasibiliy of a fullload efficiency of 98.% and a power densiy of 4 kw/dm 3 if SiC MOSFETs are used. The finally presened design is found o achieve efficiencies greaer han 98 % for P ou >.7 kw. I. INTRODUCTION Recen effors wih regard o a more susainable elecric power generaion propose he insallaion of disribued dc microgrids in order o effecively uilize disribued renewable energy sources []. A dc microgrid archiecure ypically incorporaes dc sources e.g. phoovolaic, fuel cell), energy sorages e.g. baeries), and loads e.g. household appliances, IT equipmen, elecric vehicles) and employs an isolaed bidirecional recifier sysem o esablish energy ransfer beween he dc grid and he hree-phase ac mains. This paper evaluaes a novel opology of a grid-conneced, bidirecional, and isolaed hree-phase power facor correced PFC) recifier wih a raed power of P ou = 8 kw and furher specificaions as lised in Tab. I, which fulfills he requiremens of bidirecional conversion capabiliy and galvanic isolaion wih very low complexiy. Due o he versailiy of he proposed sysem, i is suiable for various furher L m = L ac hree-phase mains i L ac,a a b c i La i L σ,a L σ v La F. Krismer, E. Haipoglu, and J. W. Kolar Power Elecronic Sysems Laboraory, ETH Zurich, Swizerland krismer@lem.ee.ehz.ch ac por v a C f v a2 primary side applicaions including PFC recifiers for common dc bus archiecures as, for example, used in efficiency-opimized muli-axis drive sysems [2], where i is reasonable o consider advanced recifier opologies o define he elecric poenial of a dc erminal, include a baery o buffer ouages, ec. Furhermore, he sysem could e.g. be implemened for baery chargers of plug-in hybrid elecric vehicles [3]. Convenional realizaions of hree-phase and isolaed ac dc recifiers are wo-sage soluions, wih grid-side recifiers and series-conneced isolaed dc dc converers [4], [5], [6]. Twosage converer sysems feaure he advanages of decoupled funcional pars, a he cos of higher expeced losses due o he high number of power componens in he curren pah. Sae-of-he-ar research wih regard o more efficien converer opologies reveals various soluions ha combine PFC funcionaliy, galvanic isolaion, and volage conversion in a single sage. In his conex, isolaed single-sage PFC recifiers, based on isolaed Swiss-forward or marixype opologies [7], [8], [9], represen suiable bu complex soluions. Wih regard o reduced converer complexiy, a direc connecion of he high frequency HF) ransformer of a single-phase dc dc converer o a hree-phase PFC recifier is proposed in [], which, due o he asymmery of he converer, is considered more viable for lower power levels. Furher level of inegraion is achieved wih a opology wih coupled inpu inducors proposed in []. There, he isolaed dc por is immediaely coupled a he ac por in order o reduce he number of power componens in he curren pah and achieve increased efficiency. The required coupled inducors and he high number of IGBTs 24), hough, render he presened converer srucure comparably complex. TABLE dc por dc por 2 C f2 I: Specificaions of he D3AB PFC recifier. Nominal mains line-o-phase volage rms value) Mains frequency Nominal oupu dc volage, por no isolaed) Nominal oupu dc volage, por 2 galv. isolaed) Nominal oupu power secondary side V ac = 23 V f m = 5 Hz V dc = 8 V V dc2 = V P ou = 8 kw V dc2 2 dc disribuion sysem V dc2 2 Fig. : Proposed bidirecional converer opology wih a hree-phase ac inpu por, a dc oupu por and an isolaed dc oupu por 2.
This paper proposes a novel isolaed bidirecional Dual Three-Phase Acive Bridge D3AB) PFC recifier opology, depiced in Fig., ha aims for high level of inegraion and, for his, inegraes he funcionaliies of PFC inducors and HF ransformers. Thus, he sysem essenially combines he funcionaliies of a bidirecional hree-phase PFC recifier and a hree-phase Dual Acive Bridge DAB) converer and provides hree power pors, i.e, he ac inpu) por, a dc oupu) por wihou isolaion, and an isolaed dc oupu) por. Wih a oal of welve power MOSFETs, and since he wo-level hree-phase recifier srucure faciliaes he use of convenional 6-pack power modules, he proposed srucure feaures reduced realizaion complexiy compared o saeof-he-ar soluions. The paper is organized as follows. Secion II presens a comprehensive descripion of he proposed converer sysem and, for his purpose, firs invesigaes he properies of a single-phase version of he sysem and hen exends he analysis o he hree-phase sysem. Subsequenly, Secion III summarizes resuls of a converer opimizaion wih respec o efficiency and power densiy. Secion IV, finally, evaluaes a seleced design of he D3AB PFC recifier wih regard o losses, volumes, and efficiency in order o assess he suiabiliy of he proposed concep for he given applicaion. II. OPERATING PRINCIPLE The inpu inducors, L ac, of a convenional hree-phase PFC recifier wihou galvanic isolaion and filer capaciors conneced o he dc oupu midpoin, i.e., he primary-side par of he converer depiced in Fig. ), are subjec o an inducor volage, v L, wih nearly zero local average value, v L angle brackes denoe he average over one swiching period), bu large HF specral componens a he swiching frequency f s = 35 khz) and muliples hereof. For he purpose of illusraion, Fig. 2a) depics he insananeous and local average values of he volage across he inpu inducor of phase a over one mains period for raed operaion according o Tab. I and Fig. 2 shows he corresponding specrum. The proposed isolaed converer opology is derived based on he idea ha he inpu inducors are replaced by ransformers in order o ake advanage of he applied HF volages. The secondaryside windings are conneced o a second hree-phase PFC recifier, which, in combinaion wih he ransformers sray inducances L σ, realizes a converer srucure similar o a hree-phase DAB converer. I is worh o noe ha Fig. illusraes only one possible realizaion of he D3AB PFC recifier. Variaions of his concep may only use differenial or common mode volage componens for energy ransfer and/or employ differen hree-phase ransformers, e.g., wih delaconneced windings on he secondary side [2]. In his work, he corresponding power ransisors a he converer s primary and secondary sides operae wih same duy cycles. For his reason, v {a,b,c} V dc = v {a,b,c}2 V dc2 ) applies. The gae signals of he six corresponding primaryand secondary-side ransisors are subjec o a common phase shif, ϕ, in order o faciliae oupu power conrol a dc por 2. Based on he assumpion ha he capaciances of he spli dc-link are sufficienly large o achieve negligible flucuaions of he dc-link capacior volages, he analysis can be confined o he single-phase sysem wih separaed inpu inducor and HF ransformer shown in Fig. 3. Wih his modificaion - - a) vlac,a [V] ˆ VLac,a [V] k v La v La m k 3 k k 3 k M f [Hz] Fig. 2: a) Insananeous and local average values of he volage across L ac; specrum of v La operaing parameers according o Tab. I, f s = 35 khz). L ac v ac V dc 2 C f L σ C f2 i i v v C f v 2 sw v hf v hf2 C f2 v sw2 n = N /N 2 V dc 2 dc por V dc2 2 dc por 2 V dc2 2 Fig. 3: Single-phase sysem wih inpu inducor L ac, primary- and secondaryside low-frequency blocking and filer capaciors C f and C f2, and HF ransformer. a comprehensible descripion of he operaing principle is feasible and he derived resuls can be direcly applied o he hree-phase converer of Fig.. The converer of Fig. 3 has been documened wih regard o dc dc operaion, for D = D 2 =.5 [3] and arbirary bu equal) duy cycles, < D = D = D 2 < [4]; is exension o a dc dc converer wih a hree-phase HF dc-link is invesigaed in [5]. Secion II-A revisis is main operaing principles for dc dc operaion in order o allow for a comprehensible exension o ac dc operaion of single- and hree-phase PFC recifier sysems in Secions II-B and II-C, respecively. A. Single-phase sysem a dc dc operaion Fig. 4 illusraes volage and curren waveforms simulaed for he single-phase converer sysem of Fig. 3 a a seleced operaing poin. The ac inpu volage, v ac, changes slowly wih respec o he swiching period, T s, and can hus be considered as consan during one swiching period. The converer feaures four degrees of freedom for he conrol of he oupu power, i.e., swiching frequency, f s, inpu- and oupu-side duy cycles D and D 2, and phase shif angle, ϕ. The filer capaciors C f and C f2 are blocking he dc volage componens, V Cf and V Cf2, in order o avoid sauraion of he ransformer core. Thus, he HF volages, v hf = v sw V Cf, 2) v hf2 = v sw2 V Cf2, 3)
vhf [V] 6 - - -6 v hf D 2 T s /2 D 2 T s /2 D T s /2 D T s /2 i φt s /2 ) n v hf2 T s /4 T s /2 3T s /4 T s 3 2 - -2-3 Fig. 4: Definiions of D, D 2, and ϕ using simulaed waveforms of v hf, v hf2, and i over one swiching period, T s. Considered operaing condiions: f s = 35 khz, L σ = 58 µh, n = 2, v ac) = 325 V sin 2π5 Hz), = 5 ms, V dc = 8 V, V dc2 = V, and ϕ = 22. resul a he HF ransformer of he DAB, cf. Fig. 3. The analysis of he lossless converer is similar o he analysis of a convenional DAB converer. For D = D = D 2, he expression for he oupu power is P φ = nv dcv dc2 ϕ 2D D) ϕ ), 4) 2f s L σ 2π 2π which is found o be valid for ϕ < mind, D). 5) 2π Fig. 5 evaluaes 4) wih respec o differen duy cycles and phase shif angles. A close inspecion of he curves in Fig. 5 reveals ha maximum power resuls for a phase shif angle ha mees condiion 5). For a given duy cycle, he expression P φ,max = nv dcv dc2 ϕ 2 Pφ,max 8π 2 6) f s L σ wih ϕ Pφ,max = 2πD D) 7) applies for maximum power. As wih all DAB converers, he inducor L σ limis he maximum oupu power. B. Single-phase sysem a ac dc operaion The invesigaed sysem is operaed wih ac inpu volage, v ac ) = V m,pk sin 2πf m ), 8) cf. Fig. 6a) and herefore, he above presened derivaions for dc dc operaion need o be exended accordingly. For he sake of breviy, basic sinusoidal modulaion is considered, i.e., he inpu and oupu sages apply a ime-varying duy cycle, v ac) V dc /2 i [A] ), 9) D = D 2 2 in order o achieve a sinusoidal phase curren wih uniy power facor. Fig. 6 shows he calculaed waveform of he primaryside curren i over a mains period, for ϕ = 22 = consan. The filer capaciors C f and C f2 are blocking he lowfrequency LF) volage componens and wih ) and 9), v Cf ) = V dc2 v Cf ) = v ac ) ) V dc applies. For his reason, he HF ransformer currens are subjec o LF offses caused by superimposed LF capacior currens, d v Cf d v Cf2 i lf = C f, i lf2 = C f2, ) d d cf. Fig. 6c). Thus, he analyical invesigaion for dc dc operaion presened in Secion II-A is exended wih respec o he ime varying duy cycle and he capacior currens. The Pϕ [kw] 7.5 5 2.5 D = {.3,.7} D = {.2,.8} D = {.,.9} π / 4 π / 2 3 π / 4 D = {.4,.6} D =.5 π φ Fig. 5: Average power over one swiching period as a funcion of he phase shif angle ϕ, for differen values of D = D = D 2, f s = 35 khz, L σ = 58 µh, n = 2, and dc volages according o Tab. I. The hin black line denoes he rajecory of maximum power and he dashed line denoes he delimiaion of he validiy range of 4), according o 5). respecive analysis reveals ha he superimposed LF capacior currens have no impac on he curren power level, for which p φ = P φ,dc P φ,ac,pk cos4πf m ) 2) P φ,dc = nv dcv dc2 2f s L σ ϕ 2π P φ,ac,pk = nv dcv dc2 ϕ 2f s L σ 2π is derived. [ 2 V dc ) ] 2 ϕ, 3) V dc 2π ) 2, 4) According o 2), 3), and 4) and for consan phase shif angle ϕ, ) 2 ϕ π = ) 2 2 Vdc 2 2V m,pk 2 8f sl σ P φ,dc, nv dc V dc2 V dc 4V 4 dc 5) he local average of he insananeous power of he singlephase PFC recifier, p φ is a sinusoidal funcion wih wice he mains frequency, ampliude P φ,ac,pk, and dc offse P φ,dc. In his regard, a deailed analysis reveals ha power limiaion relevan for he design of L σ occurs a he maximum values of v ac, since he maximum possible oupu power decreases considerably for duy cycles approaching or, cf. Fig. 5. Wih his and expressions 6) and 7), he useful range for ϕ is limied o ϕ 2π < ) 2 4 6) V dc and wih 3), a condiion for [ L σ resuls, L σ < nv ) ] 2 dcv dc2 8f s P φ,dc 4. 7) V dc C. Three-phase sysem I would be sraigh-forward o use hree of he singlephase recifiers given in Fig. 3 o realize an isolaed hreephase PFC recifier sysem. Wih dedicaed inpu inducors, L ac, and DAB ransformers, however, he resuling sysem would require increased oal converer volume, since i would no ake advanage of he HF volage applied o he inpu inducors. For his reason, he remaining par of he paper solely considers he opology of Fig.. Neverheless, he resuls derived in Secions II-A and II-B direcly apply, merely he waveforms of he inpu currens, i L{a,b,c}, change, due o he superposiion of he currens hrough L ac and L σ, i L{a,b,c} = i Lac,{a,b,c} i Lσ,{a,b,c}. 8) Fig. 7 depics characerisic waveforms obained from circui simulaion using operaing condiions and seings
a) i [A] vhf [V] c) 3 2 - -2-3 6 - - -6-8 v ac i lf v hf T m / 4 nv hf2 T s i i i lf v hf i i lf T m / 2 nv hf2 T s 3 2 - -2-3 -4 Fig. 6: Volage and curren waveforms deermined for he single-phase sysem. a) Sinusoidal inpu volage over a mains period T m. Primaryside ransformer curren i over a mains period. c) i and primary- and secondary-side HF ransformer volages v hf and v hf2 over a swiching period T s a = T m/4 and = T m/2, respecively. according o Tables I and III. According o Figs. 7a) and, he hree-phase volages are phase shifed by 2 and he primary- and secondary-side capacior volages are proporional, cf. ). Fig. 7c) illusraes he inpu currens, i L{a,b,c}, a raed power and reveals ha, wih he considered value of L ac, Zero Volage Swiching ) is parly los a he primary side. Deailed waveforms of he inpu currens a = and = 5 ms are shown in Fig. 7d) and clearly disclose he superposiion of i Lac,a and i Lσ,a according o 8). Fig. 7e) illusraes he ime-varying oupu power levels of each phase, p φ{a,b,c}, which are sinusoidal and phase shifed by 2. For his reason, consan oal power resuls, P ou = 3P φ,dc. 9) I is worh menioning ha he oupu power of each phase is maximal a he zero crossing of he corresponding phase volage, which is due o D =.5, cf. 4). Furhermore, wih he considered specificaions and converer seings, he ampliude of he sinusoidal characerisic superimposed on p φ{a,b,c} is less han is average value.6 kw < 2.7 kw). III. OPTIMIZED CONVERTER DESIGN In his Secion, he invesigaed D3AB PFC recifier is opimized wih regard o efficiency and power densiy; he opimizaion objecive is maximum power densiy a a converer efficiency of 98%. The implemened opimizaion procedure employs analyical expressions o calculae he componen currens, which have been verified a differen operaing poins using a circui simulaor, revealing a high accordance wih errors of less han 2%. Wih known currens, he below lised componen models are evaluaed wih regard o losses and volumes: Full requires a minimum curren, which is indicaed in Fig. 7c) and described in Secion III-A. i [A] - - a) - - v [V] v [V] i [A] c) ila [A] d) P [kw] e) 4 2-2 no -4 4 2-2 -4 8. 6. 4. 2. v a v b v c v a2 v b2 v c2 i La i Lb i Lc i La i Lb i Lc = = T m /4 P ou no T s p φ,a p φ,c p φ,b no T s Fig. 7: Simulaion resuls for he operaing condiions and seings according o Tables I and III: a) primary-side capacior volages; secondary-side capacior volages; c) inpu currens = primary-side ransformer currens; cf. Fig. ); d) magnified inpu curren of phase a during < < T s and 5 ms < < 5 ms T s, revealing he inpu curren of he PFC recifier wih curren ripple) and he superimposed HF DAB ransformer curren, which shows a deviaion from he ideal shape ha originaes from he series resonan circui formed wih L σ and he filer capaciors C f and C f2 ; e) local average values of he insananeous power levels of each phase and oal oupu power. Semiconducors and cooling sysem in Secion III-A, Magneic componens in Secion III-B, Capaciors in Secion III-C, EMI filer, gae drivers, and conrol in Secion III-D. A fully generalized converer opimizaion would feaure a grea number of open design parameers. Due o given specificaions, known converer characerisics, and/or available componens, however, a grea number of design parameers can be readily defined. In his regard, V dc is se o 8 V in order o feaure reasonable duy cycles wih sufficien margins o and, cf. 9), and sill enable he use of power semiconducors wih a blocking volage of V.
Furhermore, i is known ha DAB converers achieve mos efficien operaion for V dc /nv dc2 ). Thus, wih regard o he specified oupu volage, V dc2 = V, he urns raio is se o n = N /N 2 = 2. Furhermore, 7) limis he maximum value of L σ for given oupu power. The considered converer inducance is se o 8% of he maximum value, f s L σ = 8% f s L σ ) max = 8% nv dcv dc2 8P/3 o ensure conrollabiliy of he converer. A. Semiconducors and cooling sysem [ 4 V dc ) 2 ] SiC power MOSFETs are used on he primary and secondary sides in order o ake advanage of heir low conducion and swiching losses. Iniial calculaions of semiconducor losses reveal ha low conducion and swiching losses are achievable if single 25 mω/ V-devices C2M252D by Cree) and mω/9 V-devices C3M9K by Cree) realize each swich on he primary and secondary sides, respecively. Using devices wih increased on-sae resisances would be possible wih regard o he devices raed currens and losses, however, reduced efficiencies would resul. Conversely, he use of muliple MOSFETs conneced in parallel would aain only limied improvemens ha may no jusify he increased effor. 2 The conducion losses are calculaed based on he devices on-sae resisances a juncion emperaures of 25 C, C2M252D 25 mω/ V): R DS,on, = 38 mω, C3M9K mω/9 V): R DS,on,2 = 3 mω. The calculaion of he swiching losses is based on measured swiching losses for he considered devices from [6], [7] and depiced in Fig. 8. The considered polynomials are 233 µj 5. µj A I D 28 nj A I 2 D 2 I D.53 A, E sw = 2 µj 22 µj 2.3 AI D ) 2.77 A.53 A < ID < 2.3 A, 7. µj 2.53 µj A I D 36 nj A I 2 2 D I D 2.3 A. 2) for he 25 mω/ V-device, for operaion wih 8 V and T j = 25 C and 64 µj 4.48 µj A I D 2.85 nj A I 2 D 2 I.2 A, E sw = 3.4 µj 55 µj ) 2.8 AI D 2.6 A.2 A < I < 2.8 A, 964 nj 837 nj A I D. nj A I 2 2 D I 4.5 A. 2) for he mω/9 V-device V DS = V, T j = 7 C). Negaive values of he insananeous drain curren during swiching, I D, denoe swiching operaions where canno be aained, i.e. urn-on losses occur, and I D > denoe swiching operaions where is in principle feasible. However, a minimum curren is required for o fully charge and discharge he MOSFET s oupu capaciances. In his regard, he second polynomials in 2) and 2) represen parial ha are approximaed based on quadraic inerpolaions for a dead ime inerval of ns. Remark: since he MOSFETs are used wihou exernal capaciors increasing C oss, he very low loss propery of is los a high posiive currens, due o urn-off losses approximaely a I D > 2 A in Fig. 8). 2 Even increased swiching losses would resul on he primary side, due o ime inervals where urn-on losses occur, cf. Fig. 7. As a resul, opimal designs would employ increased curren ripples., Esw [mj] a) Esw [mj].6.4.2 E on range E off. -2 - I,min 2 3.4.3.2.. -4-2 2 4 6 Fig. 8: a) Swiching losses of he 25 mω/ V SiC MOSFET C2M252D for operaion wih 8 V and T j = 25 C and he mω/9 V SiC MOSFET C3M9K for operaion wih V and T j = 7 C, wih respec o he drain curren, I D, a he swiching insan. Boh Figures depic measured resuls from [6], [7] for I D < and I D > I,min. For I D I,min he swiching losses for parial are inerpolaed for an assumed dead ime inerval of ns. TABLE II: Expressions used for scaling all lenghs, areas, and volumes of he considered magneic componens based on wo sacked E 55/28/2 cores). Core volume V c = 435 3 V Core cross secion A c = 26 3 V 2/3 Available winding cross secion of coil former A w = 95.2 3 V 2/3 Heigh of core window h w = 58 3 V /3 Widh of core window A w = 63 3 V /3 Average urn lengh l avg = 2.64V /3 Open surface o ambien A open = 5.5V 2/3 The volume of he cooling sysem for power semiconducors wih oal losses of P semi,oal is considered by means of a Cooling Sysem Performance Index hermal conducance per volume), CSPI, of 3 W dm 3 K and a considered emperaure difference beween hea sink and ambien of T hs a = 5 C, P semi,oal V cooling sysem = T hs a CSPI. 22) B. Magneic componens I D I D This paper uses a unified scaled model for all magneic componens. The scaled model is parameerized according o he geomerical properies of he ransformers realized in [8], which are compose of wo sacked E 55/28/2 cores ed volume, V, is cm 3 ) and achieve efficiencies of 99.6% for an isolaed hree-phase PFC recifier wih a raed power of 7.5 kw. For a given value of V, all lenghs, areas, and volumes of he magneic componen are deermined according o he expressions lised in Tab. II. The inpu inducors/ransformers of he D3AB PFC recifier and he DAB converer inducors, L σ, are considered separaely in order o ake he addiional volumes and losses due o L σ ino accoun. The employed componen model calculaes he core losses wih he improved Generalized Seinmez Equaion igse) [8] and he Seinmez parameers k =.2, α =.4745, and β = 2.667 23) for he considered N95 ferrie core maerial exraced for f = 25 khz, B pk = 3 mt, and T c = 8 C wih a sofware ool provided by TDK/EPCOS [9]). The copper losses are
deermined using simplified expressions for HF skin- and proximiy effecs derived in [2], which assume a disribued air gap. The compuaion of he copper losses considers he firs 3 harmonic componens of each conducor curren; he conducors employ HF liz wires wih single srand diameers of. mm. The auomaed design procedure furher akes an effecive copper area of 38% A w A w is he cross secion of he core window, cf. Tab. II), a copper emperaure of C, a maximum flux densiy of 3 mt, and a maximum emperaure rise of he componen s surface of 5 C ino accoun. The surface emperaure rise is approximaed according o [2], ) P/ mw. T = A open / cm 2 C < 6 C. 24) In a firs sep, he design procedure scans a wide range of values for V in order o deermine a ed volume ha leads o a design close o he hermal limiaion, V,. For his purpose, geomeric sequences are used for V wih common raios of.5 iniial coarse scan saring from V = dm 3 ) and. subsequen fine scan). For each given value of V an inner loop deermines he opimal number of urns wih respec o minimum oal losses. In case of he inpu inducors/ransformers, he available cross secion of he core window is divided o he windings of primary and secondary sides such ha same curren densiies resul. Finally, he air gap lengh is deermined o achieve he specified inducance. Losses of magneic componens decrease wih increasing volume. For his reason, he copper and core losses are calculaed for furher 29 magneic componens wih increasing ed volumes according o V,i = V,. i i {, 2, 3,... 29} 25) and for opimized numbers of urns. The resuling volumes, losses, and design configuraions e.g. numbers of urns) are sored and he daa ransferred o he main converer opimizaion procedure. C. Capaciors The capaciors of he considered converer are subjec o relaively high currens. In order o sill achieve high power densiy, ceramic and film capaciors have been seleced, which are lised below: C f : B32754C26K film capacior, µf, 25 Vac, 2 A, EPCOS), C dc : CeraLink TM SP5 ceramic capacior, 2 µf, Vdc, 4 A, EPCOS), C f2 : 25 KR355WD72W25MH ceramic cap.,.85 µf a 63 V, 45 Vdc, 2 A a 5 khz, Muraa), C dc2 : CeraLink TM SP5 same as C dc ; noe: capaciance drops o 8.4 µf a V). The oal volume of all capaciors is 6 cm 3, which includes an addiional volume of 3 cm 3 for damping neworks, an elecrolyic oupu capacior 2 µf, 45 Vdc), and wo SMD inducors ha decouple he elecrolyic capacior from he CeraLink TM capaciors C dc2 ). The final design suggesed by opimizaion has been successfully esed wih comprehensive circui simulaion, using he above capaciance values, revealing only minor differences in erms of rms values and losses conducion, swiching, and core). I is worh o noe ha he opimizaion does no consider capacior losses, due o heir comparably low conribuion o he oal losses. D. Remaining componens The volumes and losses of EMI filer, gae drivers, and conrol have been adoped from [22], due o similar specificaions and opimizaion objecives: P EMI filer = 5 W 26) P gae drivers P conrol P fan = 2 W, 27) V EMI filer =.35 dm 3, 28) V gae drivers V conrol =.3 dm 3, 29) V oal =.5 V i, 3) i.e., 5% of he volume is considered o be unused. E. Opimizaion Based on he above consideraions and assumpions, i is found ha he swiching frequency, f s, he inpu curren ripple, r = I Lac,pkpk 2P 3V m,pk = I Lac,pkpk I m,pk, 3) and he considered ed volumes of he magneic componens remain for opimizaion of efficiency and power densiy. The considered seings are defined wih f s {23, 27, 35, 47, 72, 4}kHz, 32) r {3, 5, 75,, 25, 5, 75,, 225, 25, 275, 3}%, 33) where he lised swiching frequencies are preseleced wih regard o small volume EMI filers cf. Fig. 2 in [23]). The ses defined for f s and r lead o 72 differen seings. Furhermore, 9 combinaions of differen designs resul for he inpu inducors/ransformers and he DAB inducors 3 for each, cf. Secion III-B) for given values of f s and r, which, in oal, yields 648 resuls. Fig. 9 depics he corresponding resuls and discloses he η-ρ Pareo fron for he invesigaed converer sysem. The orange sar in Fig. 9 marks he seleced operaing poin, which achieves η = 98.% and ρ = 4 kw/dm 3 a f s = 35 khz, r = 75%, and for magneic componens wih maximum power densiy, i.e., operaed a heir hermal limiaion. The resuling Pareo-opimal design poins reveal increasing efficiency for decreasing power densiy, which is direcly relaed o he similar η-ρ characerisics of magneic componens. From a deailed inspecion of he design poins on he Pareo fron i becomes apparen ha design poins wih Pareo-opimal power densiy and very high efficiency are obained for reduced swiching frequencies swiching losses, core losses) and reduced curren ripples rms currens, conducion and copper losses, core losses; reduced swiching frequencies overcompensae he increases of swiching losses by reason of reduced curren ripples). The red riangles in Fig. 9 mark resuls wih consan swiching frequency of 35 khz, magneic componens wih maximum power densiies, and differen values of r. I can be observed ha reduced power densiies and efficiencies resul for r < 75%. The reduced power densiies are mainly addressed o increased ed volumes of he PFC inpu inducors and he reduced efficiencies originae from boh, he PFC inpu inducors due o he required increased energy sorage capabiliy and he semiconducors on he primary side, which generae increased swiching losses due o an increase of he region where is los, cf. Fig. 7. Slighly reduced converer volumes are feasible for r > 75%, however, he efficiency quickly decreases by reason of large rms currens.
98.6 r 5% EMI filer 5 W) 3 PLσ,wdg 7 W) 3 PLσ,core 5 W) 3 PLac,wdg 32 W) r 75% r % fs 23 khz η [%] 98.4 98.2 fs = 23 khz r = 75% fs 27 khz fs 35 khz a) 98. fs = 47 khz r = 75% 2. 2.5 3. 4. 3.5 ρ [kw/dm3] r = 275% Fig. 9: Efficiencies, power densiies, and η-ρ Pareo fron deermined for he D3AB PFC recifier. IV. D ISCUSSION OF DESIGN RESULT Tab. III liss he design resuls a he seleced operaing poin idenified in Fig. 9 and Figs. a) and depic he corresponding componen losses and volumes, respecively. According o Fig. a), more han half of he oal losses are aribued o he semiconducor losses which are mainly generaed in he power MOSFETs on he primary side. A reducion of he primary-side conducion losses could be achieved by increasing he corresponding chip sizes, which, however, would increase he swiching losses. The magneic componens generae one hird of he losses; here, losses mainly occur in he windings of he inpu inducors, which are already operaed wih maximum flux densiies of 3 mt, i.e., a furher increase of he core losses is no feasible. Approximaely wo hirds of he converer volume are required for passive componens magneics, capaciors, EMI filer). Due o comparably low semiconducor losses 84 W a raed power), a cooling sysem wih a comparably small volume can be employed, e.g., using double-sided cooling a small fan wih an edge lengh of 3 mm, which is found o enable he realizaion of a cooling sysem wih he calculaed low volume of 3 cm3 and sill provides a sufficienly large base plaes o accomodae all 2 MOSFETs. Fig. a) and depic he calculaed characeriss of efficiency and seleced componens losses wih respec o he oupu power and reveal ha η > 98% is feasible for Pou > 2.3 kw. According o Fig., subsanial conducion losses and losses in he magneic componens remain a very low power, due o he inducor curren ripples. However, increasing swiching losses are observed for decreasing oupu power and Pou < 2 kw. A close invesigaion reveals ha he currens during swiching of he secondary-side MOSFETs are insufficien for, cf. Fig. 2a) and Fig. 8. could Pcond,prim 34 W) Psw,prim 3 W) Psw,sec 6 W) Pcond,sec 4 W) capaciors.6 dm3) 3 Lσ.2 dm3) 3 Lac.67 dm3) cooling sysem.3 dm3) gae drivers, conrol.3 dm3) EMI filer.35 dm3) unused.26 dm3) Fig. : a) Componen losses and volumes for he seleced design poin wih η = 98.% and ρ = 4 kw/dm3. η [%] 99 n = 2. 98 n = 2. 97 96 95.. 2. 3. 4. 5. 6. 7. 8. a) Pou [kw] Ploss [W] The cyan circles mark resuls wih consan curren ripple of 75%, magneic componens wih maximum power densiies, and differen swiching frequencies. I can be seen ha a considerably reduced swiching frequency of 23 khz sill faciliaes a relaively high power densiy of 3.6 kw/dm3. In his regard i is found ha Pareo-opimal designs wih very high efficiencies no only require reduced swiching frequencies and power densiies bu also magneic componens wih increased ed volumes. 3 PLac,core 8 W) gae drivers, conrol, fan 2 W) 6 5 Pmag 4 3 Psw n=2 2 Psw n=2. Pcond.. 2. 3. 4. 5. 6. 7. 8. Pou [kw] Fig. : a) Toal converer efficiency and characerisics of seleced componens losses wih respec o oupu power. be aained if hree inducors would be placed in parallel o he hree ransformers secondary windings. According o he resuls of an analyical invesigaion of he equivalen circui of a ransformer, however, he same effec can be achieved for a sligh adjusmen of he ransformers urns raios, from n = 2 o n = 2., cf. Fig. 2. Wih his minor adjusmen, a subsanial efficiency improvemen is achieved a low oupu power levels, i.e., η > 98% for Pou >.7 kw. V. C ONCLUSION This paper proposes and analyzes a novel hree-level and hree-por isolaed and bidirecional PFC recifier opology D3AB PFC recifier), which can be realized wih sandard 6pack power modules on he primary and secondary sides, employs inegraed inpu inducors and HF ransformers, and/or feaures galvanic isolaion and high efficiency. The given in-deph descripion of he working principle of he D3AB PFC recifier allows he derivaion of key expressions needed
TABLE III: Summary of resuls for he seleced converer design, cf. Fig. 9. General resuls and rms currens Swiching frequency f s = 35 khz Curren ripple r = 75% Calculaed efficiency a raed load η = 98.% Calculaed oal power densiy ρ = 4 kw/dm 3 Transformer rms curren, prim. and sec. sides I r,2 = {7.2 A, 9.2 A} MOSFET rms currens,prim. and sec. sides I T,prim,sec = {2.2 A, 3.6 A} Magneic inpu inducor/ransformer L ac Inducance L ac = 95 µh Boxed volume V = 223 cm 3 Number of urns, prim. and sec. sides N,2 = {2, } Air gap lengh l air =.9 mm Conducors, prim. and sec. sides HF liz wires) {547, 6}. mm Copper losses P w =.6 W Core losses P c = 2.5 W Calculaed emperaure rise T = 44 C DAB inducor L σ/n 2 placed on he secondary side) Inducance L σ = 4.5 µh Boxed volume V = 4 cm 3 Number of urns N = 9 Air gap lengh l air =.7 mm Conducor: HF liz wire 6. mm Copper losses P w = 2.4 W Core losses P c =.8 W Calculaed emperaure rise T = 44 C i2 [A] 4 2-2 -4 parial 4 2-2 parial -4 T s 2T s a) T s 2T s Fig. 2: Calculaed curren a he ransformer s secondary side for P ou = 5 W, = 2.5 ms, operaing condiions and parameers according o Tab. I and Tab. III, and differen urns raios: a) n = 2, n = 2.. o design he converer sysem wih respec o opimized performance values, e.g. efficiency and power densiy, which serves as a basis for he converer opimizaion presened in he second par of his paper. According o he calculaed resuls, a full-load efficiency of 98.% and a power densiy of 4 kw/dm 3 can be achieved for he PFC recifier if SiC MOSFETs are used 25 mω/ V and mω/9 V devices on primary and secondary sides, respecively). The presened design is found o achieve efficiencies greaer han 98 % for P ou >.7 kw. The discussions given in his paper are confined o he basic srucure, operaing behavior, and design of he new opology. Furher research will focus on he invesigaion of prospecive efficiency and/or power densiy improvemens ha can be achieved wih modified opologies and alernaive conrol schemes ha ake advanage of currenly unused degrees of freedom of he considered converer sysem. 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