MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Power Module> TYPE TYPE INTEGRATED POWER FCTIONS 600/30A low-loss CSTBT TM inverter bridge with N-side three-phase output DC-to-AC power conversion INTEGRATED DRIE, PROTECTION AND SYSTEM CONTROL FCTIONS r upper-leg IGBTS : Drive circuit, High voltage high-speed level shifting, Control supply under-voltage (U) protection. r lower-leg IGBTS : Drive circuit, Control supply under-voltage protection (U), Short circuit protection (SC). Fault signaling : Corresponding to an SC fault (Lower-leg IGBT) or a U fault (Lower-side supply). Input interface : 3, 5 line (High Active) UL Approved : Yellow Card No. E8076 APPLICATION AC00~00 three-phase inverter drive for small power motor control. Fig. PACKAGE OUTLINES Dimensions in mm 3 5.5 (.78).78 ±0. A =.78 ±0. B = 4.3 ±0..04 ±0.3 5.6 B A B A B A B A B A D 8 7 6 5 4 3 098 7 6 5 4 3 0 9 8 7 6 5 4 3 9 30 Type name, Lot No. QR CODE C C 5-φ.(DEPTH.6) -φ3.3 35.9 ±0.5 7.7 7.7 (.96) (5.5) 0.5 (3.5) F (3.5) (.78). (.8) (.7) (3) (.) (.) (.7) 3 3 33 34 35 36 37 38.7 7. 6.6 ±0.3 7.6 ±0.3 7.6 ±0.3 7.6 ±0.3 7.6 ±0.3 3.3 ±0.3 3.3 ±0.3 3.95 ±0.3 46 ±0. 3.5 5.5 E 0.5.5 C-C (φ3.5) φ3.3 (φ3.7) Note: All outer lead terminals are with lead free solder (Sn-Cu) plating. (.75) 0.5 ().55 3. ±0. (.9) (.6) (0.75) DETAIL D.5 HEAT SINK SIDE (0.6) () () DETAIL E (0 ~5 ) TERMINAL CODE 3 4 5 6 7 8 9 0 3 4 5 6 7 8 9 UFS (UPG) UFB P () UP FS (PG) FB P () P WFS (WPG) WFB P () WP (G) 0 3 4 5 6 7 8 9 30 3 3 33 34 35 36 37 38 FO C (G) (G) NW N NU W U P NC Aug. 007
MAXIMUM RATINGS (Tj = 5 C, unless otherwise noted) INERTER PART Symbol Ratings CC CC(surge) CES ±IC ±ICP PC Tj Supply voltage Supply voltage (surge) Collector-emitter voltage Each IGBT collector current Each IGBT collector current (peak) Collector dissipation Junction temperature Applied between P-NU, N, NW Applied between P-NU, N, NW Tc = 5 C Tc = 5 C, less than ms Tc = 5 C, per chip 450 500 600 30 60 90.9 0~50 A A W C CONTROL (PROTECTION) PART Symbol Ratings D DB IN FO IFO SC Control supply voltage Control supply voltage Input voltage Fault output supply voltage Fault output current Current sensing input voltage Applied between P-C, -C Applied between UFB-UFS, FB-FS, WFB-WFS Applied between UP, P, WP,,, - C Applied between FO-C Sink current at FO terminal Applied between -C 0 0 0.5~D0.5 0.5~D0.5 0.5~D0.5 TOTAL SYSTEM Symbol Ratings Self protection supply voltage limit D = 3.5~6.5, Inverter part CC(PROT) Tj = 5 C, non-repetitive, less than (short circuit protection capability) Tc Module case operation temperature (Note ) C Tstg iso Storage temperature Isolation voltage 60Hz, Sinusoidal, AC minute, All pins to heat-sink plate 400 0~00 40~5 500 C rms Note : TC measurement point Control Terminals 8mm 8mm Groove IGBT Chip position FWDi Chip position Power Terminals Tc point Heat sink side Aug. 007
THERMAL RESISTANCE Symbol Rth(j-c)Q Rth(j-c)F Junction to case thermal resistance (Note ) Inverter IGBT part (per /6 module) Inverter FWD part (per /6 module) Note : Grease with good thermal conductivity should be applied evenly with about 00µm~00µm on the contacting surface of and heat-sink. The contacting thermal resistance between case and heat sink (Rth(c-f)) is determined by the thickness and the thermal conductivity of the applied grease. r reference, Rth(c-f) (per /6 module) is about 0.3 C/W when the grease thickness is 0µm and the thermal conductivity is.0w/m k Min. Limits Typ. Max...8 C/W C/W ELECTRICAL CHARACTERISTICS (Tj = 5 C, unless otherwise noted) INERTER PART CE(sat) EC ton trr Symbol tc(on) toff tc(off) ICES Collector-emitter saturation voltage FWDi forward voltage Switching times Collector-emitter cut-off current D = DB = 5 IC = 30A, Tj = 5 C IN = 5 IC = 30A, Tj = 5 C Tj = 5 C, IC = 30A, IN = 0 CC = 300, D = DB = 5 IC = 30A, Tj = 5 C, IN = 0 5 Inductive load (upper-lower arm) CE = CES Tj = 5 C Tj = 5 C Limits Min. Typ. Max. 0.70.60.70.50.30 0.30 0.50.50 0.40.0.0.00.90 0.80.0 0.60 0 CONTROL (PROTECTION) PART Symbol ID FOH FOL SC(ref) IIN UDBt UDBr UDt UDr tfo th(on) th(off) th(hys) Circuit current Fault output voltage Short circuit trip level Input current Control supply under-voltage protection Fault output pulse width ON threshold voltage OFF threshold voltage ON/OFF threshold hysteresis voltage D = DB = 5 IN = 5 D = DB = 5 IN = 0 Total of P-C, -C UFB-UFS, FB-FS, WFB-WFS Total of P-C, -C UFB-UFS, FB-FS, WFB-WFS SC = 0, FO terminal pull-up to 5 with 0kΩ SC =, IFO = Tj = 5 C, D = 5 (Note 3) IN = 5 Tj 5 C Trip level Reset level Trip level Reset level = nf (Note 4) Applied between UP, P, WP,,, -C Limits Min. Typ. Max. 7.00 0.55 7.00 0.55 4.9 0.95 0.43 0.48 0.53.0.5.0 0.0.0 0.5.5 0.3.5 0.8 3.0.0.8.3.6 0.8.4 0.5 0.9 Note 3 : Short circuit protection is functioning only at the low-arms. Please select the external shunt resistance such that the SC trip-level is less than.0 times of the current rating. 4:Fault signal is output when the low-arms short circuit or control supply under-voltage protective functions works. The fault output pulsewidth tfo depends on the capacitance of according to the following approximate equation : =. 0-6 tfo [F]. ms Aug. 007 3
MECHANICAL CHARACTERISTICS AND RATINGS Mounting torque Weight Heat-sink flatness Mounting screw : M3 Recommended : 0.78 N m (Note 5) Min. 0.59 50 Limits Typ. Max. 0.98 00 N m g µm Note 5 : Flatness measurement position Measurement position 3mm Heat sink side Heat sink side REMENDED OPERATION CONDITIONS CC D DB D, DB tdead fpwm IO PWIN(on) PWIN(off) C Tj Symbol Supply voltage Control supply voltage Control supply voltage Control supply variation Arm shoot-through blocking time PWM input frequency Output r.m.s. current Minimum input pulse width C voltage variation Junction temperature Applied between P-NU, N, NW Applied between P-C, -C Applied between UFB-UFS, FB-FS, WFB-WFS r each input signal, Tc 00 C Tc 00 C, Tj 5 C CC = 300, D = DB = 5, fpwm = 5kHz P.F = 0.8, sinusoidal PWM fpwm = 5kHz Tc 00 C, Tj 5 C (Note 6) (Note 7) 00 CC 350, 3.5 D 6.5, 3.0 DB 8.5, 0 C Tc 00 C, N-line wiring inductance less than 0nH (Note 8) Below rated current Between rated current and.7 times of rated current Between.7 times and.0 times of rated current Between C-NU, N, NW (including surge) Recommended value Min. Typ. Max. Note 6 : The allowable r.m.s. current value depends on the actual application conditions. 7:Input signal with ON pulse width less than PWIN(on) might make no response. 8:IPM might make delayed response (less than about ec) or no response for the input signal with off pulse width less than PWIN(off). Please refer Fig. about delayed response and Fig. 6 about N-line inductance. 0 3.5 3.0 0.3.5 3.0 3.6 5.0 0 300 5.0 5.0 400 6.5 8.5 0 6 5.0 5 / khz Arms C Aug. 007 4
Fig. ABOUT DELAYED RESPONSE AGAINST SHORTER INPUT OFF SIGNAL THAN PWIN (off) (P side only) P side control input Internal IGBT gate Output current Ic t t Real line... off pulse width > PWIN(off) : turn on time t Broken line... off pulse width < PWIN(off) : turn on time t Fig. 3 THE INTERNAL CIRCUIT UFB UFS P HIC CC B IGBT Di P UP IN HO S U FB FS P HIC CC B IGBT Di P IN HO S WFB WFS P HIC3 CC B IGBT3 Di3 P IN HO S W LIC IGBT4 Di4 UOUT CC NU IGBT5 Di5 OUT N WOUT IGBT6 Di6 NW C GND Aug. 007 5
Fig. 4 TIMING CHARTS OF THE PROTECTIE FCTIONS [A] Short-Circuit Protection (Lower-arms only with the external shunt resistor and CR filter) a. Normal operation : IGBT ON and carrying current. a. Short circuit current detection (SC trigger). a3. IGBT gate hard interruption. a4. IGBT turns OFF. a5. FO timer operation starts : The pulse width of the FO signal is set by the external capacitor. a6. Input L : IGBT OFF. a7. Input H a8. IGBT OFF state in spite of input H. Lower-arms control input a6 a7 Protection circuit state SET Internal IGBT gate a a3 Output current Ic a SC a4 a8 Sense voltage of the shunt resistor SC reference voltage Fault output a5 CR circuit time constant DELAY [B] Under-oltage Protection (Lower-arm, UD) b. Control supply voltage rising : After the voltage level reaches UDr, the circuits start to operate when next input is applied. b. Normal operation : IGBT ON and carrying current. b3. Under voltage trip (UDt). b4. IGBT turns OFF in spite of control input condition. b5. FO operation starts. b6. Under voltage reset (UDr). b7. Normal operation : IGBT ON and carrying current. Control input Protection circuit state SET Control supply voltage D UDr b UDt b3 b6 b b4 b7 Output current Ic Fault output b5 Aug. 007 6
[C] Under-oltage Protection (Upper-arm, UDB) c. Control supply voltage rises : After the voltage level reaches UDBr, the circuits start to operate. c. Protection circuit state reset : IGBT ON and carrying current. c3. Normal operation : IGBT ON and carrying current. c4. Under-voltage trip (UDBt). c5. IGBT OFF inspite of control input condition, but there is no FO signal output. c6. Under-voltage reset (UDBr). c7. Normal operation : IGBT ON and carrying current. Control input Protection circuit state SET Control supply voltage DB UDBr c UDBt c4 c6 Output current Ic c c3 c5 c7 Fault output High-level (no fault output) Fig. 5 REMENDED MCU I/O INTERFACE CIRCUIT 5 line 0kΩ UP,P,WP,,, MCU C(Logic) Note : RC coupling at each input (parts shown dotted) may change depending on the PWM control scheme used in the application and the wiring impedance of the application s printed circuit board. The input signal section integrates a.5kω(min) pull-down resistor. Therefore, when using a external filtering resistor, care must be taken to satisfy the turn-on threshold voltage requirement. Fig. 6 REMENDED WIRING AROD THE SHT RESISTOR Each wiring inductance should be less than 0nH Equivalent to the inductance of a copper pattern in dimension of width=3mm, thickness=00µm, length=7mm C NU N NW Shunt resistor The GND wiring from, C should be as close to the shunt resistors as possible Aug. 007 7
Fig. 7 TYPICAL APPLICATION CIRCUIT EXAMPLE C: Tight tolerance temp-compensated electrolytic type C,C3: 0.~µF R-category ceramic capacitor for noise filtering C C UFB UFS P HIC P C3 UP CC IN B HO C C FB FS S U C3 P P HIC CC B IN HO C WFB S M C WFS CONTROLLER C3 P WP HIC3 CC B IN HO S LIC UOUT W C3 CC NU 5 line OUT N C GND WOUT Too long wiring here might cause short-circuit. NW C 5 line C4() A If this wiring is too long, the SC level fluctuation might be larger and cause SC malfunction. Shunt resistors Long GND wiring here might generate noise to input and cause IGBT malfunction. OR Logic - - - ref ref ref B R C5 B R C5 B R C5 N Comparator External protection circuit Note : Input drive is High-active type. There is a.5kω(min.) pull-down resistor integrated in the IC input circuit. To prevent malfunction, the wiring of each input should be as short as possible. When using RC coupling circuit, make sure the input signal level meet the turn-on and turn-off threshold voltage. :Thanks to HIC inside the module, direct coupling to MCU without any opto-coupler or transformer isolation is possible. 3 :FO output is open drain type. It should be pulled up to the positive side of a 5 power supply by a resistor of about 0kΩ. FO output pulse width is determined by the external capacitor () between and C terminals (e.g = nf tfo =.8ms (typ.)) 4 :To prevent erroneous protection, the wiring of A, B should be as short as possible. 5 :The time constant RC5 of the protection circuit should be selected in the range of.5-. SC interrupting time might vary with the wiring pattern. Tight tolerance, temp-compensated type is recommended for R, C5. 6 :All capacitors should be mounted as close to the terminals of the as possible. (C: good temperature, frequency characteristic electrolytic type, and C, C3: good temperature, frequency and DC bias characteristic ceramic type are recommended.) 7 :To prevent surge destruction, the wiring between the smoothing capacitor and the P, N terminals should be as short as possible. Generally a 0.-0.µF snubber between the P-N terminals is recommended. 8 :It is recommended to insert a Zener diode (4/W) between each pair of control supply terminals to prevent surge destruction. 9 :If control GND is connected to power GND by broad pattern, it may cause malfunction by power GND fluctuation. It is recommended to connect control GND and power GND at only a point. 0 : The reference voltage ref of comparator should be set up the same rating of short circuit trip level (sc(ref): min.0.43 to max.0.53). : OR logic output high level should exceed the maximum short circuit trip level (sc(ref): max.0.53). Aug. 007 8