Chapter 3 Field-Effect Transistors (FETs) 3.1 Introduction Field-Effect Transistor (FET) is one of the two major transistors; FET derives its name from its working mechanism; The concept has been known in 1930s and became a practice in 1960s; MOSFET become extremely popular since the late 1970s; Field-Effect Transistor (FET) has many better features over BJT: Smaller size; Easier to fabricate; Simple circuitry for digital logic and memory At the present time Complementary MOS or CMOS is the most useful of all the integrated circuit MOS technologies both for analog and digital circuits.
3.2 Structure and Physical Operation of Enhancement-Type MOSFET Metal-Oxide-Semiconductor FET - MOSFET Typically, L = 1 to 10 µm, W = 2 to 500 µm, the thickness of the oxide layer is in the range of 0.02 to 0.1 µm. In fact, most modern MOSFETs are fabricated using a process known as silicon-gate technology, in which a certain type of silicon, called polysilicon is used to form the gate electrode. In normal operation these pn junctions are kept reverse-biased at all times. Since the drain will be at a positive voltage relative to the source, the two pn junction can be effectively cut off by simply connecting the substrate terminal to the source terminal. Unlike the BJT, the MOSFET is normally constructed as a symmetrical device.
Operation with No Gate Voltage With no bias applied to the gate, two back-to-back diodes exist in series between drain and source. The two back-to-back diodes prevent current conduction from drain to source when a voltage v DS is applied. The resistance is of the order of 10 12 Ω. Creating a Channel for Current Flow If source and drain are grounded and a positive voltage is biased to gate, the free holes are repelled from the region of the substrate under the gate (the channel region). The holes are pushed downward into the substrate and form a carrier-depletion region. The depletion region is populated by the bound negative charge, which can form current flow between S and D if electric field exists. The induced n region is called n-channel. The threshold voltage to form the channel is denoted V t whose value lies in the range of 1 to 3 V.
Applying a Small v DS When v DS is small (~ 0.1 or 0.2 V), the v DS causes a current i D to flow through the induced n-channel from D to S. The magnitude of i D depends on the density of electrons in the channel, which in turn depends on v GS. As v GS > V t, depth of the channel increases, i D will be proportional to v GS - V t. Increasing v GS above V t enhances the channel, hence it is called enhancement mode operation.
Operation as v DS is increased Pinch Off V t is a ruler v G v G v GD = v GS v DS v t v GS v S Triode v GD v D = v GS v v DS DS v t v GS v S Saturation v D v DS V t < vgs vds or vds < vgs Vt V t v GS v DS or v DS v GS V t
3.3 Derivation of the i D -v DS relationship C = Q / V dq dx capacitance by the area of W*dx of the parallel-plate C ox is the capacitance per unit area of the parallel-plate capacitor formed by the gate electrode and the channel.
i= dq dx dx dt =