V DSS R DS(on) max Qg. 30V 4.8m: 15nC

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PD - 9623 Applications l Optimized for UPS/Inverter Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial use Benefits l Very Low RDS(on) at 4.5V l Ultra-Low Gate Impedance l Fully Characterized Avalanche Voltage and Current l Lead-Free HEXFET Power MOSFET V DSS R DS(on) max Qg 30V 4.8m: 5nC D S D G TO-220AB G D S Gate Drain Source Absolute Maximum Ratings V DS I D @ T C = 25 C I D @ T C = C I D @ T C = 25 C I DM P D @T C = 25 C P D @T C = C T J T STG Drain-to-Source Voltage Gate-to-Source Voltage Parameter Continuous Drain Current, @ V (Silicon Limited) Continuous Drain Current, @ V (Silicon Limited) Continuous Drain Current, @ V (Package Limited) Pulsed Drain Current c Maximum Power Dissipation h Maximum Power Dissipation h Linear Derating Factor Operating Junction and Storage Temperature Range Soldering Temperature, for seconds Mounting Torque, 6-32 or M3 screw i Max. 30 ± 20 92f 65 78 370 75 38 0.5-55 to 75 300 (.6mm from case) lbfyin (.Nym) Units V A W W/ C C Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case h 2.0 R θcs Case-to-Sink, Flat Greased Surface 0.5 C/W R θja Junction-to-Ambient g 62 Notes through are on page 9 www.irf.com 04/22/09

Static @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units BV DSS Drain-to-Source Breakdown Voltage 30 V ΒV DSS / T J Breakdown Voltage Temp. Coefficient 2 mv/ C R DS(on) Static Drain-to-Source On-Resistance 3.8 4.8 mω 5.5 6.8 = 4.5V, I D = 32A e (th) Gate Threshold Voltage.35.8 2.35 V V (th) / T DS =, I D = 50µA J Gate Threshold Voltage Coefficient -7. mv/ C I DSS Drain-to-Source Leakage Current.0 V DS = 24V, = 0V µa 50 V DS = 24V, = 0V, T J = 25 C I GSS Gate-to-Source Forward Leakage = 20V na Gate-to-Source Reverse Leakage - = -20V gfs Forward Transconductance 96 S V DS = 5V, I D = 32A Q g Total Gate Charge 5 23 Q gs Pre-Vth Gate-to-Source Charge 3.6 V DS = 5V Q gs2 Post-Vth Gate-to-Source Charge 2.2 nc Q gd Gate-to-Drain Charge 5.9 Q godr Gate Charge Overdrive 3.9 Q sw Switch Charge (Q gs2 Q gd ) 8. Q oss Output Charge nc R G Gate Resistance 2.0 3.5 Ω t d(on) Turn-On Delay Time 4 t r Rise Time 96 t d(off) Turn-Off Delay Time 6 ns t f Fall Time 34 C iss Input Capacitance 239 C oss Output Capacitance 464 pf C rss Reverse Transfer Capacitance 99 Avalanche Characteristics Parameter Typ. Max. Units E AS Single Pulse Avalanche Energyd 4 mj I AR Avalanche Currentc 32 A E AR Repetitive Avalanche Energy c 7.5 mj Diode Characteristics Parameter Min. Typ. Max. Units Conditions = 0V, I D = 250µA Reference to 25 C, I D = ma = V, I D = 40A e = 4.5V I D = 32A V DS = 6V, = 0V V DD = 5V, = 4.5Ve I D = 32A R G =.8Ω = 0V V DS = 5V ƒ =.0MHz Conditions I S Continuous Source Current MOSFET symbol 92f (Body Diode) showing the A I SM Pulsed Source Current integral reverse 370 (Body Diode)c p-n junction diode. V SD Diode Forward Voltage.0 V T J = 25 C, I S = 32A, = 0V e t rr Reverse Recovery Time 23 35 ns T J = 25 C, I F = 32A, V DD = 5V Q rr Reverse Recovery Charge 39 59 nc di/dt = 200A/µs e t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSLD) 2 www.irf.com

I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) VGS TOP V 9.0V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 3.0V VGS TOP V 9.0V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 3.0V 3.0V 3.0V 60µs PULSE WIDTH Tj = 25 C 0. V DS, Drain-to-Source Voltage (V) 60µs PULSE WIDTH Tj = 75 C 0. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics 2.0.8 I D = 40A = V.6 T J = 75 C.4 0. T J = 25 C V DS = 5V 60µs PULSE WIDTH 2 3 4 5 6 7 8, Gate-to-Source Voltage (V).2.0 0.8 0.6 0.4-60 -40-20 0 20 40 60 80 20406080 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature www.irf.com 3

I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance (pf), Gate-to-Source Voltage (V) 0 = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C iss 4.0 2.0.0 I D = 32A V DS = 24V V DS = 5V 8.0 C oss 6.0 4.0 C rss 2.0 0.0 0 20 30 40 V DS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 75 C msec µsec msec T J = 25 C = 0V 0. 0.0 0.5.0.5 2.0 2.5 V SD, Source-to-Drain Voltage (V) Tc = 25 C Tj = 75 C Single Pulse 0 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com

I D, (th), Drain Current (A) Gate threshold Voltage (V) Limited By Package 2.5 80 2.0 60.5 40 20.0 I D = 50µA ID = 250µA ID =.0mA 0 25 50 75 25 50 75 T C, Case Temperature ( C) 0.5-75 -50-25 0 25 50 75 25 50 75 T J, Temperature ( C ) Fig 9. Maximum Drain Current vs. Case Temperature Fig. Threshold Voltage vs. Temperature Thermal Response ( Z thjc ) C/W 0. 0.0 D = 0.50 0.20 0. 0.05 0.02 0.0 SINGLE PULSE ( THERMAL RESPONSE ) R R 2 R 3 R R 2 R 3 τ J τ J τ τ τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci i/ri 0.43999 0.00037 Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc 0.00 E-006 E-005 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 R 4 R 4 τ 4 τ 4 τ C τ Ri ( C/W) τi (sec).55246 0.005303 0.00682 8.250407 0.0072 6.93299

R DS(on), Drain-to -Source On Resistance (m Ω) E AS, Single Pulse Avalanche Energy (mj) 8 6 4 I D = 40A 500 450 400 350 I D TOP 6.73A.6A BOTTOM 32A 2 8 T J = 25 C 300 250 200 50 6 T J = 25 C 50 4 2 4 6 8, Gate -to -Source Voltage (V) Fig 2. On-Resistance vs. Gate Voltage 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig 3c. Maximum Avalanche Energy vs. Drain Current 5V V DS R D V DS L DRIVER D.U.T. R G R G 20V tp D.U.T IAS 0.0Ω - V DD A Pulse Width µs Duty Factor 0. % - V DD Fig 3a. Unclamped Inductive Test Circuit tp V (BR)DSS Fig 4a. Switching Time Test Circuit V DS 90% % t d(on) t r t d(off) t f I AS Fig 4b. Switching Time Waveforms Fig 3b. Unclamped Inductive Waveforms 6 www.irf.com

- D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period =V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * = 5V for Logic Level Devices Fig 5. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs Current Regulator Same Type as D.U.T. Id Vds 2V.2µF 50KΩ.3µF Vgs D.U.T. V - DS Vgs(th) 3mA I G I D Current Sampling Resistors Qgodr Qgd Qgs2 Qgs Fig 6. Gate Charge Test Circuit Fig 7. Gate Charge Waveform www.irf.com 7

TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ 8 www.irf.com

TO-220AB Part Marking Information (;$03/( 7,6,6$,5) /27&2'( $66(0%/('2::,7($66(0%/</,(& RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/< /27&2'( 3$5780%(5 '$7(&2'( <($5 :((. /,(& Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 0.22mH, R G = 25Ω, I AS = 32A. ƒ Pulse width 400µs; duty cycle 2%. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 78A. When mounted on " square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994. R θ is measured at T J approximately 90 C. This is only applied to TO-220AB pakcage. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) 252-75 TAC Fax: (3) 252-7903 Visit us at www.irf.com for sales contact information.04/2009 www.irf.com 9